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Update target details

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llvm commit b2851aea80e5a8f0cfd6c3c5a56a6b00fb28c6b6
zig-llvm-target-details-generator commit
4299674ecabeb668b0d84285cd1b41a652a391b1
This commit is contained in:
Jakub Konka 2020-12-16 12:39:30 +01:00
parent 38bf94280b
commit 6f3ed2f71f
15 changed files with 2004 additions and 1464 deletions
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774
lib/std/target/aarch64.zig
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195
lib/std/target/amdgpu.zig
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@ -16,7 +16,6 @@ pub const Feature = enum {
atomic_fadd_insts,
auto_waitcnt_before_barrier,
ci_insts,
code_object_v3,
cumode,
dl_insts,
dot1_insts,
@ -54,6 +53,8 @@ pub const Feature = enum {
gfx9,
gfx9_insts,
half_rate_64_ops,
image_gather4_d16_bug,
image_store_d16_bug,
inst_fwd_prefetch_bug,
int_clamp_insts,
inv_2pi_inline_imm,
@ -104,7 +105,9 @@ pub const Feature = enum {
sram_ecc,
trap_handler,
trig_reduced_range,
unaligned_access_mode,
unaligned_buffer_access,
unaligned_ds_access,
unaligned_scratch_access,
unpacked_d16_vmem,
unsafe_ds_offset_folding,
@ -125,6 +128,7 @@ pub const Feature = enum {
pub usingnamespace CpuFeature.feature_set_fns(Feature);
pub const all_features = blk: {
@setEvalBranchQuota(10000);
const len = @typeInfo(Feature).Enum.fields.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;
@ -170,11 +174,6 @@ pub const all_features = blk: {
.description = "Additional instructions for CI+",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.code_object_v3)] = .{
.llvm_name = "code-object-v3",
.description = "Generate code object version 3",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.cumode)] = .{
.llvm_name = "cumode",
.description = "Enable CU wavefront execution mode",
@ -353,6 +352,8 @@ pub const all_features = blk: {
.sdwa_omod,
.sdwa_scalar,
.sdwa_sdst,
.unaligned_buffer_access,
.unaligned_ds_access,
.vop3_literal,
.vop3p,
.vscnt,
@ -418,6 +419,8 @@ pub const all_features = blk: {
.sdwa_omod,
.sdwa_scalar,
.sdwa_sdst,
.unaligned_buffer_access,
.unaligned_ds_access,
.vgpr_index_mode,
.vop3p,
.wavefrontsize64,
@ -433,6 +436,16 @@ pub const all_features = blk: {
.description = "Most fp64 instructions are half rate instead of quarter",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.image_gather4_d16_bug)] = .{
.llvm_name = "image-gather4-d16-bug",
.description = "Image Gather4 D16 hardware bug",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.image_store_d16_bug)] = .{
.llvm_name = "image-store-d16-bug",
.description = "Image Store D16 hardware bug",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{
.llvm_name = "inst-fwd-prefetch-bug",
.description = "S_INST_PREFETCH instruction causes shader to hang",
@ -455,7 +468,7 @@ pub const all_features = blk: {
};
result[@enumToInt(Feature.lds_misaligned_bug)] = .{
.llvm_name = "lds-misaligned-bug",
.description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
.description = "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.ldsbankcount16)] = .{
@ -659,6 +672,7 @@ pub const all_features = blk: {
.no_sram_ecc_support,
.s_memtime_inst,
.trig_reduced_range,
.unaligned_buffer_access,
.wavefrontsize64,
}),
};
@ -710,9 +724,19 @@ pub const all_features = blk: {
.description = "Requires use of fract on arguments to trig instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.unaligned_access_mode)] = .{
.llvm_name = "unaligned-access-mode",
.description = "Enable unaligned global, local and region loads and stores if the hardware supports it",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.unaligned_buffer_access)] = .{
.llvm_name = "unaligned-buffer-access",
.description = "Support unaligned global loads and stores",
.description = "Hardware supports unaligned global loads and stores",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.unaligned_ds_access)] = .{
.llvm_name = "unaligned-ds-access",
.description = "Hardware supports unaligned local and region loads and stores",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.unaligned_scratch_access)] = .{
@ -778,6 +802,7 @@ pub const all_features = blk: {
.sdwa_mav,
.sdwa_out_mods_vopc,
.trig_reduced_range,
.unaligned_buffer_access,
.vgpr_index_mode,
.wavefrontsize64,
}),
@ -830,7 +855,6 @@ pub const cpu = struct {
.name = "bonaire",
.llvm_name = "bonaire",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.sea_islands,
@ -840,7 +864,6 @@ pub const cpu = struct {
.name = "carrizo",
.llvm_name = "carrizo",
.features = featureSet(&[_]Feature{
.code_object_v3,
.fast_fmaf,
.half_rate_64_ops,
.ldsbankcount32,
@ -853,7 +876,6 @@ pub const cpu = struct {
.name = "fiji",
.llvm_name = "fiji",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.unpacked_d16_vmem,
@ -879,7 +901,6 @@ pub const cpu = struct {
.name = "gfx1010",
.llvm_name = "gfx1010",
.features = featureSet(&[_]Feature{
.code_object_v3,
.dl_insts,
.ds_src2_insts,
.flat_segment_offset_bug,
@ -909,7 +930,6 @@ pub const cpu = struct {
.name = "gfx1011",
.llvm_name = "gfx1011",
.features = featureSet(&[_]Feature{
.code_object_v3,
.dl_insts,
.dot1_insts,
.dot2_insts,
@ -921,6 +941,7 @@ pub const cpu = struct {
.gfx10,
.inst_fwd_prefetch_bug,
.lds_branch_vmem_war_hazard,
.lds_misaligned_bug,
.ldsbankcount32,
.mad_mac_f32_insts,
.no_xnack_support,
@ -942,7 +963,6 @@ pub const cpu = struct {
.name = "gfx1012",
.llvm_name = "gfx1012",
.features = featureSet(&[_]Feature{
.code_object_v3,
.dl_insts,
.dot1_insts,
.dot2_insts,
@ -976,7 +996,60 @@ pub const cpu = struct {
.name = "gfx1030",
.llvm_name = "gfx1030",
.features = featureSet(&[_]Feature{
.code_object_v3,
.dl_insts,
.dot1_insts,
.dot2_insts,
.dot5_insts,
.dot6_insts,
.gfx10,
.gfx10_3_insts,
.gfx10_b_encoding,
.ldsbankcount32,
.no_xnack_support,
.nsa_encoding,
.wavefrontsize32,
}),
};
pub const gfx1031 = CpuModel{
.name = "gfx1031",
.llvm_name = "gfx1031",
.features = featureSet(&[_]Feature{
.dl_insts,
.dot1_insts,
.dot2_insts,
.dot5_insts,
.dot6_insts,
.gfx10,
.gfx10_3_insts,
.gfx10_b_encoding,
.ldsbankcount32,
.no_xnack_support,
.nsa_encoding,
.wavefrontsize32,
}),
};
pub const gfx1032 = CpuModel{
.name = "gfx1032",
.llvm_name = "gfx1032",
.features = featureSet(&[_]Feature{
.dl_insts,
.dot1_insts,
.dot2_insts,
.dot5_insts,
.dot6_insts,
.gfx10,
.gfx10_3_insts,
.gfx10_b_encoding,
.ldsbankcount32,
.no_xnack_support,
.nsa_encoding,
.wavefrontsize32,
}),
};
pub const gfx1033 = CpuModel{
.name = "gfx1033",
.llvm_name = "gfx1033",
.features = featureSet(&[_]Feature{
.dl_insts,
.dot1_insts,
.dot2_insts,
@ -995,7 +1068,6 @@ pub const cpu = struct {
.name = "gfx600",
.llvm_name = "gfx600",
.features = featureSet(&[_]Feature{
.code_object_v3,
.fast_fmaf,
.half_rate_64_ops,
.ldsbankcount32,
@ -1007,7 +1079,15 @@ pub const cpu = struct {
.name = "gfx601",
.llvm_name = "gfx601",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.southern_islands,
}),
};
pub const gfx602 = CpuModel{
.name = "gfx602",
.llvm_name = "gfx602",
.features = featureSet(&[_]Feature{
.ldsbankcount32,
.no_xnack_support,
.southern_islands,
@ -1017,7 +1097,6 @@ pub const cpu = struct {
.name = "gfx700",
.llvm_name = "gfx700",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.sea_islands,
@ -1027,7 +1106,6 @@ pub const cpu = struct {
.name = "gfx701",
.llvm_name = "gfx701",
.features = featureSet(&[_]Feature{
.code_object_v3,
.fast_fmaf,
.half_rate_64_ops,
.ldsbankcount32,
@ -1039,7 +1117,6 @@ pub const cpu = struct {
.name = "gfx702",
.llvm_name = "gfx702",
.features = featureSet(&[_]Feature{
.code_object_v3,
.fast_fmaf,
.ldsbankcount16,
.no_xnack_support,
@ -1050,7 +1127,6 @@ pub const cpu = struct {
.name = "gfx703",
.llvm_name = "gfx703",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount16,
.no_xnack_support,
.sea_islands,
@ -1060,17 +1136,24 @@ pub const cpu = struct {
.name = "gfx704",
.llvm_name = "gfx704",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.sea_islands,
}),
};
pub const gfx705 = CpuModel{
.name = "gfx705",
.llvm_name = "gfx705",
.features = featureSet(&[_]Feature{
.ldsbankcount16,
.no_xnack_support,
.sea_islands,
}),
};
pub const gfx801 = CpuModel{
.name = "gfx801",
.llvm_name = "gfx801",
.features = featureSet(&[_]Feature{
.code_object_v3,
.fast_fmaf,
.half_rate_64_ops,
.ldsbankcount32,
@ -1083,7 +1166,6 @@ pub const cpu = struct {
.name = "gfx802",
.llvm_name = "gfx802",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.sgpr_init_bug,
@ -1095,18 +1177,29 @@ pub const cpu = struct {
.name = "gfx803",
.llvm_name = "gfx803",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.unpacked_d16_vmem,
.volcanic_islands,
}),
};
pub const gfx805 = CpuModel{
.name = "gfx805",
.llvm_name = "gfx805",
.features = featureSet(&[_]Feature{
.ldsbankcount32,
.no_xnack_support,
.sgpr_init_bug,
.unpacked_d16_vmem,
.volcanic_islands,
}),
};
pub const gfx810 = CpuModel{
.name = "gfx810",
.llvm_name = "gfx810",
.features = featureSet(&[_]Feature{
.code_object_v3,
.image_gather4_d16_bug,
.image_store_d16_bug,
.ldsbankcount16,
.volcanic_islands,
.xnack,
@ -1116,8 +1209,8 @@ pub const cpu = struct {
.name = "gfx900",
.llvm_name = "gfx900",
.features = featureSet(&[_]Feature{
.code_object_v3,
.gfx9,
.image_gather4_d16_bug,
.ldsbankcount32,
.mad_mix_insts,
.no_sram_ecc_support,
@ -1128,8 +1221,8 @@ pub const cpu = struct {
.name = "gfx902",
.llvm_name = "gfx902",
.features = featureSet(&[_]Feature{
.code_object_v3,
.gfx9,
.image_gather4_d16_bug,
.ldsbankcount32,
.mad_mix_insts,
.no_sram_ecc_support,
@ -1140,9 +1233,9 @@ pub const cpu = struct {
.name = "gfx904",
.llvm_name = "gfx904",
.features = featureSet(&[_]Feature{
.code_object_v3,
.fma_mix_insts,
.gfx9,
.image_gather4_d16_bug,
.ldsbankcount32,
.no_sram_ecc_support,
.no_xnack_support,
@ -1152,13 +1245,13 @@ pub const cpu = struct {
.name = "gfx906",
.llvm_name = "gfx906",
.features = featureSet(&[_]Feature{
.code_object_v3,
.dl_insts,
.dot1_insts,
.dot2_insts,
.fma_mix_insts,
.gfx9,
.half_rate_64_ops,
.image_gather4_d16_bug,
.ldsbankcount32,
.no_xnack_support,
}),
@ -1168,7 +1261,6 @@ pub const cpu = struct {
.llvm_name = "gfx908",
.features = featureSet(&[_]Feature{
.atomic_fadd_insts,
.code_object_v3,
.dl_insts,
.dot1_insts,
.dot2_insts,
@ -1179,6 +1271,7 @@ pub const cpu = struct {
.fma_mix_insts,
.gfx9,
.half_rate_64_ops,
.image_gather4_d16_bug,
.ldsbankcount32,
.mai_insts,
.mfma_inline_literal_bug,
@ -1190,8 +1283,19 @@ pub const cpu = struct {
.name = "gfx909",
.llvm_name = "gfx909",
.features = featureSet(&[_]Feature{
.code_object_v3,
.gfx9,
.image_gather4_d16_bug,
.ldsbankcount32,
.mad_mix_insts,
.xnack,
}),
};
pub const gfx90c = CpuModel{
.name = "gfx90c",
.llvm_name = "gfx90c",
.features = featureSet(&[_]Feature{
.gfx9,
.image_gather4_d16_bug,
.ldsbankcount32,
.mad_mix_insts,
.xnack,
@ -1201,7 +1305,6 @@ pub const cpu = struct {
.name = "hainan",
.llvm_name = "hainan",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.southern_islands,
@ -1211,7 +1314,6 @@ pub const cpu = struct {
.name = "hawaii",
.llvm_name = "hawaii",
.features = featureSet(&[_]Feature{
.code_object_v3,
.fast_fmaf,
.half_rate_64_ops,
.ldsbankcount32,
@ -1223,7 +1325,6 @@ pub const cpu = struct {
.name = "iceland",
.llvm_name = "iceland",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.sgpr_init_bug,
@ -1235,7 +1336,6 @@ pub const cpu = struct {
.name = "kabini",
.llvm_name = "kabini",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount16,
.no_xnack_support,
.sea_islands,
@ -1245,7 +1345,6 @@ pub const cpu = struct {
.name = "kaveri",
.llvm_name = "kaveri",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.sea_islands,
@ -1255,7 +1354,6 @@ pub const cpu = struct {
.name = "mullins",
.llvm_name = "mullins",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount16,
.no_xnack_support,
.sea_islands,
@ -1265,7 +1363,6 @@ pub const cpu = struct {
.name = "oland",
.llvm_name = "oland",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.southern_islands,
@ -1275,7 +1372,6 @@ pub const cpu = struct {
.name = "pitcairn",
.llvm_name = "pitcairn",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.southern_islands,
@ -1285,7 +1381,6 @@ pub const cpu = struct {
.name = "polaris10",
.llvm_name = "polaris10",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.unpacked_d16_vmem,
@ -1296,7 +1391,6 @@ pub const cpu = struct {
.name = "polaris11",
.llvm_name = "polaris11",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.unpacked_d16_vmem,
@ -1307,7 +1401,8 @@ pub const cpu = struct {
.name = "stoney",
.llvm_name = "stoney",
.features = featureSet(&[_]Feature{
.code_object_v3,
.image_gather4_d16_bug,
.image_store_d16_bug,
.ldsbankcount16,
.volcanic_islands,
.xnack,
@ -1317,7 +1412,6 @@ pub const cpu = struct {
.name = "tahiti",
.llvm_name = "tahiti",
.features = featureSet(&[_]Feature{
.code_object_v3,
.fast_fmaf,
.half_rate_64_ops,
.ldsbankcount32,
@ -1329,7 +1423,17 @@ pub const cpu = struct {
.name = "tonga",
.llvm_name = "tonga",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.sgpr_init_bug,
.unpacked_d16_vmem,
.volcanic_islands,
}),
};
pub const tongapro = CpuModel{
.name = "tongapro",
.llvm_name = "tongapro",
.features = featureSet(&[_]Feature{
.ldsbankcount32,
.no_xnack_support,
.sgpr_init_bug,
@ -1341,7 +1445,6 @@ pub const cpu = struct {
.name = "verde",
.llvm_name = "verde",
.features = featureSet(&[_]Feature{
.code_object_v3,
.ldsbankcount32,
.no_xnack_support,
.southern_islands,

1454
lib/std/target/arm.zig
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69
lib/std/target/avr.zig
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@ -47,6 +47,7 @@ pub const Feature = enum {
pub usingnamespace CpuFeature.feature_set_fns(Feature);
pub const all_features = blk: {
@setEvalBranchQuota(10000);
const len = @typeInfo(Feature).Enum.fields.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;
@ -163,7 +164,6 @@ pub const all_features = blk: {
.dependencies = featureSet(&[_]Feature{
.avr0,
.@"break",
.memmappedregs,
.sram,
.tinyencoding,
}),
@ -802,6 +802,13 @@ pub const cpu = struct {
.avr5,
}),
};
pub const atmega168pb = CpuModel{
.name = "atmega168pb",
.llvm_name = "atmega168pb",
.features = featureSet(&[_]Feature{
.avr5,
}),
};
pub const atmega169 = CpuModel{
.name = "atmega169",
.llvm_name = "atmega169",
@ -949,6 +956,13 @@ pub const cpu = struct {
.avr5,
}),
};
pub const atmega324pb = CpuModel{
.name = "atmega324pb",
.llvm_name = "atmega324pb",
.features = featureSet(&[_]Feature{
.avr5,
}),
};
pub const atmega325 = CpuModel{
.name = "atmega325",
.llvm_name = "atmega325",
@ -1019,6 +1033,13 @@ pub const cpu = struct {
.avr5,
}),
};
pub const atmega328pb = CpuModel{
.name = "atmega328pb",
.llvm_name = "atmega328pb",
.features = featureSet(&[_]Feature{
.avr5,
}),
};
pub const atmega329 = CpuModel{
.name = "atmega329",
.llvm_name = "atmega329",
@ -1166,6 +1187,13 @@ pub const cpu = struct {
.avr4,
}),
};
pub const atmega48pb = CpuModel{
.name = "atmega48pb",
.llvm_name = "atmega48pb",
.features = featureSet(&[_]Feature{
.avr4,
}),
};
pub const atmega64 = CpuModel{
.name = "atmega64",
.llvm_name = "atmega64",
@ -1338,7 +1366,11 @@ pub const cpu = struct {
.name = "atmega8",
.llvm_name = "atmega8",
.features = featureSet(&[_]Feature{
.avr4,
.avr2,
.lpmx,
.movw,
.mul,
.spm,
}),
};
pub const atmega8515 = CpuModel{
@ -1391,11 +1423,22 @@ pub const cpu = struct {
.avr4,
}),
};
pub const atmega88pb = CpuModel{
.name = "atmega88pb",
.llvm_name = "atmega88pb",
.features = featureSet(&[_]Feature{
.avr4,
}),
};
pub const atmega8a = CpuModel{
.name = "atmega8a",
.llvm_name = "atmega8a",
.features = featureSet(&[_]Feature{
.avr4,
.avr2,
.lpmx,
.movw,
.mul,
.spm,
}),
};
pub const atmega8hva = CpuModel{
@ -1595,6 +1638,13 @@ pub const cpu = struct {
.avr25,
}),
};
pub const attiny441 = CpuModel{
.name = "attiny441",
.llvm_name = "attiny441",
.features = featureSet(&[_]Feature{
.avr25,
}),
};
pub const attiny44a = CpuModel{
.name = "attiny44a",
.llvm_name = "attiny44a",
@ -1651,6 +1701,13 @@ pub const cpu = struct {
.avr25,
}),
};
pub const attiny841 = CpuModel{
.name = "attiny841",
.llvm_name = "attiny841",
.features = featureSet(&[_]Feature{
.avr25,
}),
};
pub const attiny84a = CpuModel{
.name = "attiny84a",
.llvm_name = "attiny84a",
@ -1802,7 +1859,7 @@ pub const cpu = struct {
.name = "atxmega16e5",
.llvm_name = "atxmega16e5",
.features = featureSet(&[_]Feature{
.xmega,
.xmegau,
}),
};
pub const atxmega192a3 = CpuModel{
@ -1907,7 +1964,7 @@ pub const cpu = struct {
.name = "atxmega32e5",
.llvm_name = "atxmega32e5",
.features = featureSet(&[_]Feature{
.xmega,
.xmegau,
}),
};
pub const atxmega32x1 = CpuModel{
@ -2005,7 +2062,7 @@ pub const cpu = struct {
.name = "atxmega8e5",
.llvm_name = "atxmega8e5",
.features = featureSet(&[_]Feature{
.xmega,
.xmegau,
}),
};
pub const avr1 = CpuModel{

1
lib/std/target/bpf.zig
View File

@ -16,6 +16,7 @@ pub const Feature = enum {
pub usingnamespace CpuFeature.feature_set_fns(Feature);
pub const all_features = blk: {
@setEvalBranchQuota(10000);
const len = @typeInfo(Feature).Enum.fields.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;

1
lib/std/target/hexagon.zig
View File

@ -44,6 +44,7 @@ pub const Feature = enum {
pub usingnamespace CpuFeature.feature_set_fns(Feature);
pub const all_features = blk: {
@setEvalBranchQuota(10000);
const len = @typeInfo(Feature).Enum.fields.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;

1
lib/std/target/mips.zig
View File

@ -65,6 +65,7 @@ pub const Feature = enum {
pub usingnamespace CpuFeature.feature_set_fns(Feature);
pub const all_features = blk: {
@setEvalBranchQuota(10000);
const len = @typeInfo(Feature).Enum.fields.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;

1
lib/std/target/msp430.zig
View File

@ -17,6 +17,7 @@ pub const Feature = enum {
pub usingnamespace CpuFeature.feature_set_fns(Feature);
pub const all_features = blk: {
@setEvalBranchQuota(10000);
const len = @typeInfo(Feature).Enum.fields.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;

1
lib/std/target/nvptx.zig
View File

@ -41,6 +41,7 @@ pub const Feature = enum {
pub usingnamespace CpuFeature.feature_set_fns(Feature);
pub const all_features = blk: {
@setEvalBranchQuota(10000);
const len = @typeInfo(Feature).Enum.fields.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;

128
lib/std/target/powerpc.zig
View File

@ -32,6 +32,7 @@ pub const Feature = enum {
fsqrt,
fuse_addi_load,
fuse_addis_load,
fuse_store,
fusion,
hard_float,
htm,
@ -44,7 +45,9 @@ pub const Feature = enum {
lfiwax,
longcall,
mfocrf,
mma,
msync,
paired_vector_memops,
partword_atomics,
pcrelative_memops,
popcntd,
@ -59,7 +62,6 @@ pub const Feature = enum {
ppc6xx,
predictable_select_expensive,
prefix_instrs,
qpx,
recipprec,
secure_plt,
slow_popcntd,
@ -73,6 +75,7 @@ pub const Feature = enum {
pub usingnamespace CpuFeature.feature_set_fns(Feature);
pub const all_features = blk: {
@setEvalBranchQuota(10000);
const len = @typeInfo(Feature).Enum.fields.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;
@ -228,6 +231,13 @@ pub const all_features = blk: {
.fusion,
}),
};
result[@enumToInt(Feature.fuse_store)] = .{
.llvm_name = "fuse-store",
.description = "Target supports store clustering",
.dependencies = featureSet(&[_]Feature{
.fusion,
}),
};
result[@enumToInt(Feature.fusion)] = .{
.llvm_name = "fusion",
.description = "Target supports instruction fusion",
@ -292,6 +302,15 @@ pub const all_features = blk: {
.description = "Enable the MFOCRF instruction",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.mma)] = .{
.llvm_name = "mma",
.description = "Enable MMA instructions",
.dependencies = featureSet(&[_]Feature{
.paired_vector_memops,
.power8_vector,
.power9_altivec,
}),
};
result[@enumToInt(Feature.msync)] = .{
.llvm_name = "msync",
.description = "Has only the msync instruction instead of sync",
@ -299,6 +318,13 @@ pub const all_features = blk: {
.booke,
}),
};
result[@enumToInt(Feature.paired_vector_memops)] = .{
.llvm_name = "paired-vector-memops",
.description = "32Byte load and store instructions",
.dependencies = featureSet(&[_]Feature{
.isa_v30_instructions,
}),
};
result[@enumToInt(Feature.partword_atomics)] = .{
.llvm_name = "partword-atomics",
.description = "Enable l[bh]arx and st[bh]cx.",
@ -309,6 +335,7 @@ pub const all_features = blk: {
.description = "Enable PC relative Memory Ops",
.dependencies = featureSet(&[_]Feature{
.isa_v30_instructions,
.prefix_instrs,
}),
};
result[@enumToInt(Feature.popcntd)] = .{
@ -390,13 +417,6 @@ pub const all_features = blk: {
.power9_altivec,
}),
};
result[@enumToInt(Feature.qpx)] = .{
.llvm_name = "qpx",
.description = "Enable QPX instructions",
.dependencies = featureSet(&[_]Feature{
.fpu,
}),
};
result[@enumToInt(Feature.recipprec)] = .{
.llvm_name = "recipprec",
.description = "Assume higher precision reciprocal estimates",
@ -452,8 +472,8 @@ pub const all_features = blk: {
};
pub const cpu = struct {
pub const @"ppc440" = CpuModel{
.name = "ppc440",
pub const @"440" = CpuModel{
.name = "440",
.llvm_name = "440",
.features = featureSet(&[_]Feature{
.booke,
@ -464,8 +484,8 @@ pub const cpu = struct {
.msync,
}),
};
pub const @"ppc450" = CpuModel{
.name = "ppc450",
pub const @"450" = CpuModel{
.name = "450",
.llvm_name = "450",
.features = featureSet(&[_]Feature{
.booke,
@ -476,70 +496,70 @@ pub const cpu = struct {
.msync,
}),
};
pub const @"ppc601" = CpuModel{
.name = "ppc601",
pub const @"601" = CpuModel{
.name = "601",
.llvm_name = "601",
.features = featureSet(&[_]Feature{
.fpu,
}),
};
pub const @"ppc602" = CpuModel{
.name = "ppc602",
pub const @"602" = CpuModel{
.name = "602",
.llvm_name = "602",
.features = featureSet(&[_]Feature{
.fpu,
}),
};
pub const @"ppc603" = CpuModel{
.name = "ppc603",
pub const @"603" = CpuModel{
.name = "603",
.llvm_name = "603",
.features = featureSet(&[_]Feature{
.fres,
.frsqrte,
}),
};
pub const @"ppc603e" = CpuModel{
.name = "ppc603e",
pub const @"603e" = CpuModel{
.name = "603e",
.llvm_name = "603e",
.features = featureSet(&[_]Feature{
.fres,
.frsqrte,
}),
};
pub const @"ppc603ev" = CpuModel{
.name = "ppc603ev",
pub const @"603ev" = CpuModel{
.name = "603ev",
.llvm_name = "603ev",
.features = featureSet(&[_]Feature{
.fres,
.frsqrte,
}),
};
pub const @"ppc604" = CpuModel{
.name = "ppc604",
pub const @"604" = CpuModel{
.name = "604",
.llvm_name = "604",
.features = featureSet(&[_]Feature{
.fres,
.frsqrte,
}),
};
pub const @"ppc604e" = CpuModel{
.name = "ppc604e",
pub const @"604e" = CpuModel{
.name = "604e",
.llvm_name = "604e",
.features = featureSet(&[_]Feature{
.fres,
.frsqrte,
}),
};
pub const @"ppc620" = CpuModel{
.name = "ppc620",
pub const @"620" = CpuModel{
.name = "620",
.llvm_name = "620",
.features = featureSet(&[_]Feature{
.fres,
.frsqrte,
}),
};
pub const @"ppc7400" = CpuModel{
.name = "ppc7400",
pub const @"7400" = CpuModel{
.name = "7400",
.llvm_name = "7400",
.features = featureSet(&[_]Feature{
.altivec,
@ -547,8 +567,8 @@ pub const cpu = struct {
.frsqrte,
}),
};
pub const @"ppc7450" = CpuModel{
.name = "ppc7450",
pub const @"7450" = CpuModel{
.name = "7450",
.llvm_name = "7450",
.features = featureSet(&[_]Feature{
.altivec,
@ -556,16 +576,16 @@ pub const cpu = struct {
.frsqrte,
}),
};
pub const @"ppc750" = CpuModel{
.name = "ppc750",
pub const @"750" = CpuModel{
.name = "750",
.llvm_name = "750",
.features = featureSet(&[_]Feature{
.fres,
.frsqrte,
}),
};
pub const @"ppc970" = CpuModel{
.name = "ppc970",
pub const @"970" = CpuModel{
.name = "970",
.llvm_name = "970",
.features = featureSet(&[_]Feature{
.@"64bit",
@ -602,32 +622,6 @@ pub const cpu = struct {
.stfiwx,
}),
};
pub const a2q = CpuModel{
.name = "a2q",
.llvm_name = "a2q",
.features = featureSet(&[_]Feature{
.@"64bit",
.booke,
.cmpb,
.fcpsgn,
.fpcvt,
.fprnd,
.fre,
.fres,
.frsqrte,
.frsqrtes,
.fsqrt,
.icbt,
.isel,
.ldbrx,
.lfiwax,
.mfocrf,
.qpx,
.recipprec,
.slow_popcntd,
.stfiwx,
}),
};
pub const e500 = CpuModel{
.name = "e500",
.llvm_name = "e500",
@ -681,6 +675,7 @@ pub const cpu = struct {
.frsqrte,
.frsqrtes,
.fsqrt,
.fuse_store,
.htm,
.icbt,
.isa_v30_instructions,
@ -689,6 +684,8 @@ pub const cpu = struct {
.ldbrx,
.lfiwax,
.mfocrf,
.mma,
.paired_vector_memops,
.partword_atomics,
.pcrelative_memops,
.popcntd,
@ -697,6 +694,8 @@ pub const cpu = struct {
.power8_vector,
.power9_altivec,
.power9_vector,
.ppc_postra_sched,
.ppc_prera_sched,
.predictable_select_expensive,
.prefix_instrs,
.recipprec,
@ -837,6 +836,7 @@ pub const cpu = struct {
.frsqrte,
.frsqrtes,
.fsqrt,
.fuse_store,
.htm,
.icbt,
.isa_v30_instructions,
@ -845,6 +845,8 @@ pub const cpu = struct {
.ldbrx,
.lfiwax,
.mfocrf,
.mma,
.paired_vector_memops,
.partword_atomics,
.pcrelative_memops,
.popcntd,
@ -853,6 +855,8 @@ pub const cpu = struct {
.power8_vector,
.power9_altivec,
.power9_vector,
.ppc_postra_sched,
.ppc_prera_sched,
.predictable_select_expensive,
.prefix_instrs,
.recipprec,

82
lib/std/target/riscv.zig
View File

@ -25,6 +25,9 @@ pub const Feature = enum {
experimental_zbr,
experimental_zbs,
experimental_zbt,
experimental_zfh,
experimental_zvamo,
experimental_zvlsseg,
f,
m,
no_rvc_hints,
@ -66,6 +69,7 @@ pub const Feature = enum {
pub usingnamespace CpuFeature.feature_set_fns(Feature);
pub const all_features = blk: {
@setEvalBranchQuota(10000);
const len = @typeInfo(Feature).Enum.fields.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;
@ -168,6 +172,27 @@ pub const all_features = blk: {
.description = "'Zbt' (Ternary 'B' Instructions)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.experimental_zfh)] = .{
.llvm_name = "experimental-zfh",
.description = "'Zfh' (Half-Precision Floating-Point)",
.dependencies = featureSet(&[_]Feature{
.f,
}),
};
result[@enumToInt(Feature.experimental_zvamo)] = .{
.llvm_name = "experimental-zvamo",
.description = "'Zvamo'(Vector AMO Operations)",
.dependencies = featureSet(&[_]Feature{
.experimental_v,
}),
};
result[@enumToInt(Feature.experimental_zvlsseg)] = .{
.llvm_name = "experimental-zvlsseg",
.description = "'Zvlsseg' (Vector segment load/store instructions)",
.dependencies = featureSet(&[_]Feature{
.experimental_v,
}),
};
result[@enumToInt(Feature.f)] = .{
.llvm_name = "f",
.description = "'F' (Single-Precision Floating-Point)",
@ -357,29 +382,6 @@ pub const all_features = blk: {
};
pub const cpu = struct {
pub const baseline_rv32 = CpuModel{
.name = "baseline_rv32",
.llvm_name = null,
.features = featureSet(&[_]Feature{
.a,
.c,
.d,
.f,
.m,
}),
};
pub const baseline_rv64 = CpuModel{
.name = "baseline_rv64",
.llvm_name = null,
.features = featureSet(&[_]Feature{
.@"64bit",
.a,
.c,
.d,
.f,
.m,
}),
};
pub const generic_rv32 = CpuModel{
.name = "generic_rv32",
.llvm_name = "generic-rv32",
@ -404,6 +406,18 @@ pub const cpu = struct {
.@"64bit",
}),
};
pub const sifive_7_rv32 = CpuModel{
.name = "sifive_7_rv32",
.llvm_name = "sifive-7-rv32",
.features = featureSet(&[_]Feature{}),
};
pub const sifive_7_rv64 = CpuModel{
.name = "sifive_7_rv64",
.llvm_name = "sifive-7-rv64",
.features = featureSet(&[_]Feature{
.@"64bit",
}),
};
pub const sifive_e31 = CpuModel{
.name = "sifive_e31",
.llvm_name = "sifive-e31",
@ -413,6 +427,16 @@ pub const cpu = struct {
.m,
}),
};
pub const sifive_e76 = CpuModel{
.name = "sifive_e76",
.llvm_name = "sifive-e76",
.features = featureSet(&[_]Feature{
.a,
.c,
.f,
.m,
}),
};
pub const sifive_u54 = CpuModel{
.name = "sifive_u54",
.llvm_name = "sifive-u54",
@ -425,4 +449,16 @@ pub const cpu = struct {
.m,
}),
};
pub const sifive_u74 = CpuModel{
.name = "sifive_u74",
.llvm_name = "sifive-u74",
.features = featureSet(&[_]Feature{
.@"64bit",
.a,
.c,
.d,
.f,
.m,
}),
};
};

6
lib/std/target/sparc.zig
View File

@ -32,6 +32,7 @@ pub const Feature = enum {
pub usingnamespace CpuFeature.feature_set_fns(Feature);
pub const all_features = blk: {
@setEvalBranchQuota(10000);
const len = @typeInfo(Feature).Enum.fields.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;
@ -160,6 +161,11 @@ pub const cpu = struct {
.llvm_name = "f934",
.features = featureSet(&[_]Feature{}),
};
pub const generic = CpuModel{
.name = "generic",
.llvm_name = "generic",
.features = featureSet(&[_]Feature{}),
};
pub const gr712rc = CpuModel{
.name = "gr712rc",
.llvm_name = "gr712rc",

1
lib/std/target/systemz.zig
View File

@ -49,6 +49,7 @@ pub const Feature = enum {
pub usingnamespace CpuFeature.feature_set_fns(Feature);
pub const all_features = blk: {
@setEvalBranchQuota(10000);
const len = @typeInfo(Feature).Enum.fields.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;

1
lib/std/target/wasm.zig
View File

@ -24,6 +24,7 @@ pub const Feature = enum {
pub usingnamespace CpuFeature.feature_set_fns(Feature);
pub const all_features = blk: {
@setEvalBranchQuota(10000);
const len = @typeInfo(Feature).Enum.fields.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;

753
lib/std/target/x86.zig
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