diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig
index a36bd981bc..cfeca4c390 100644
--- a/src/arch/x86_64/CodeGen.zig
+++ b/src/arch/x86_64/CodeGen.zig
@@ -12311,25 +12311,33 @@ fn genCall(self: *Self, info: union(enum) {
                         const zo = elf_file.zigObjectPtr().?;
                         const sym_index = try zo.getOrCreateMetadataForNav(elf_file, func.owner_nav);
                         if (self.mod.pic) {
-                            const callee_reg: Register = switch (resolved_cc) {
-                                .SysV => callee: {
-                                    if (!fn_info.is_var_args) break :callee .rax;
-                                    const param_regs = abi.getCAbiIntParamRegs(resolved_cc);
-                                    break :callee if (call_info.gp_count < param_regs.len)
-                                        param_regs[call_info.gp_count]
-                                    else
-                                        .r10;
-                                },
-                                .Win64 => .rax,
-                                else => unreachable,
-                            };
-                            try self.genSetReg(
-                                callee_reg,
-                                Type.usize,
-                                .{ .load_symbol = .{ .sym = sym_index } },
-                                .{},
-                            );
-                            try self.asmRegister(.{ ._, .call }, callee_reg);
+                            // const callee_reg: Register = switch (resolved_cc) {
+                            //     .SysV => callee: {
+                            //         if (!fn_info.is_var_args) break :callee .rax;
+                            //         const param_regs = abi.getCAbiIntParamRegs(resolved_cc);
+                            //         break :callee if (call_info.gp_count < param_regs.len)
+                            //             param_regs[call_info.gp_count]
+                            //         else
+                            //             .r10;
+                            //     },
+                            //     .Win64 => .rax,
+                            //     else => unreachable,
+                            // };
+                            // TODO convert to near jump
+                            try self.asmMemory(.{ ._, .call }, .{
+                                .base = .{ .reloc = .{
+                                    .atom_index = try self.owner.getSymbolIndex(self),
+                                    .sym_index = sym_index,
+                                } },
+                                .mod = .{ .rm = .{ .size = .qword } },
+                            });
+                            // try self.genSetReg(
+                            //     callee_reg,
+                            //     Type.usize,
+                            //     .{ .load_symbol = .{ .sym = sym_index } },
+                            //     .{},
+                            // );
+                            // try self.asmRegister(.{ ._, .call }, callee_reg);
                         } else try self.asmMemory(.{ ._, .call }, .{
                             .base = .{ .reloc = .{
                                 .atom_index = try self.owner.getSymbolIndex(self),
@@ -14097,7 +14105,7 @@ fn airAsm(self: *Self, inst: Air.Inst.Index) !void {
                     else
                         return self.fail("invalid modifier: '{s}'", .{modifier}),
                     .load_symbol => |sym_off| if (mem.eql(u8, modifier, "P"))
-                        .{ .reg = try self.copyToTmpRegister(Type.usize, .{ .load_symbol = sym_off }) }
+                        .{ .reg = try self.copyToTmpRegister(Type.usize, .{ .lea_symbol = sym_off }) }
                     else
                         return self.fail("invalid modifier: '{s}'", .{modifier}),
                     else => return self.fail("invalid constraint: '{s}'", .{op_str}),
diff --git a/src/arch/x86_64/Lower.zig b/src/arch/x86_64/Lower.zig
index 9ad1579ecc..2cb874f003 100644
--- a/src/arch/x86_64/Lower.zig
+++ b/src/arch/x86_64/Lower.zig
@@ -398,6 +398,7 @@ fn emit(lower: *Lower, prefix: Prefix, mnemonic: Mnemonic, ops: []const Operand)
 
                         _ = lower.reloc(.{ .linker_reloc = sym });
                         break :op if (lower.pic) switch (mnemonic) {
+                            .call => break :op .{ .mem = Memory.rip(mem_op.sib.ptr_size, 0) },
                             .lea => break :op .{ .mem = Memory.rip(mem_op.sib.ptr_size, 0) },
                             .mov => break :op .{ .mem = Memory.rip(mem_op.sib.ptr_size, 0) },
                             else => unreachable,