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x86_64: implement more operations on vectors with 1-bit elements
This commit is contained in:
Jacob Young
parent
485e20884c
commit
50993a8f08
@ -2478,8 +2478,11 @@ fn regClassForType(self: *Self, ty: Type) RegisterManager.RegisterBitSet {
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else => abi.RegisterClass.sse,
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},
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.Vector => switch (ty.childType(mod).toIntern()) {
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.bool_type => abi.RegisterClass.gp,
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else => abi.RegisterClass.sse,
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.bool_type, .u1_type => abi.RegisterClass.gp,
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else => if (ty.isAbiInt(mod) and ty.intInfo(mod).bits == 1)
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abi.RegisterClass.gp
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else
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abi.RegisterClass.sse,
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},
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else => abi.RegisterClass.gp,
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};
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@ -5152,7 +5155,7 @@ fn airArrayElemVal(self: *Self, inst: Air.Inst.Index) !void {
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defer if (index_lock) |lock| self.register_manager.unlockReg(lock);
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try self.spillEflagsIfOccupied();
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if (array_ty.isVector(mod) and elem_ty.toIntern() == .bool_type) {
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if (array_ty.isVector(mod) and elem_ty.bitSize(mod) == 1) {
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const index_reg = switch (index_mcv) {
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.register => |reg| reg,
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else => try self.copyToTmpRegister(index_ty, index_mcv),
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@ -15475,26 +15478,59 @@ fn airAggregateInit(self: *Self, inst: Air.Inst.Index) !void {
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break :result .{ .load_frame = .{ .index = frame_index } };
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},
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.Array, .Vector => {
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const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(result_ty, mod));
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const elem_ty = result_ty.childType(mod);
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const elem_size: u32 = @intCast(elem_ty.abiSize(mod));
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if (result_ty.isVector(mod) and elem_ty.bitSize(mod) == 1) {
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const result_size: u32 = @intCast(result_ty.abiSize(mod));
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const dst_reg = try self.register_manager.allocReg(inst, abi.RegisterClass.gp);
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try self.asmRegisterRegister(
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.{ ._, .xor },
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registerAlias(dst_reg, @min(result_size, 4)),
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registerAlias(dst_reg, @min(result_size, 4)),
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);
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for (elements, 0..) |elem, elem_i| {
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const elem_mcv = try self.resolveInst(elem);
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const mat_elem_mcv = switch (elem_mcv) {
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.load_tlv => |sym_index| MCValue{ .lea_tlv = sym_index },
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else => elem_mcv,
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};
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const elem_off: i32 = @intCast(elem_size * elem_i);
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try self.genSetMem(.{ .frame = frame_index }, elem_off, elem_ty, mat_elem_mcv);
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for (elements, 0..) |elem, elem_i| {
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const elem_reg = try self.copyToTmpRegister(elem_ty, .{ .air_ref = elem });
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const elem_lock = self.register_manager.lockRegAssumeUnused(elem_reg);
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defer self.register_manager.unlockReg(elem_lock);
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try self.asmRegisterImmediate(
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.{ ._, .@"and" },
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registerAlias(elem_reg, @min(result_size, 4)),
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Immediate.u(1),
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);
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if (elem_i > 0) try self.asmRegisterImmediate(
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.{ ._l, .sh },
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registerAlias(elem_reg, result_size),
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Immediate.u(@intCast(elem_i)),
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);
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try self.asmRegisterRegister(
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.{ ._, .@"or" },
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registerAlias(dst_reg, result_size),
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registerAlias(elem_reg, result_size),
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);
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}
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break :result .{ .register = dst_reg };
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} else {
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const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(result_ty, mod));
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const elem_size: u32 = @intCast(elem_ty.abiSize(mod));
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for (elements, 0..) |elem, elem_i| {
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const elem_mcv = try self.resolveInst(elem);
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const mat_elem_mcv = switch (elem_mcv) {
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.load_tlv => |sym_index| MCValue{ .lea_tlv = sym_index },
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else => elem_mcv,
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};
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const elem_off: i32 = @intCast(elem_size * elem_i);
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try self.genSetMem(.{ .frame = frame_index }, elem_off, elem_ty, mat_elem_mcv);
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}
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if (result_ty.sentinel(mod)) |sentinel| try self.genSetMem(
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.{ .frame = frame_index },
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@intCast(elem_size * elements.len),
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elem_ty,
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try self.genTypedValue(.{ .ty = elem_ty, .val = sentinel }),
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);
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break :result .{ .load_frame = .{ .index = frame_index } };
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}
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if (result_ty.sentinel(mod)) |sentinel| try self.genSetMem(
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.{ .frame = frame_index },
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@intCast(elem_size * elements.len),
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elem_ty,
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try self.genTypedValue(.{ .ty = elem_ty, .val = sentinel }),
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);
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break :result .{ .load_frame = .{ .index = frame_index } };
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},
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else => unreachable,
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}
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100
src/codegen.zig
100
src/codegen.zig
@ -391,53 +391,63 @@ pub fn generateSymbol(
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.vector_type => |vector_type| {
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const abi_size = math.cast(usize, typed_value.ty.abiSize(mod)) orelse
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return error.Overflow;
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switch (vector_type.child) {
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.bool_type => {
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const bytes = try code.addManyAsSlice(abi_size);
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@memset(bytes, 0xaa);
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var index: usize = 0;
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const len = math.cast(usize, vector_type.len) orelse return error.Overflow;
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while (index < len) : (index += 1) {
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const bit_index = switch (endian) {
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.big => len - 1 - index,
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.little => index,
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};
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const byte = &bytes[bit_index / 8];
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const mask = @as(u8, 1) << @truncate(bit_index);
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if (switch (switch (aggregate.storage) {
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.bytes => unreachable,
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.elems => |elems| elems[index],
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.repeated_elem => |elem| elem,
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}) {
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.bool_true => true,
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.bool_false => false,
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else => |elem| {
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assert(mod.intern_pool.indexToKey(elem).undef == .bool_type);
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continue;
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if (Type.fromInterned(vector_type.child).bitSize(mod) == 1) {
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const bytes = try code.addManyAsSlice(abi_size);
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@memset(bytes, 0xaa);
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var index: usize = 0;
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const len = math.cast(usize, vector_type.len) orelse return error.Overflow;
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while (index < len) : (index += 1) {
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const bit_index = switch (endian) {
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.big => len - 1 - index,
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.little => index,
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};
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const byte = &bytes[bit_index / 8];
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const mask = @as(u8, 1) << @truncate(bit_index);
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if (switch (switch (aggregate.storage) {
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.bytes => unreachable,
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.elems => |elems| elems[index],
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.repeated_elem => |elem| elem,
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}) {
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.bool_true => true,
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.bool_false => false,
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else => |elem| switch (mod.intern_pool.indexToKey(elem)) {
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.undef => continue,
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.int => |int| switch (int.storage) {
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.u64 => |x| switch (x) {
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0 => false,
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1 => true,
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else => unreachable,
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},
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.i64 => |x| switch (x) {
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-1 => true,
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0 => false,
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else => unreachable,
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},
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else => unreachable,
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},
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}) byte.* |= mask else byte.* &= ~mask;
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}
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},
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else => switch (aggregate.storage) {
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.bytes => |bytes| try code.appendSlice(bytes),
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.elems, .repeated_elem => {
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var index: u64 = 0;
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while (index < vector_type.len) : (index += 1) {
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switch (try generateSymbol(bin_file, src_loc, .{
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.ty = Type.fromInterned(vector_type.child),
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.val = Value.fromInterned(switch (aggregate.storage) {
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.bytes => unreachable,
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.elems => |elems| elems[
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math.cast(usize, index) orelse return error.Overflow
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],
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.repeated_elem => |elem| elem,
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}),
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}, code, debug_output, reloc_info)) {
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.ok => {},
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.fail => |em| return .{ .fail = em },
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}
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else => unreachable,
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},
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}) byte.* |= mask else byte.* &= ~mask;
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}
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} else switch (aggregate.storage) {
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.bytes => |bytes| try code.appendSlice(bytes),
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.elems, .repeated_elem => {
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var index: u64 = 0;
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while (index < vector_type.len) : (index += 1) {
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switch (try generateSymbol(bin_file, src_loc, .{
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.ty = Type.fromInterned(vector_type.child),
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.val = Value.fromInterned(switch (aggregate.storage) {
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.bytes => unreachable,
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.elems => |elems| elems[
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math.cast(usize, index) orelse return error.Overflow
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],
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.repeated_elem => |elem| elem,
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}),
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}, code, debug_output, reloc_info)) {
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.ok => {},
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.fail => |em| return .{ .fail = em },
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}
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},
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}
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},
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}
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@ -2420,7 +2420,6 @@ test "@intFromFloat on vector" {
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test "@intFromBool on vector" {
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if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
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