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update musl libc.S to v1.2.5

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adds loongarch64 and riscv32
This commit is contained in:
Andrew Kelley 2024-06-04 22:37:28 -07:00
parent 0098e650fb
commit 46b2f67905
2 changed files with 79 additions and 32 deletions
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37
lib/libc/musl/libc.S vendored
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@ -168,7 +168,7 @@ _IO_putc:
.weak _IO_putc_unlocked
.type _IO_putc_unlocked, %function;
_IO_putc_unlocked:
#if !defined(ARCH_riscv64) && !defined(ARCH_mips) && !defined(ARCH_mips64) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64)
#if !defined(ARCH_riscv64) && !defined(ARCH_mips) && !defined(ARCH_mips64) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64) && !defined(ARCH_riscv32) && !defined(ARCH_loongarch64)
.globl ___tls_get_addr
.type ___tls_get_addr, %function;
___tls_get_addr:
@ -187,7 +187,7 @@ __aio_suspend_time64:
.globl __assert_fail
.type __assert_fail, %function;
__assert_fail:
#if !defined(ARCH_riscv64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64)
#if !defined(ARCH_riscv64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64) && !defined(ARCH_riscv32) && !defined(ARCH_loongarch64)
.globl __cachectl
.type __cachectl, %function;
__cachectl:
@ -498,7 +498,7 @@ __localtime64:
.type __localtime64_r, %function;
__localtime64_r:
#endif
#if !defined(ARCH_mips) && !defined(ARCH_mips64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64)
#if !defined(ARCH_mips) && !defined(ARCH_mips64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64) && !defined(ARCH_loongarch64)
.globl __longjmp
.type __longjmp, %function;
__longjmp:
@ -576,17 +576,17 @@ __recvmmsg_time64:
.globl __res_state
.type __res_state, %function;
__res_state:
#if !defined(ARCH_mips) && !defined(ARCH_mips64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64)
#if !defined(ARCH_mips) && !defined(ARCH_mips64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64) && !defined(ARCH_riscv32) && !defined(ARCH_loongarch64)
.globl __restore
.type __restore, %function;
__restore:
#endif
#if !defined(ARCH_mips) && !defined(ARCH_mips64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64)
#if !defined(ARCH_mips) && !defined(ARCH_mips64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64) && !defined(ARCH_riscv32) && !defined(ARCH_loongarch64)
.globl __restore_rt
.type __restore_rt, %function;
__restore_rt:
#endif
#if !defined(ARCH_mips) && !defined(ARCH_mips64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64)
#if !defined(ARCH_mips) && !defined(ARCH_mips64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64) && !defined(ARCH_loongarch64)
.globl __riscv_flush_icache
.type __riscv_flush_icache, %function;
__riscv_flush_icache:
@ -796,7 +796,7 @@ _dl_debug_state:
.globl _dlstart
.type _dlstart, %function;
_dlstart:
#if !defined(ARCH_riscv64) && !defined(ARCH_mips) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64)
#if !defined(ARCH_riscv64) && !defined(ARCH_mips) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64) && !defined(ARCH_riscv32) && !defined(ARCH_loongarch64)
.globl _dlstart_data
.type _dlstart_data, %function;
_dlstart_data:
@ -807,7 +807,7 @@ _exit:
.weak _fini
.type _fini, %function;
_fini:
#if !defined(ARCH_riscv64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64)
#if !defined(ARCH_riscv64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64) && !defined(ARCH_riscv32) && !defined(ARCH_loongarch64)
.globl _flush_cache
.type _flush_cache, %function;
_flush_cache:
@ -908,7 +908,7 @@ aligned_alloc:
.globl alphasort
.type alphasort, %function;
alphasort:
#if !defined(ARCH_riscv64) && !defined(ARCH_mips) && !defined(ARCH_mips64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64)
#if !defined(ARCH_riscv64) && !defined(ARCH_mips) && !defined(ARCH_mips64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64) && !defined(ARCH_riscv32) && !defined(ARCH_loongarch64)
.globl arch_prctl
.type arch_prctl, %function;
arch_prctl:
@ -1033,12 +1033,12 @@ cabsf:
.globl cabsl
.type cabsl, %function;
cabsl:
#if !defined(ARCH_riscv64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64)
#if !defined(ARCH_riscv64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64) && !defined(ARCH_riscv32) && !defined(ARCH_loongarch64)
.weak cachectl
.type cachectl, %function;
cachectl:
#endif
#if !defined(ARCH_riscv64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64)
#if !defined(ARCH_riscv64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64) && !defined(ARCH_riscv32) && !defined(ARCH_loongarch64)
.weak cacheflush
.type cacheflush, %function;
cacheflush:
@ -2549,12 +2549,12 @@ insque:
.globl ioctl
.type ioctl, %function;
ioctl:
#if !defined(ARCH_riscv64) && !defined(ARCH_mips64) && !defined(ARCH_aarch64)
#if !defined(ARCH_riscv64) && !defined(ARCH_mips64) && !defined(ARCH_aarch64) && !defined(ARCH_riscv32) && !defined(ARCH_loongarch64)
.globl ioperm
.type ioperm, %function;
ioperm:
#endif
#if !defined(ARCH_riscv64) && !defined(ARCH_mips64) && !defined(ARCH_aarch64)
#if !defined(ARCH_riscv64) && !defined(ARCH_mips64) && !defined(ARCH_aarch64) && !defined(ARCH_riscv32) && !defined(ARCH_loongarch64)
.globl iopl
.type iopl, %function;
iopl:
@ -3435,6 +3435,9 @@ pread:
.globl preadv
.type preadv, %function;
preadv:
.globl preadv2
.type preadv2, %function;
preadv2:
.globl printf
.type printf, %function;
printf:
@ -3840,6 +3843,9 @@ pwrite:
.globl pwritev
.type pwritev, %function;
pwritev:
.globl pwritev2
.type pwritev2, %function;
pwritev2:
.globl qsort
.type qsort, %function;
qsort:
@ -3993,7 +3999,7 @@ rintf:
.globl rintl
.type rintl, %function;
rintl:
#if !defined(ARCH_mips) && !defined(ARCH_mips64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64)
#if !defined(ARCH_mips) && !defined(ARCH_mips64) && !defined(ARCH_x86) && !defined(ARCH_x86_64) && !defined(ARCH_powerpc) && !defined(ARCH_powerpc64) && !defined(ARCH_aarch64) && !defined(ARCH_loongarch64)
.weak riscv_flush_icache
.type riscv_flush_icache, %function;
riscv_flush_icache:
@ -4463,6 +4469,9 @@ statfs:
.globl statvfs
.type statvfs, %function;
statvfs:
.globl statx
.type statx, %function;
statx:
.globl stime
.type stime, %function;
stime:

74
tools/gen_stubs.zig
View File

@ -30,7 +30,9 @@ const elf = std.elf;
const native_endian = @import("builtin").target.cpu.arch.endian();
const inputs = .{
.riscv32,
.riscv64,
.loongarch64,
.mips,
.mips64,
.x86,
@ -581,15 +583,17 @@ fn parseElf(parse: Parse, comptime is_64: bool, comptime endian: builtin.Endian)
fn archIndex(arch: std.Target.Cpu.Arch) u8 {
return switch (arch) {
// zig fmt: off
.riscv64 => 0,
.mips => 1,
.mips64 => 2,
.x86 => 3,
.x86_64 => 4,
.powerpc => 5,
.powerpc64 => 6,
.aarch64 => 7,
else => unreachable,
.riscv64 => 0,
.mips => 1,
.mips64 => 2,
.x86 => 3,
.x86_64 => 4,
.powerpc => 5,
.powerpc64 => 6,
.aarch64 => 7,
.riscv32 => 8,
.loongarch64 => 9,
else => unreachable,
// zig fmt: on
};
}
@ -597,15 +601,17 @@ fn archIndex(arch: std.Target.Cpu.Arch) u8 {
fn archMuslName(arch: std.Target.Cpu.Arch) []const u8 {
return switch (arch) {
// zig fmt: off
.riscv64 => "riscv64",
.mips => "mips",
.mips64 => "mips64",
.x86 => "i386",
.x86_64 => "x86_64",
.powerpc => "powerpc",
.powerpc64 => "powerpc64",
.aarch64 => "aarch64",
else => unreachable,
.riscv64 => "riscv64",
.mips => "mips",
.mips64 => "mips64",
.x86 => "i386",
.x86_64 => "x86_64",
.powerpc => "powerpc",
.powerpc64 => "powerpc64",
.aarch64 => "aarch64",
.riscv32 => "riscv32",
.loongarch64 => "loongarch64",
else => unreachable,
// zig fmt: on
};
}
@ -693,6 +699,7 @@ const blacklisted_symbols = [_][]const u8{
"__ceilx",
"__clear_cache",
"__clzdi2",
"__chk_fail",
"__clzsi2",
"__clzti2",
"__cmpdf2",
@ -844,6 +851,10 @@ const blacklisted_symbols = [_][]const u8{
"__ltsf2",
"__lttf2",
"__ltxf2",
"__memcpy_chk",
"__memmove_chk",
"__memset",
"__memset_chk",
"__moddi3",
"__modsi3",
"__modti3",
@ -896,6 +907,10 @@ const blacklisted_symbols = [_][]const u8{
"__sinx",
"__sqrth",
"__sqrtx",
"__strcat_chk",
"__strcpy_chk",
"__strncat_chk",
"__strncpy_chk",
"__subdf3",
"__subkf3",
"__subodi4",
@ -940,24 +955,47 @@ const blacklisted_symbols = [_][]const u8{
"__unordtf2",
"__zig_probe_stack",
"ceilf128",
"ceilq",
"cosf128",
"cosq",
"exp2f128",
"exp2q",
"expf128",
"expq",
"fabsf128",
"fabsq",
"fabsq.2",
"fabsq.3",
"floorf128",
"floorq",
"fmaf128",
"fmaq",
"fmaxf128",
"fmaxq",
"fmaxq.2",
"fmaxq.3",
"fminf128",
"fminq",
"fmodf128",
"fmodq",
"log10f128",
"log10q",
"log2f128",
"log2q",
"logf128",
"logq",
"roundf128",
"roundq",
"sincosf128",
"sincosq",
"sinf128",
"sinq",
"sqrtf128",
"sqrtq",
"tanf128",
"tanq",
"truncf128",
"truncq",
"__aarch64_cas16_acq",
"__aarch64_cas16_acq_rel",
"__aarch64_cas16_rel",