diff --git a/src/arch/x86_64/Emit.zig b/src/arch/x86_64/Emit.zig index 5a7f2ef224..32699d35cb 100644 --- a/src/arch/x86_64/Emit.zig +++ b/src/arch/x86_64/Emit.zig @@ -177,12 +177,12 @@ fn encode(emit: *Emit, mnemonic: Instruction.Mnemonic, ops: struct { op3: Instruction.Operand = .none, op4: Instruction.Operand = .none, }) InnerError!void { - const inst = Instruction.new(mnemonic, .{ + const inst = try Instruction.new(mnemonic, .{ .op1 = ops.op1, .op2 = ops.op2, .op3 = ops.op3, .op4 = ops.op4, - }) catch unreachable; + }); return inst.encode(emit.code.writer()); } diff --git a/src/arch/x86_64/Encoding.zig b/src/arch/x86_64/Encoding.zig index 94f816eaa1..c6a8d044c3 100644 --- a/src/arch/x86_64/Encoding.zig +++ b/src/arch/x86_64/Encoding.zig @@ -121,7 +121,7 @@ pub fn findByMnemonic(mnemonic: Mnemonic, args: struct { .encoding = encoding, }; var cwriter = std.io.countingWriter(std.io.null_writer); - inst.encode(cwriter.writer()) catch unreachable; + inst.encode(cwriter.writer()) catch unreachable; // Not allowed to fail here unless OOM. return cwriter.bytes_written; } }; diff --git a/src/arch/x86_64/Mir.zig b/src/arch/x86_64/Mir.zig index 2f611258fd..3951108e3a 100644 --- a/src/arch/x86_64/Mir.zig +++ b/src/arch/x86_64/Mir.zig @@ -24,9 +24,6 @@ instructions: std.MultiArrayList(Inst).Slice, /// The meaning of this data is determined by `Inst.Tag` value. extra: []const u32, -pub const Mnemonic = encoder.Instruction.Mnemonic; -pub const Operand = encoder.Instruction.Operand; - pub const Inst = struct { tag: Tag, ops: Ops, @@ -69,8 +66,6 @@ pub const Inst = struct { imul, /// int3, - /// Conditional jump - jcc, /// Jump jmp, /// Load effective address @@ -99,8 +94,6 @@ pub const Inst = struct { sar, /// Integer subtraction with borrow sbb, - /// Set byte on condition - setcc, /// Logical shift left shl, /// Logical shift right @@ -135,6 +128,10 @@ pub const Inst = struct { /// Conditional move cmovcc, + /// Conditional jump + jcc, + /// Set byte on condition + setcc, /// Mov absolute to/from memory wrt segment register to/from rax mov_moffs, diff --git a/src/arch/x86_64/bits.zig b/src/arch/x86_64/bits.zig index d974070e5d..043e589af4 100644 --- a/src/arch/x86_64/bits.zig +++ b/src/arch/x86_64/bits.zig @@ -242,13 +242,6 @@ pub const Register = enum(u7) { }; } - pub fn isRexInvalid(reg: Register) bool { - return switch (@enumToInt(reg)) { - @enumToInt(Register.ah)...@enumToInt(Register.bh) => true, - else => false, - }; - } - pub fn enc(reg: Register) u4 { const base = switch (@enumToInt(reg)) { // zig fmt: off diff --git a/src/arch/x86_64/encoder.zig b/src/arch/x86_64/encoder.zig index 292b61ee21..9206b621bc 100644 --- a/src/arch/x86_64/encoder.zig +++ b/src/arch/x86_64/encoder.zig @@ -1,5 +1,6 @@ const std = @import("std"); const assert = std.debug.assert; +const log = std.log.scoped(.x86_64_encoder); const math = std.math; const bits = @import("bits.zig"); @@ -106,7 +107,7 @@ pub const Instruction = struct { .op3 = args.op3, .op4 = args.op4, })) orelse { - std.log.warn("{s} {s} {s} {s} {s}", .{ + log.debug("no encoding found for: {s} {s} {s} {s} {s}", .{ @tagName(mnemonic), @tagName(Encoding.Op.fromOperand(args.op1)), @tagName(Encoding.Op.fromOperand(args.op2)), @@ -115,7 +116,7 @@ pub const Instruction = struct { }); return error.InvalidInstruction; }; - std.log.debug("{}", .{encoding}); + log.debug("selected encoding: {}", .{encoding}); return .{ .op1 = args.op1, .op2 = args.op2,