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https://github.com/ziglang/zig.git
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stage2: sparcv9: Add breakpoint, ret, and calling mechanism
This commit is contained in:
Koakuma
parent
1972a2b080
commit
42f4bd3421
@ -453,7 +453,7 @@ fn genBody(self: *Self, body: []const Air.Inst.Index) InnerError!void {
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.bitcast => @panic("TODO try self.airBitCast(inst)"),
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.block => try self.airBlock(inst),
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.br => @panic("TODO try self.airBr(inst)"),
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.breakpoint => @panic("TODO try self.airBreakpoint()"),
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.breakpoint => try self.airBreakpoint(),
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.ret_addr => @panic("TODO try self.airRetAddr(inst)"),
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.frame_addr => @panic("TODO try self.airFrameAddress(inst)"),
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.fence => @panic("TODO try self.airFence()"),
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@ -476,7 +476,7 @@ fn genBody(self: *Self, body: []const Air.Inst.Index) InnerError!void {
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.loop => @panic("TODO try self.airLoop(inst)"),
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.not => @panic("TODO try self.airNot(inst)"),
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.ptrtoint => @panic("TODO try self.airPtrToInt(inst)"),
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.ret => @panic("TODO try self.airRet(inst)"),
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.ret => try self.airRet(inst),
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.ret_load => try self.airRetLoad(inst),
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.store => try self.airStore(inst),
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.struct_field_ptr=> @panic("TODO try self.airStructFieldPtr(inst)"),
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@ -667,6 +667,21 @@ fn airBlock(self: *Self, inst: Air.Inst.Index) !void {
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return self.finishAir(inst, result, .{ .none, .none, .none });
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}
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fn airBreakpoint(self: *Self) !void {
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// ta 0x01
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_ = try self.addInst(.{
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.tag = .tcc,
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.data = .{
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.trap = .{
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.is_imm = true,
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.cond = 0b1000, // TODO need to look into changing this into an enum
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.rs2_or_imm = .{ .imm = 0x01 },
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},
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},
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});
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return self.finishAirBookkeeping();
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}
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fn airCall(self: *Self, inst: Air.Inst.Index, modifier: std.builtin.CallOptions.Modifier) !void {
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if (modifier == .always_tail) return self.fail("TODO implement tail calls for {}", .{self.target.cpu.arch});
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@ -695,10 +710,6 @@ fn airCall(self: *Self, inst: Air.Inst.Index, modifier: std.builtin.CallOptions.
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.unreach => unreachable,
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.dead => unreachable,
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.memory => unreachable,
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.compare_flags_signed => unreachable,
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.compare_flags_unsigned => unreachable,
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.got_load => unreachable,
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.direct_load => unreachable,
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.register => |reg| {
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try self.register_manager.getReg(reg, null);
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try self.genSetReg(arg_ty, reg, arg_mcv);
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@ -712,6 +723,44 @@ fn airCall(self: *Self, inst: Air.Inst.Index, modifier: std.builtin.CallOptions.
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}
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}
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// Due to incremental compilation, how function calls are generated depends
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// on linking.
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if (self.air.value(callee)) |func_value| {
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if (self.bin_file.tag == link.File.Elf.base_tag) {
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if (func_value.castTag(.function)) |func_payload| {
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const func = func_payload.data;
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const ptr_bits = self.target.cpu.arch.ptrBitWidth();
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const ptr_bytes: u64 = @divExact(ptr_bits, 8);
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const got_addr = if (self.bin_file.cast(link.File.Elf)) |elf_file| blk: {
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const got = &elf_file.program_headers.items[elf_file.phdr_got_index.?];
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break :blk @intCast(u32, got.p_vaddr + func.owner_decl.link.elf.offset_table_index * ptr_bytes);
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} else unreachable;
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try self.genSetReg(Type.initTag(.usize), .o7, .{ .memory = got_addr });
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_ = try self.addInst(.{
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.tag = .jmpl,
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.data = .{ .branch_link_indirect = .{ .reg = .o7 } },
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});
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} else if (func_value.castTag(.extern_fn)) |_| {
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return self.fail("TODO implement calling extern functions", .{});
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} else {
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return self.fail("TODO implement calling bitcasted functions", .{});
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}
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} else @panic("TODO SPARCv9 currently does not support non-ELF binaries");
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} else {
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assert(ty.zigTypeTag() == .Pointer);
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const mcv = try self.resolveInst(callee);
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try self.genSetReg(ty, .o7, mcv);
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_ = try self.addInst(.{
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.tag = .jmpl,
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.data = .{ .branch_link_indirect = .{ .reg = .o7 } },
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});
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}
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// TODO handle return value
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return self.fail("TODO implement call for {}", .{self.target.cpu.arch});
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}
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@ -759,8 +808,17 @@ fn airDiv(self: *Self, inst: Air.Inst.Index) !void {
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return self.finishAir(inst, result, .{ bin_op.lhs, bin_op.rhs, .none });
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}
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fn airRet(self: *Self, inst: Air.Inst.Index) !void {
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const un_op = self.air.instructions.items(.data)[inst].un_op;
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const operand = try self.resolveInst(un_op);
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try self.ret(operand);
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return self.finishAir(inst, .dead, .{ un_op, .none, .none });
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}
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fn airRetLoad(self: *Self, inst: Air.Inst.Index) !void {
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_ = inst;
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const un_op = self.air.instructions.items(.data)[inst].un_op;
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const ptr = try self.resolveInst(un_op);
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_ = ptr;
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return self.fail("TODO implement airRetLoad for {}", .{self.target.cpu.arch});
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//return self.finishAir(inst, .dead, .{ un_op, .none, .none });
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}
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@ -832,6 +890,37 @@ fn allocMemPtr(self: *Self, inst: Air.Inst.Index) !u32 {
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return self.allocMem(inst, abi_size, abi_align);
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}
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fn allocRegOrMem(self: *Self, inst: Air.Inst.Index, reg_ok: bool) !MCValue {
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const elem_ty = self.air.typeOfIndex(inst);
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const target = self.target.*;
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const abi_size = math.cast(u32, elem_ty.abiSize(self.target.*)) catch {
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return self.fail("type '{}' too big to fit into stack frame", .{elem_ty.fmt(target)});
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};
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const abi_align = elem_ty.abiAlignment(self.target.*);
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if (abi_align > self.stack_align)
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self.stack_align = abi_align;
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if (reg_ok) {
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// Make sure the type can fit in a register before we try to allocate one.
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if (abi_size <= 8) {
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if (self.register_manager.tryAllocReg(inst)) |reg| {
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return MCValue{ .register = reg };
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}
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}
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}
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const stack_offset = try self.allocMem(inst, abi_size, abi_align);
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return MCValue{ .stack_offset = stack_offset };
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}
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/// Copies a value to a register without tracking the register. The register is not considered
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/// allocated. A second call to `copyToTmpRegister` may return the same register.
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/// This can have a side effect of spilling instructions to the stack to free up a register.
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fn copyToTmpRegister(self: *Self, ty: Type, mcv: MCValue) !Register {
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const reg = try self.register_manager.allocReg(null);
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try self.genSetReg(ty, reg, mcv);
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return reg;
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}
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fn ensureProcessDeathCapacity(self: *Self, additional_count: usize) !void {
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const table = &self.branch_stack.items[self.branch_stack.items.len - 1].inst_table;
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try table.ensureUnusedCapacity(self.gpa, additional_count);
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@ -885,37 +974,216 @@ fn finishAir(self: *Self, inst: Air.Inst.Index, result: MCValue, operands: [Live
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self.finishAirBookkeeping();
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}
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fn genLoad(self: *Self, value_reg: Register, addr_reg: Register, off: i13, abi_size: u64) !void {
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_ = value_reg;
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_ = addr_reg;
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_ = off;
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switch (abi_size) {
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1, 2, 4, 8 => return self.fail("TODO: A.27 Load Integer", .{}),
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3, 5, 6, 7 => return self.fail("TODO: genLoad for more abi_sizes", .{}),
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else => unreachable,
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}
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}
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fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void {
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switch (mcv) {
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.dead => unreachable,
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.unreach, .none => return, // Nothing to do.
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.undef => {
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if (!self.wantSafety())
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return; // The already existing value will do just fine.
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// Write the debug undefined value.
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return self.genSetReg(ty, reg, .{ .immediate = 0xaaaaaaaaaaaaaaaa });
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},
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.ptr_stack_offset => |off| {
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const simm13 = math.cast(u12, off) catch
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return self.fail("TODO larger stack offsets", .{});
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_ = try self.addInst(.{
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.tag = .add,
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.data = .{
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.arithmetic_3op = .{
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.is_imm = true,
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.rd = reg,
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.rs1 = .sp,
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.rs2_or_imm = .{ .imm = simm13 },
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},
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},
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});
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},
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.immediate => |x| {
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if (x <= math.maxInt(u12)) {
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_ = try self.addInst(.{
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.tag = .@"or",
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.data = .{
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.arithmetic_3op = .{
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.is_imm = true,
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.rd = reg,
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.rs1 = .g0,
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.rs2_or_imm = .{ .imm = @truncate(u12, x) },
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},
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},
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});
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} else if (x <= math.maxInt(u32)) {
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_ = try self.addInst(.{
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.tag = .sethi,
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.data = .{
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.sethi = .{
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.rd = reg,
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.imm = @truncate(u22, x >> 10),
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},
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},
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});
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_ = try self.addInst(.{
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.tag = .@"or",
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.data = .{
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.arithmetic_3op = .{
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.is_imm = true,
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.rd = reg,
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.rs1 = reg,
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.rs2_or_imm = .{ .imm = @truncate(u10, x) },
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},
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},
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});
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} else if (x <= math.maxInt(u44)) {
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try self.genSetReg(ty, reg, .{ .immediate = @truncate(u32, x >> 12) });
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_ = try self.addInst(.{
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.tag = .sllx,
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.data = .{
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.shift = .{
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.is_imm = true,
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.width = .shift64,
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.rd = reg,
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.rs1 = reg,
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.rs2_or_imm = .{ .imm = 12 },
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},
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},
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});
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_ = try self.addInst(.{
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.tag = .@"or",
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.data = .{
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.arithmetic_3op = .{
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.is_imm = true,
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.rd = reg,
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.rs1 = reg,
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.rs2_or_imm = .{ .imm = @truncate(u12, x) },
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},
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},
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});
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} else {
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// Need to allocate a temporary register to load 64-bit immediates.
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const tmp_reg = try self.register_manager.allocReg(null);
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try self.genSetReg(ty, tmp_reg, .{ .immediate = @truncate(u32, x) });
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try self.genSetReg(ty, reg, .{ .immediate = @truncate(u32, x >> 32) });
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_ = try self.addInst(.{
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.tag = .sllx,
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.data = .{
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.shift = .{
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.is_imm = true,
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.width = .shift64,
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.rd = reg,
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.rs1 = reg,
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.rs2_or_imm = .{ .imm = 32 },
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},
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},
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});
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_ = try self.addInst(.{
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.tag = .@"or",
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.data = .{
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.arithmetic_3op = .{
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.is_imm = false,
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.rd = reg,
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.rs1 = reg,
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.rs2_or_imm = .{ .rs2 = tmp_reg },
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},
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},
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});
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}
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},
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.register => |src_reg| {
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// If the registers are the same, nothing to do.
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if (src_reg.id() == reg.id())
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return;
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// or %g0, src, dst (aka mov src, dst)
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_ = try self.addInst(.{
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.tag = .@"or",
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.data = .{
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.arithmetic_3op = .{
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.is_imm = false,
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.rd = reg,
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.rs1 = .g0,
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.rs2_or_imm = .{ .rs2 = src_reg },
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},
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},
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});
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},
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.memory => |addr| {
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// The value is in memory at a hard-coded address.
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// If the type is a pointer, it means the pointer address is at this memory location.
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try self.genSetReg(ty, reg, .{ .immediate = addr });
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try self.genLoad(reg, reg, 0, ty.abiSize(self.target.*));
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},
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.stack_offset => |off| {
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const simm13 = math.cast(u12, off) catch
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return self.fail("TODO larger stack offsets", .{});
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try self.genLoad(reg, .sp, simm13, ty.abiSize(self.target.*));
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},
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}
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}
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fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerError!void {
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const abi_size = ty.abiSize(self.target.*);
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switch (mcv) {
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.dead => unreachable,
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.unreach, .none => return, // Nothing to do.
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.undef => {
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if (!self.wantSafety())
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return; // The already existing value will do just fine.
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// TODO Upgrade this to a memset call when we have that available.
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switch (ty.abiSize(self.target.*)) {
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1 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaa }),
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2 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaa }),
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4 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaaaaaa }),
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8 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaaaaaaaaaaaaaa }),
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else => return self.fail("TODO implement memset", .{}),
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}
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},
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.immediate,
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.ptr_stack_offset,
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=> {
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const reg = try self.copyToTmpRegister(ty, mcv);
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return self.genSetStack(ty, stack_offset, MCValue{ .register = reg });
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},
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.register => return self.fail("TODO implement storing types abi_size={}", .{abi_size}),
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.memory, .stack_offset => return self.fail("TODO implement memcpy", .{}),
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}
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}
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fn genTypedValue(self: *Self, typed_value: TypedValue) InnerError!MCValue {
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if (typed_value.val.isUndef())
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return MCValue{ .undef = {} };
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if (typed_value.val.castTag(.decl_ref)) |payload| {
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return self.lowerDeclRef(typed_value, payload.data);
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_ = payload;
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return self.fail("TODO implement lowerDeclRef", .{});
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// return self.lowerDeclRef(typed_value, payload.data);
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}
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if (typed_value.val.castTag(.decl_ref_mut)) |payload| {
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return self.lowerDeclRef(typed_value, payload.data.decl);
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_ = payload;
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return self.fail("TODO implement lowerDeclRef", .{});
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// return self.lowerDeclRef(typed_value, payload.data.decl);
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}
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const target = self.target.*;
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switch (typed_value.ty.zigTypeTag()) {
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.Pointer => switch (typed_value.ty.ptrSize()) {
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.Slice => {
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return self.lowerUnnamedConst(typed_value);
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},
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else => {
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switch (typed_value.val.tag()) {
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.int_u64 => {
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return MCValue{ .immediate = typed_value.val.toUnsignedInt(target) };
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},
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.slice => {
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return self.lowerUnnamedConst(typed_value);
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},
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else => {
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return self.fail("TODO codegen more kinds of const pointers: {}", .{typed_value.val.tag()});
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},
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}
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},
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},
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.Int => {
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const info = typed_value.ty.intInfo(self.target.*);
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if (info.bits <= 64) {
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@ -929,83 +1197,11 @@ fn genTypedValue(self: *Self, typed_value: TypedValue) InnerError!MCValue {
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return MCValue{ .immediate = unsigned };
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} else {
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return self.lowerUnnamedConst(typed_value);
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return self.fail("TODO implement int genTypedValue of > 64 bits", .{});
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}
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},
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.Bool => {
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return MCValue{ .immediate = @boolToInt(typed_value.val.toBool()) };
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},
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.ComptimeInt => unreachable, // semantic analysis prevents this
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.ComptimeFloat => unreachable, // semantic analysis prevents this
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.Optional => {
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if (typed_value.ty.isPtrLikeOptional()) {
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if (typed_value.val.isNull())
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return MCValue{ .immediate = 0 };
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var buf: Type.Payload.ElemType = undefined;
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return self.genTypedValue(.{
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.ty = typed_value.ty.optionalChild(&buf),
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.val = typed_value.val,
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});
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} else if (typed_value.ty.abiSize(self.target.*) == 1) {
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return MCValue{ .immediate = @boolToInt(typed_value.val.isNull()) };
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}
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return self.fail("TODO non pointer optionals", .{});
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},
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.Enum => {
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if (typed_value.val.castTag(.enum_field_index)) |field_index| {
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switch (typed_value.ty.tag()) {
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.enum_simple => {
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return MCValue{ .immediate = field_index.data };
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},
|
||||
.enum_full, .enum_nonexhaustive => {
|
||||
const enum_full = typed_value.ty.cast(Type.Payload.EnumFull).?.data;
|
||||
if (enum_full.values.count() != 0) {
|
||||
const tag_val = enum_full.values.keys()[field_index.data];
|
||||
return self.genTypedValue(.{ .ty = enum_full.tag_ty, .val = tag_val });
|
||||
} else {
|
||||
return MCValue{ .immediate = field_index.data };
|
||||
}
|
||||
},
|
||||
else => unreachable,
|
||||
}
|
||||
} else {
|
||||
var int_tag_buffer: Type.Payload.Bits = undefined;
|
||||
const int_tag_ty = typed_value.ty.intTagType(&int_tag_buffer);
|
||||
return self.genTypedValue(.{ .ty = int_tag_ty, .val = typed_value.val });
|
||||
}
|
||||
},
|
||||
.ErrorSet => {
|
||||
const err_name = typed_value.val.castTag(.@"error").?.data.name;
|
||||
const module = self.bin_file.options.module.?;
|
||||
const global_error_set = module.global_error_set;
|
||||
const error_index = global_error_set.get(err_name).?;
|
||||
return MCValue{ .immediate = error_index };
|
||||
},
|
||||
.ErrorUnion => {
|
||||
const error_type = typed_value.ty.errorUnionSet();
|
||||
const payload_type = typed_value.ty.errorUnionPayload();
|
||||
|
||||
if (typed_value.val.castTag(.eu_payload)) |pl| {
|
||||
if (!payload_type.hasRuntimeBits()) {
|
||||
// We use the error type directly as the type.
|
||||
return MCValue{ .immediate = 0 };
|
||||
}
|
||||
|
||||
_ = pl;
|
||||
return self.fail("TODO implement error union const of type '{}' (non-error)", .{typed_value.ty.fmtDebug()});
|
||||
} else {
|
||||
if (!payload_type.hasRuntimeBits()) {
|
||||
// We use the error type directly as the type.
|
||||
return self.genTypedValue(.{ .ty = error_type, .val = typed_value.val });
|
||||
}
|
||||
|
||||
return self.fail("TODO implement error union const of type '{}' (error)", .{typed_value.ty.fmtDebug()});
|
||||
}
|
||||
},
|
||||
.Struct => {
|
||||
return self.lowerUnnamedConst(typed_value);
|
||||
},
|
||||
else => return self.fail("TODO implement const of type '{}'", .{typed_value.ty.fmtDebug()}),
|
||||
}
|
||||
}
|
||||
@ -1171,6 +1367,18 @@ fn resolveInst(self: *Self, inst: Air.Inst.Ref) InnerError!MCValue {
|
||||
}
|
||||
}
|
||||
|
||||
fn ret(self: *Self, mcv: MCValue) !void {
|
||||
const ret_ty = self.fn_type.fnReturnType();
|
||||
try self.setRegOrMem(ret_ty, self.ret_mcv, mcv);
|
||||
|
||||
// Just add space for an instruction, patch this later
|
||||
const index = try self.addInst(.{
|
||||
.tag = .nop,
|
||||
.data = .{ .nop = {} },
|
||||
});
|
||||
try self.exitlude_jump_relocs.append(self.gpa, index);
|
||||
}
|
||||
|
||||
fn reuseOperand(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, op_index: Liveness.OperandInt, mcv: MCValue) bool {
|
||||
if (!self.liveness.operandDies(inst, op_index))
|
||||
return false;
|
||||
@ -1201,3 +1409,36 @@ fn reuseOperand(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, op_ind
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/// Sets the value without any modifications to register allocation metadata or stack allocation metadata.
|
||||
fn setRegOrMem(self: *Self, ty: Type, loc: MCValue, val: MCValue) !void {
|
||||
switch (loc) {
|
||||
.none => return,
|
||||
.register => |reg| return self.genSetReg(ty, reg, val),
|
||||
.stack_offset => |off| return self.genSetStack(ty, off, val),
|
||||
.memory => {
|
||||
return self.fail("TODO implement setRegOrMem for memory", .{});
|
||||
},
|
||||
else => unreachable,
|
||||
}
|
||||
}
|
||||
|
||||
pub fn spillInstruction(self: *Self, reg: Register, inst: Air.Inst.Index) !void {
|
||||
const stack_mcv = try self.allocRegOrMem(inst, false);
|
||||
log.debug("spilling {d} to stack mcv {any}", .{ inst, stack_mcv });
|
||||
const reg_mcv = self.getResolvedInstValue(inst);
|
||||
assert(reg == reg_mcv.register);
|
||||
const branch = &self.branch_stack.items[self.branch_stack.items.len - 1];
|
||||
try branch.inst_table.put(self.gpa, inst, stack_mcv);
|
||||
try self.genSetStack(self.air.typeOfIndex(inst), stack_mcv.stack_offset, reg_mcv);
|
||||
}
|
||||
|
||||
/// TODO support scope overrides. Also note this logic is duplicated with `Module.wantSafety`.
|
||||
fn wantSafety(self: *Self) bool {
|
||||
return switch (self.bin_file.options.optimize_mode) {
|
||||
.Debug => true,
|
||||
.ReleaseSafe => true,
|
||||
.ReleaseFast => false,
|
||||
.ReleaseSmall => false,
|
||||
};
|
||||
}
|
||||
|
||||
@ -47,11 +47,16 @@ pub fn emitMir(
|
||||
.dbg_prologue_end => try emit.mirDebugPrologueEnd(),
|
||||
.dbg_epilogue_begin => try emit.mirDebugEpilogueBegin(),
|
||||
|
||||
.add => @panic("TODO implement sparcv9 add"),
|
||||
|
||||
.bpcc => @panic("TODO implement sparcv9 bpcc"),
|
||||
|
||||
.call => @panic("TODO implement sparcv9 call"),
|
||||
|
||||
.jmpl => @panic("TODO implement sparcv9 jmpl"),
|
||||
.jmpl_i => @panic("TODO implement sparcv9 jmpl to reg"),
|
||||
|
||||
.@"or" => @panic("TODO implement sparcv9 or"),
|
||||
|
||||
.nop => @panic("TODO implement sparcv9 nop"),
|
||||
|
||||
@ -59,6 +64,14 @@ pub fn emitMir(
|
||||
|
||||
.save => @panic("TODO implement sparcv9 save"),
|
||||
.restore => @panic("TODO implement sparcv9 restore"),
|
||||
|
||||
.sethi => @panic("TODO implement sparcv9 sethi"),
|
||||
|
||||
.sllx => @panic("TODO implement sparcv9 sllx"),
|
||||
|
||||
.sub => @panic("TODO implement sparcv9 sub"),
|
||||
|
||||
.tcc => @panic("TODO implement sparcv9 tcc"),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -40,6 +40,11 @@ pub const Inst = struct {
|
||||
// All the real instructions are ordered by their section number
|
||||
// in The SPARC Architecture Manual, Version 9.
|
||||
|
||||
/// A.2 Add
|
||||
/// Those uses the arithmetic_3op field.
|
||||
// TODO add other operations.
|
||||
add,
|
||||
|
||||
/// A.7 Branch on Integer Condition Codes with Prediction (BPcc)
|
||||
/// It uses the branch_predict field.
|
||||
bpcc,
|
||||
@ -49,8 +54,16 @@ pub const Inst = struct {
|
||||
call,
|
||||
|
||||
/// A.24 Jump and Link
|
||||
/// It uses the branch_link field.
|
||||
/// jmpl (far direct jump) uses the branch_link field,
|
||||
/// while jmpl_i (indirect jump) uses the branch_link_indirect field.
|
||||
/// Those two MIR instructions will be lowered into SPARCv9 jmpl instruction.
|
||||
jmpl,
|
||||
jmpl_i,
|
||||
|
||||
/// A.31 Logical Operations
|
||||
/// Those uses the arithmetic_3op field.
|
||||
// TODO add other operations.
|
||||
@"or",
|
||||
|
||||
/// A.40 No Operation
|
||||
/// It uses the nop field.
|
||||
@ -64,6 +77,24 @@ pub const Inst = struct {
|
||||
/// Those uses the arithmetic_3op field.
|
||||
save,
|
||||
restore,
|
||||
|
||||
/// A.48 SETHI
|
||||
/// It uses the sethi field.
|
||||
sethi,
|
||||
|
||||
/// A.49 Shift
|
||||
/// Those uses the shift field.
|
||||
// TODO add other operations.
|
||||
sllx,
|
||||
|
||||
/// A.56 Subtract
|
||||
/// Those uses the arithmetic_3op field.
|
||||
// TODO add other operations.
|
||||
sub,
|
||||
|
||||
/// A.61 Trap on Integer Condition Codes (Tcc)
|
||||
/// It uses the trap field.
|
||||
tcc,
|
||||
};
|
||||
|
||||
/// The position of an MIR instruction within the `Mir` instructions array.
|
||||
@ -72,6 +103,7 @@ pub const Inst = struct {
|
||||
/// All instructions have a 8-byte payload, which is contained within
|
||||
/// this union. `Tag` determines which union field is active, as well as
|
||||
/// how to interpret the data within.
|
||||
// TODO this is a quick-n-dirty solution that needs to be cleaned up.
|
||||
pub const Data = union {
|
||||
/// Debug info: argument
|
||||
///
|
||||
@ -122,14 +154,21 @@ pub const Inst = struct {
|
||||
/// Used by e.g. call
|
||||
branch_link: struct {
|
||||
inst: Index,
|
||||
link: Register,
|
||||
link: Register = .o7,
|
||||
},
|
||||
|
||||
/// Indirect branch and link (always unconditional).
|
||||
/// Used by e.g. jmpl_i
|
||||
branch_link_indirect: struct {
|
||||
reg: Register,
|
||||
link: Register = .o7,
|
||||
},
|
||||
|
||||
/// Branch with prediction.
|
||||
/// Used by e.g. bpcc
|
||||
branch_predict: struct {
|
||||
annul: bool,
|
||||
pt: bool,
|
||||
pt: bool = true,
|
||||
ccr: Instruction.CCR,
|
||||
cond: Instruction.Condition,
|
||||
inst: Index,
|
||||
@ -139,6 +178,46 @@ pub const Inst = struct {
|
||||
///
|
||||
/// Used by e.g. flushw
|
||||
nop: void,
|
||||
|
||||
/// SETHI operands.
|
||||
///
|
||||
/// Used by sethi
|
||||
sethi: struct {
|
||||
rd: Register,
|
||||
imm: u22,
|
||||
},
|
||||
|
||||
/// Shift operands.
|
||||
/// if is_imm true then it uses the imm field of rs2_or_imm,
|
||||
/// otherwise it uses rs2 field.
|
||||
///
|
||||
/// Used by e.g. add, sub
|
||||
shift: struct {
|
||||
is_imm: bool,
|
||||
width: Instruction.ShiftWidth,
|
||||
rd: Register,
|
||||
rs1: Register,
|
||||
rs2_or_imm: union {
|
||||
rs2: Register,
|
||||
imm: u6,
|
||||
},
|
||||
},
|
||||
|
||||
/// Trap.
|
||||
/// if is_imm true then it uses the imm field of rs2_or_imm,
|
||||
/// otherwise it uses rs2 field.
|
||||
///
|
||||
/// Used by e.g. tcc
|
||||
trap: struct {
|
||||
is_imm: bool = true,
|
||||
cond: Instruction.Condition,
|
||||
ccr: Instruction.CCR = .icc,
|
||||
rs1: Register = .g0,
|
||||
rs2_or_imm: union {
|
||||
rs2: Register,
|
||||
imm: u8,
|
||||
},
|
||||
},
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user