From 77ca77cf144e3f7e8be53b6e4220a4efc313628b Mon Sep 17 00:00:00 2001 From: joachimschmidt557 Date: Fri, 7 Jan 2022 22:52:52 +0100 Subject: [PATCH 1/3] stage2 ARM: make Mir.Inst.cond = .al default --- src/arch/arm/CodeGen.zig | 59 ---------------------------------------- src/arch/arm/Mir.zig | 2 +- 2 files changed, 1 insertion(+), 60 deletions(-) diff --git a/src/arch/arm/CodeGen.zig b/src/arch/arm/CodeGen.zig index cbd75cc192..9fbd661f02 100644 --- a/src/arch/arm/CodeGen.zig +++ b/src/arch/arm/CodeGen.zig @@ -338,7 +338,6 @@ fn addInst(self: *Self, inst: Mir.Inst) error{OutOfMemory}!Mir.Inst.Index { fn addNop(self: *Self) error{OutOfMemory}!Mir.Inst.Index { return try self.addInst(.{ .tag = .nop, - .cond = .al, .data = .{ .nop = {} }, }); } @@ -371,7 +370,6 @@ fn gen(self: *Self) !void { // mov fp, sp _ = try self.addInst(.{ .tag = .mov, - .cond = .al, .data = .{ .rr_op = .{ .rd = .fp, .rn = .r0, @@ -405,7 +403,6 @@ fn gen(self: *Self) !void { self.mir_instructions.set(push_reloc, .{ .tag = .push, - .cond = .al, .data = .{ .register_list = saved_regs }, }); @@ -416,7 +413,6 @@ fn gen(self: *Self) !void { if (Instruction.Operand.fromU32(stack_size)) |op| { self.mir_instructions.set(sub_reloc, .{ .tag = .sub, - .cond = .al, .data = .{ .rr_op = .{ .rd = .sp, .rn = .sp, .op = op } }, }); } else { @@ -440,7 +436,6 @@ fn gen(self: *Self) !void { } else for (self.exitlude_jump_relocs.items) |jmp_reloc| { self.mir_instructions.set(jmp_reloc, .{ .tag = .b, - .cond = .al, .data = .{ .inst = @intCast(u32, self.mir_instructions.len) }, }); } @@ -452,7 +447,6 @@ fn gen(self: *Self) !void { // mov sp, fp _ = try self.addInst(.{ .tag = .mov, - .cond = .al, .data = .{ .rr_op = .{ .rd = .sp, .rn = .r0, @@ -463,7 +457,6 @@ fn gen(self: *Self) !void { // pop {fp, pc} _ = try self.addInst(.{ .tag = .pop, - .cond = .al, .data = .{ .register_list = saved_regs }, }); } else { @@ -1251,7 +1244,6 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void { _ = try self.addInst(.{ .tag = tag, - .cond = .al, .data = .{ .rr_offset = .{ .rt = dst_reg, .rn = base_mcv.register, @@ -1262,7 +1254,6 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void { 2 => { _ = try self.addInst(.{ .tag = .ldrh, - .cond = .al, .data = .{ .rr_extra_offset = .{ .rt = dst_reg, .rn = base_mcv.register, @@ -1406,7 +1397,6 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo .register => |dst_reg| { _ = try self.addInst(.{ .tag = .ldr, - .cond = .al, .data = .{ .rr_offset = .{ .rt = dst_reg, .rn = reg, @@ -1430,7 +1420,6 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo const tmp_regs = try self.register_manager.allocRegs(2, .{ null, null }, &.{reg}); _ = try self.addInst(.{ .tag = .ldr, - .cond = .al, .data = .{ .rr_offset = .{ .rt = tmp_regs[0], .rn = reg, @@ -1439,7 +1428,6 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo }); _ = try self.addInst(.{ .tag = .ldr, - .cond = .al, .data = .{ .rr_offset = .{ .rt = tmp_regs[1], .rn = reg, @@ -1465,7 +1453,6 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo }; _ = try self.addInst(.{ .tag = .sub, - .cond = .al, .data = .{ .rr_op = .{ .rd = dst_reg, .rn = .fp, @@ -1479,7 +1466,6 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo }; _ = try self.addInst(.{ .tag = .mov, - .cond = .al, .data = .{ .rr_op = .{ .rd = len_reg, .rn = .r0, @@ -1560,7 +1546,6 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type .register => |value_reg| { _ = try self.addInst(.{ .tag = .str, - .cond = .al, .data = .{ .rr_offset = .{ .rt = value_reg, .rn = addr_reg, @@ -1866,7 +1851,6 @@ fn genArmBinOpCode( _ = try self.addInst(.{ .tag = tag, - .cond = .al, .data = .{ .rr_op = .{ .rd = dst_reg, .rn = op1, @@ -1879,7 +1863,6 @@ fn genArmBinOpCode( _ = try self.addInst(.{ .tag = tag, - .cond = .al, .data = .{ .rr_op = .{ .rd = dst_reg, .rn = op1, @@ -1890,7 +1873,6 @@ fn genArmBinOpCode( .cmp_eq => { _ = try self.addInst(.{ .tag = .cmp, - .cond = .al, .data = .{ .rr_op = .{ .rd = .r0, .rn = op1, @@ -1916,7 +1898,6 @@ fn genArmBinOpCode( _ = try self.addInst(.{ .tag = tag, - .cond = .al, .data = .{ .rr_shift = .{ .rd = dst_reg, .rm = op1, @@ -1993,7 +1974,6 @@ fn genArmMul(self: *Self, inst: Air.Inst.Index, op_lhs: Air.Inst.Ref, op_rhs: Ai _ = try self.addInst(.{ .tag = .mul, - .cond = .al, .data = .{ .rrr = .{ .rd = dst_mcv.register, .rn = lhs_mcv.register, @@ -2045,7 +2025,6 @@ fn genArmMulConstant(self: *Self, inst: Air.Inst.Index, op: Air.Inst.Ref, op_ind _ = try self.addInst(.{ .tag = .mul, - .cond = .al, .data = .{ .rrr = .{ .rd = dst_mcv.register, .rn = lhs_mcv.register, @@ -2066,7 +2045,6 @@ fn genArmInlineMemcpy( // mov count, #0 _ = try self.addInst(.{ .tag = .mov, - .cond = .al, .data = .{ .rr_op = .{ .rd = count, .rn = .r0, @@ -2078,7 +2056,6 @@ fn genArmInlineMemcpy( // cmp count, len _ = try self.addInst(.{ .tag = .cmp, - .cond = .al, .data = .{ .rr_op = .{ .rd = .r0, .rn = count, @@ -2096,7 +2073,6 @@ fn genArmInlineMemcpy( // ldrb tmp, [src, count] _ = try self.addInst(.{ .tag = .ldrb, - .cond = .al, .data = .{ .rr_offset = .{ .rt = tmp, .rn = src, @@ -2107,7 +2083,6 @@ fn genArmInlineMemcpy( // strb tmp, [src, count] _ = try self.addInst(.{ .tag = .strb, - .cond = .al, .data = .{ .rr_offset = .{ .rt = tmp, .rn = dst, @@ -2118,7 +2093,6 @@ fn genArmInlineMemcpy( // add count, count, #1 _ = try self.addInst(.{ .tag = .add, - .cond = .al, .data = .{ .rr_op = .{ .rd = count, .rn = count, @@ -2129,7 +2103,6 @@ fn genArmInlineMemcpy( // b loop _ = try self.addInst(.{ .tag = .b, - .cond = .al, .data = .{ .inst = @intCast(u32, self.mir_instructions.len - 5) }, }); @@ -2236,7 +2209,6 @@ fn airArg(self: *Self, inst: Air.Inst.Index) !void { fn airBreakpoint(self: *Self) !void { _ = try self.addInst(.{ .tag = .bkpt, - .cond = .al, .data = .{ .imm16 = 0 }, }); return self.finishAirBookkeeping(); @@ -2348,14 +2320,12 @@ fn airCall(self: *Self, inst: Air.Inst.Index) !void { if (Target.arm.featureSetHas(self.target.cpu.features, .has_v5t)) { _ = try self.addInst(.{ .tag = .blx, - .cond = .al, .data = .{ .reg = .lr }, }); } else { return self.fail("TODO fix blx emulation for ARM > 16), @@ -3375,7 +3327,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void // orr reg, reg, #0xdd, 8 _ = try self.addInst(.{ .tag = .mov, - .cond = .al, .data = .{ .rr_op = .{ .rd = reg, .rn = .r0, @@ -3384,7 +3335,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void }); _ = try self.addInst(.{ .tag = .orr, - .cond = .al, .data = .{ .rr_op = .{ .rd = reg, .rn = reg, @@ -3393,7 +3343,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void }); _ = try self.addInst(.{ .tag = .orr, - .cond = .al, .data = .{ .rr_op = .{ .rd = reg, .rn = reg, @@ -3402,7 +3351,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void }); _ = try self.addInst(.{ .tag = .orr, - .cond = .al, .data = .{ .rr_op = .{ .rd = reg, .rn = reg, @@ -3420,7 +3368,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void // mov reg, src_reg _ = try self.addInst(.{ .tag = .mov, - .cond = .al, .data = .{ .rr_op = .{ .rd = reg, .rn = .r0, @@ -3434,7 +3381,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void try self.genSetReg(ty, reg, .{ .immediate = @intCast(u32, addr) }); _ = try self.addInst(.{ .tag = .ldr, - .cond = .al, .data = .{ .rr_offset = .{ .rt = reg, .rn = reg, @@ -3461,7 +3407,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void _ = try self.addInst(.{ .tag = tag, - .cond = .al, .data = .{ .rr_offset = .{ .rt = reg, .rn = .fp, @@ -3479,7 +3424,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void _ = try self.addInst(.{ .tag = .ldrh, - .cond = .al, .data = .{ .rr_extra_offset = .{ .rt = reg, .rn = .fp, @@ -3507,7 +3451,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void _ = try self.addInst(.{ .tag = tag, - .cond = .al, .data = .{ .r_stack_offset = .{ .rt = reg, .stack_offset = @intCast(u32, adj_off), @@ -3551,7 +3494,6 @@ fn genSetStackArgument(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) I _ = try self.addInst(.{ .tag = tag, - .cond = .al, .data = .{ .rr_offset = .{ .rt = reg, .rn = .sp, @@ -3566,7 +3508,6 @@ fn genSetStackArgument(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) I _ = try self.addInst(.{ .tag = .strh, - .cond = .al, .data = .{ .rr_extra_offset = .{ .rt = reg, .rn = .sp, diff --git a/src/arch/arm/Mir.zig b/src/arch/arm/Mir.zig index 13aa1bbe59..b19186e003 100644 --- a/src/arch/arm/Mir.zig +++ b/src/arch/arm/Mir.zig @@ -20,7 +20,7 @@ extra: []const u32, pub const Inst = struct { tag: Tag, - cond: bits.Condition, + cond: bits.Condition = .al, /// The meaning of this depends on `tag`. data: Data, From a1526f069a279f5527ff88492d51aae739aa6d93 Mon Sep 17 00:00:00 2001 From: joachimschmidt557 Date: Sun, 9 Jan 2022 19:03:45 +0100 Subject: [PATCH 2/3] stage2 ARM: pass behavior/bool.zig --- src/arch/arm/CodeGen.zig | 41 ++++- test/behavior.zig | 378 ++++++++++++++++++++------------------- 2 files changed, 227 insertions(+), 192 deletions(-) diff --git a/src/arch/arm/CodeGen.zig b/src/arch/arm/CodeGen.zig index 9fbd661f02..3501a597f9 100644 --- a/src/arch/arm/CodeGen.zig +++ b/src/arch/arm/CodeGen.zig @@ -2504,6 +2504,29 @@ fn airCondBr(self: *Self, inst: Air.Inst.Index) !void { break :blk condition.negate(); }, .register => |reg| blk: { + try self.spillCompareFlagsIfOccupied(); + + // cmp reg, 1 + // bne ... + _ = try self.addInst(.{ + .tag = .cmp, + .cond = .al, + .data = .{ .rr_op = .{ + .rd = .r0, + .rn = reg, + .op = Instruction.Operand.imm(1, 0), + } }, + }); + + break :blk .ne; + }, + .stack_offset, + .memory, + => blk: { + try self.spillCompareFlagsIfOccupied(); + + const reg = try self.copyToTmpRegister(Type.initTag(.bool), cond); + // cmp reg, 1 // bne ... _ = try self.addInst(.{ @@ -2872,17 +2895,16 @@ fn airBlock(self: *Self, inst: Air.Inst.Index) !void { // block results. .mcv = MCValue{ .none = {} }, }); - const block_data = self.blocks.getPtr(inst).?; - defer block_data.relocs.deinit(self.gpa); + defer self.blocks.getPtr(inst).?.relocs.deinit(self.gpa); const ty_pl = self.air.instructions.items(.data)[inst].ty_pl; const extra = self.air.extraData(Air.Block, ty_pl.payload); const body = self.air.extra[extra.end..][0..extra.data.body_len]; try self.genBody(body); - for (block_data.relocs.items) |reloc| try self.performReloc(reloc); + for (self.blocks.getPtr(inst).?.relocs.items) |reloc| try self.performReloc(reloc); - const result = @bitCast(MCValue, block_data.mcv); + const result = self.blocks.getPtr(inst).?.mcv; return self.finishAir(inst, result, .{ .none, .none, .none }); } @@ -2926,7 +2948,16 @@ fn br(self: *Self, block: Air.Inst.Index, operand: Air.Inst.Ref) !void { const operand_mcv = try self.resolveInst(operand); const block_mcv = block_data.mcv; if (block_mcv == .none) { - block_data.mcv = operand_mcv; + block_data.mcv = switch (operand_mcv) { + .none, .dead, .unreach => unreachable, + .register, .stack_offset, .memory => operand_mcv, + .immediate => blk: { + const new_mcv = try self.allocRegOrMem(block, true); + try self.setRegOrMem(self.air.typeOfIndex(block), new_mcv, operand_mcv); + break :blk new_mcv; + }, + else => return self.fail("TODO implement block_data.mcv = operand_mcv for {}", .{operand_mcv}), + }; } else { try self.setRegOrMem(self.air.typeOfIndex(block), block_mcv, operand_mcv); } diff --git a/test/behavior.zig b/test/behavior.zig index e3e748778b..0afef90fe8 100644 --- a/test/behavior.zig +++ b/test/behavior.zig @@ -14,198 +14,202 @@ test { _ = @import("behavior/type_info.zig"); _ = @import("behavior/type.zig"); - if (builtin.zig_backend != .stage2_arm and builtin.zig_backend != .stage2_x86_64) { - // Tests that pass for stage1, llvm backend, C backend, wasm backend. - _ = @import("behavior/array.zig"); - _ = @import("behavior/bugs/3586.zig"); - _ = @import("behavior/basic.zig"); - _ = @import("behavior/bitcast.zig"); + if (builtin.zig_backend != .stage2_x86_64) { + // Tests that pass for stage1, llvm backend, C backend, wasm backend, and arm backend. _ = @import("behavior/bool.zig"); - _ = @import("behavior/bugs/624.zig"); - _ = @import("behavior/bugs/655.zig"); - _ = @import("behavior/bugs/704.zig"); - _ = @import("behavior/bugs/1486.zig"); - _ = @import("behavior/bugs/2692.zig"); - _ = @import("behavior/bugs/2889.zig"); - _ = @import("behavior/bugs/3046.zig"); - _ = @import("behavior/bugs/4560.zig"); - _ = @import("behavior/bugs/4769_a.zig"); - _ = @import("behavior/bugs/4769_b.zig"); - _ = @import("behavior/bugs/4954.zig"); - _ = @import("behavior/byval_arg_var.zig"); - _ = @import("behavior/call.zig"); - _ = @import("behavior/defer.zig"); - _ = @import("behavior/enum.zig"); - _ = @import("behavior/error.zig"); - _ = @import("behavior/for.zig"); - _ = @import("behavior/generics.zig"); - _ = @import("behavior/if.zig"); - _ = @import("behavior/import.zig"); - _ = @import("behavior/incomplete_struct_param_tld.zig"); - _ = @import("behavior/inttoptr.zig"); - _ = @import("behavior/member_func.zig"); - _ = @import("behavior/null.zig"); - _ = @import("behavior/pointers.zig"); - _ = @import("behavior/ptrcast.zig"); - _ = @import("behavior/ref_var_in_if_after_if_2nd_switch_prong.zig"); - _ = @import("behavior/struct.zig"); - _ = @import("behavior/this.zig"); - _ = @import("behavior/truncate.zig"); - _ = @import("behavior/undefined.zig"); - _ = @import("behavior/underscore.zig"); - _ = @import("behavior/usingnamespace.zig"); - _ = @import("behavior/void.zig"); - _ = @import("behavior/while.zig"); - if (builtin.zig_backend != .stage2_wasm) { - // Tests that pass for stage1, llvm backend, C backend - _ = @import("behavior/align.zig"); - _ = @import("behavior/cast.zig"); - _ = @import("behavior/int128.zig"); - _ = @import("behavior/optional.zig"); - _ = @import("behavior/translate_c_macros.zig"); - _ = @import("behavior/try.zig"); - _ = @import("behavior/src.zig"); + if (builtin.zig_backend != .stage2_arm and builtin.zig_backend != .stage2_x86_64) { + // Tests that pass for stage1, llvm backend, C backend, wasm backend. + _ = @import("behavior/array.zig"); + _ = @import("behavior/bugs/3586.zig"); + _ = @import("behavior/basic.zig"); + _ = @import("behavior/bitcast.zig"); + _ = @import("behavior/bugs/624.zig"); + _ = @import("behavior/bugs/655.zig"); + _ = @import("behavior/bugs/704.zig"); + _ = @import("behavior/bugs/1486.zig"); + _ = @import("behavior/bugs/2692.zig"); + _ = @import("behavior/bugs/2889.zig"); + _ = @import("behavior/bugs/3046.zig"); + _ = @import("behavior/bugs/4560.zig"); + _ = @import("behavior/bugs/4769_a.zig"); + _ = @import("behavior/bugs/4769_b.zig"); + _ = @import("behavior/bugs/4954.zig"); + _ = @import("behavior/byval_arg_var.zig"); + _ = @import("behavior/call.zig"); + _ = @import("behavior/defer.zig"); + _ = @import("behavior/enum.zig"); + _ = @import("behavior/error.zig"); + _ = @import("behavior/for.zig"); + _ = @import("behavior/generics.zig"); + _ = @import("behavior/if.zig"); + _ = @import("behavior/import.zig"); + _ = @import("behavior/incomplete_struct_param_tld.zig"); + _ = @import("behavior/inttoptr.zig"); + _ = @import("behavior/member_func.zig"); + _ = @import("behavior/null.zig"); + _ = @import("behavior/pointers.zig"); + _ = @import("behavior/ptrcast.zig"); + _ = @import("behavior/ref_var_in_if_after_if_2nd_switch_prong.zig"); + _ = @import("behavior/struct.zig"); + _ = @import("behavior/this.zig"); + _ = @import("behavior/truncate.zig"); + _ = @import("behavior/undefined.zig"); + _ = @import("behavior/underscore.zig"); + _ = @import("behavior/usingnamespace.zig"); + _ = @import("behavior/void.zig"); + _ = @import("behavior/while.zig"); - if (builtin.zig_backend != .stage2_c) { - // Tests that pass for stage1 and the llvm backend. - _ = @import("behavior/align_llvm.zig"); - _ = @import("behavior/alignof.zig"); - _ = @import("behavior/array_llvm.zig"); - _ = @import("behavior/atomics.zig"); - _ = @import("behavior/basic_llvm.zig"); - _ = @import("behavior/bit_shifting.zig"); - _ = @import("behavior/bugs/394.zig"); - _ = @import("behavior/bugs/656.zig"); - _ = @import("behavior/bugs/1277.zig"); - _ = @import("behavior/bugs/1310.zig"); - _ = @import("behavior/bugs/1381.zig"); - _ = @import("behavior/bugs/1500.zig"); - _ = @import("behavior/bugs/1735.zig"); - _ = @import("behavior/bugs/1741.zig"); - _ = @import("behavior/bugs/2006.zig"); - _ = @import("behavior/bugs/2578.zig"); - _ = @import("behavior/bugs/3007.zig"); - _ = @import("behavior/bugs/3112.zig"); - _ = @import("behavior/bugs/3367.zig"); - _ = @import("behavior/bugs/7250.zig"); - _ = @import("behavior/bugs/9584.zig"); - _ = @import("behavior/cast_llvm.zig"); - _ = @import("behavior/enum_llvm.zig"); - _ = @import("behavior/error_llvm.zig"); - _ = @import("behavior/eval.zig"); - _ = @import("behavior/floatop.zig"); - _ = @import("behavior/fn.zig"); - _ = @import("behavior/generics_llvm.zig"); - _ = @import("behavior/math.zig"); - _ = @import("behavior/maximum_minimum.zig"); - _ = @import("behavior/merge_error_sets.zig"); - _ = @import("behavior/namespace_depends_on_compile_var.zig"); - _ = @import("behavior/null_llvm.zig"); - _ = @import("behavior/optional_llvm.zig"); - _ = @import("behavior/popcount.zig"); - _ = @import("behavior/saturating_arithmetic.zig"); - _ = @import("behavior/sizeof_and_typeof.zig"); - _ = @import("behavior/slice.zig"); - _ = @import("behavior/struct_llvm.zig"); - _ = @import("behavior/switch.zig"); - _ = @import("behavior/union.zig"); - _ = @import("behavior/widening.zig"); + if (builtin.zig_backend != .stage2_wasm) { + // Tests that pass for stage1, llvm backend, C backend + _ = @import("behavior/align.zig"); + _ = @import("behavior/cast.zig"); + _ = @import("behavior/int128.zig"); + _ = @import("behavior/optional.zig"); + _ = @import("behavior/translate_c_macros.zig"); + _ = @import("behavior/try.zig"); + _ = @import("behavior/src.zig"); - if (builtin.zig_backend != .stage1) { - // When all comptime_memory.zig tests pass, #9646 can be closed. - // _ = @import("behavior/comptime_memory.zig"); - _ = @import("behavior/slice_stage2.zig"); - } else { - // Tests that only pass for the stage1 backend. - _ = @import("behavior/align_stage1.zig"); - _ = @import("behavior/array_stage1.zig"); - if (builtin.os.tag != .wasi) { - _ = @import("behavior/asm.zig"); - _ = @import("behavior/async_fn.zig"); + if (builtin.zig_backend != .stage2_c) { + // Tests that pass for stage1 and the llvm backend. + _ = @import("behavior/align_llvm.zig"); + _ = @import("behavior/alignof.zig"); + _ = @import("behavior/array_llvm.zig"); + _ = @import("behavior/atomics.zig"); + _ = @import("behavior/basic_llvm.zig"); + _ = @import("behavior/bit_shifting.zig"); + _ = @import("behavior/bugs/394.zig"); + _ = @import("behavior/bugs/656.zig"); + _ = @import("behavior/bugs/1277.zig"); + _ = @import("behavior/bugs/1310.zig"); + _ = @import("behavior/bugs/1381.zig"); + _ = @import("behavior/bugs/1500.zig"); + _ = @import("behavior/bugs/1735.zig"); + _ = @import("behavior/bugs/1741.zig"); + _ = @import("behavior/bugs/2006.zig"); + _ = @import("behavior/bugs/2578.zig"); + _ = @import("behavior/bugs/3007.zig"); + _ = @import("behavior/bugs/3112.zig"); + _ = @import("behavior/bugs/3367.zig"); + _ = @import("behavior/bugs/7250.zig"); + _ = @import("behavior/bugs/9584.zig"); + _ = @import("behavior/cast_llvm.zig"); + _ = @import("behavior/enum_llvm.zig"); + _ = @import("behavior/error_llvm.zig"); + _ = @import("behavior/eval.zig"); + _ = @import("behavior/floatop.zig"); + _ = @import("behavior/fn.zig"); + _ = @import("behavior/generics_llvm.zig"); + _ = @import("behavior/math.zig"); + _ = @import("behavior/maximum_minimum.zig"); + _ = @import("behavior/merge_error_sets.zig"); + _ = @import("behavior/namespace_depends_on_compile_var.zig"); + _ = @import("behavior/null_llvm.zig"); + _ = @import("behavior/optional_llvm.zig"); + _ = @import("behavior/popcount.zig"); + _ = @import("behavior/saturating_arithmetic.zig"); + _ = @import("behavior/sizeof_and_typeof.zig"); + _ = @import("behavior/slice.zig"); + _ = @import("behavior/struct_llvm.zig"); + _ = @import("behavior/switch.zig"); + _ = @import("behavior/union.zig"); + _ = @import("behavior/widening.zig"); + + if (builtin.zig_backend != .stage1) { + // When all comptime_memory.zig tests pass, #9646 can be closed. + // _ = @import("behavior/comptime_memory.zig"); + _ = @import("behavior/slice_stage2.zig"); + } else { + // Tests that only pass for the stage1 backend. + _ = @import("behavior/align_stage1.zig"); + _ = @import("behavior/array_stage1.zig"); + if (builtin.os.tag != .wasi) { + _ = @import("behavior/asm.zig"); + _ = @import("behavior/async_fn.zig"); + } + _ = @import("behavior/await_struct.zig"); + _ = @import("behavior/bitcast_stage1.zig"); + _ = @import("behavior/bitreverse.zig"); + _ = @import("behavior/bugs/421.zig"); + _ = @import("behavior/bugs/529.zig"); + _ = @import("behavior/bugs/718.zig"); + _ = @import("behavior/bugs/726.zig"); + _ = @import("behavior/bugs/828.zig"); + _ = @import("behavior/bugs/920.zig"); + _ = @import("behavior/bugs/1025.zig"); + _ = @import("behavior/bugs/1076.zig"); + _ = @import("behavior/bugs/1120.zig"); + _ = @import("behavior/bugs/1421.zig"); + _ = @import("behavior/bugs/1442.zig"); + _ = @import("behavior/bugs/1607.zig"); + _ = @import("behavior/bugs/1851.zig"); + _ = @import("behavior/bugs/1914.zig"); + _ = @import("behavior/bugs/2114.zig"); + _ = @import("behavior/bugs/3384.zig"); + _ = @import("behavior/bugs/3742.zig"); + _ = @import("behavior/bugs/3779.zig"); + _ = @import("behavior/bugs/4328.zig"); + _ = @import("behavior/bugs/5398.zig"); + _ = @import("behavior/bugs/5413.zig"); + _ = @import("behavior/bugs/5474.zig"); + _ = @import("behavior/bugs/5487.zig"); + _ = @import("behavior/bugs/6456.zig"); + _ = @import("behavior/bugs/6781.zig"); + _ = @import("behavior/bugs/7003.zig"); + _ = @import("behavior/bugs/7027.zig"); + _ = @import("behavior/bugs/7047.zig"); + _ = @import("behavior/bugs/10147.zig"); + _ = @import("behavior/byteswap.zig"); + _ = @import("behavior/call_stage1.zig"); + _ = @import("behavior/cast_stage1.zig"); + _ = @import("behavior/const_slice_child.zig"); + _ = @import("behavior/defer_stage1.zig"); + _ = @import("behavior/enum_stage1.zig"); + _ = @import("behavior/error_stage1.zig"); + _ = @import("behavior/eval_stage1.zig"); + _ = @import("behavior/field_parent_ptr.zig"); + _ = @import("behavior/floatop_stage1.zig"); + _ = @import("behavior/fn_stage1.zig"); + _ = @import("behavior/fn_delegation.zig"); + _ = @import("behavior/for_stage1.zig"); + _ = @import("behavior/if_stage1.zig"); + _ = @import("behavior/ir_block_deps.zig"); + _ = @import("behavior/math_stage1.zig"); + _ = @import("behavior/misc.zig"); + _ = @import("behavior/muladd.zig"); + _ = @import("behavior/null_stage1.zig"); + _ = @import("behavior/optional_stage1.zig"); + _ = @import("behavior/pointers_stage1.zig"); + _ = @import("behavior/popcount_stage1.zig"); + _ = @import("behavior/prefetch.zig"); + _ = @import("behavior/ptrcast_stage1.zig"); + _ = @import("behavior/reflection.zig"); + _ = @import("behavior/saturating_arithmetic_stage1.zig"); + _ = @import("behavior/select.zig"); + _ = @import("behavior/shuffle.zig"); + _ = @import("behavior/sizeof_and_typeof_stage1.zig"); + _ = @import("behavior/slice_stage1.zig"); + _ = @import("behavior/struct_contains_null_ptr_itself.zig"); + _ = @import("behavior/struct_contains_slice_of_itself.zig"); + _ = @import("behavior/struct_stage1.zig"); + _ = @import("behavior/switch_prong_err_enum.zig"); + _ = @import("behavior/switch_prong_implicit_cast.zig"); + _ = @import("behavior/switch_stage1.zig"); + _ = @import("behavior/truncate_stage1.zig"); + _ = @import("behavior/tuple.zig"); + _ = @import("behavior/type_stage1.zig"); + _ = @import("behavior/type_info_stage1.zig"); + _ = @import("behavior/typename.zig"); + _ = @import("behavior/union_stage1.zig"); + _ = @import("behavior/union_with_members.zig"); + _ = @import("behavior/var_args.zig"); + _ = @import("behavior/vector.zig"); + if (builtin.target.cpu.arch == .wasm32) { + _ = @import("behavior/wasm.zig"); + } + _ = @import("behavior/while_stage1.zig"); + _ = @import("behavior/translate_c_macros_stage1.zig"); } - _ = @import("behavior/await_struct.zig"); - _ = @import("behavior/bitcast_stage1.zig"); - _ = @import("behavior/bitreverse.zig"); - _ = @import("behavior/bugs/421.zig"); - _ = @import("behavior/bugs/529.zig"); - _ = @import("behavior/bugs/718.zig"); - _ = @import("behavior/bugs/726.zig"); - _ = @import("behavior/bugs/828.zig"); - _ = @import("behavior/bugs/920.zig"); - _ = @import("behavior/bugs/1025.zig"); - _ = @import("behavior/bugs/1076.zig"); - _ = @import("behavior/bugs/1120.zig"); - _ = @import("behavior/bugs/1421.zig"); - _ = @import("behavior/bugs/1442.zig"); - _ = @import("behavior/bugs/1607.zig"); - _ = @import("behavior/bugs/1851.zig"); - _ = @import("behavior/bugs/1914.zig"); - _ = @import("behavior/bugs/2114.zig"); - _ = @import("behavior/bugs/3384.zig"); - _ = @import("behavior/bugs/3742.zig"); - _ = @import("behavior/bugs/3779.zig"); - _ = @import("behavior/bugs/4328.zig"); - _ = @import("behavior/bugs/5398.zig"); - _ = @import("behavior/bugs/5413.zig"); - _ = @import("behavior/bugs/5474.zig"); - _ = @import("behavior/bugs/5487.zig"); - _ = @import("behavior/bugs/6456.zig"); - _ = @import("behavior/bugs/6781.zig"); - _ = @import("behavior/bugs/7003.zig"); - _ = @import("behavior/bugs/7027.zig"); - _ = @import("behavior/bugs/7047.zig"); - _ = @import("behavior/bugs/10147.zig"); - _ = @import("behavior/byteswap.zig"); - _ = @import("behavior/call_stage1.zig"); - _ = @import("behavior/cast_stage1.zig"); - _ = @import("behavior/const_slice_child.zig"); - _ = @import("behavior/defer_stage1.zig"); - _ = @import("behavior/enum_stage1.zig"); - _ = @import("behavior/error_stage1.zig"); - _ = @import("behavior/eval_stage1.zig"); - _ = @import("behavior/field_parent_ptr.zig"); - _ = @import("behavior/floatop_stage1.zig"); - _ = @import("behavior/fn_stage1.zig"); - _ = @import("behavior/fn_delegation.zig"); - _ = @import("behavior/for_stage1.zig"); - _ = @import("behavior/if_stage1.zig"); - _ = @import("behavior/ir_block_deps.zig"); - _ = @import("behavior/math_stage1.zig"); - _ = @import("behavior/misc.zig"); - _ = @import("behavior/muladd.zig"); - _ = @import("behavior/null_stage1.zig"); - _ = @import("behavior/optional_stage1.zig"); - _ = @import("behavior/pointers_stage1.zig"); - _ = @import("behavior/popcount_stage1.zig"); - _ = @import("behavior/prefetch.zig"); - _ = @import("behavior/ptrcast_stage1.zig"); - _ = @import("behavior/reflection.zig"); - _ = @import("behavior/saturating_arithmetic_stage1.zig"); - _ = @import("behavior/select.zig"); - _ = @import("behavior/shuffle.zig"); - _ = @import("behavior/sizeof_and_typeof_stage1.zig"); - _ = @import("behavior/slice_stage1.zig"); - _ = @import("behavior/struct_contains_null_ptr_itself.zig"); - _ = @import("behavior/struct_contains_slice_of_itself.zig"); - _ = @import("behavior/struct_stage1.zig"); - _ = @import("behavior/switch_prong_err_enum.zig"); - _ = @import("behavior/switch_prong_implicit_cast.zig"); - _ = @import("behavior/switch_stage1.zig"); - _ = @import("behavior/truncate_stage1.zig"); - _ = @import("behavior/tuple.zig"); - _ = @import("behavior/type_stage1.zig"); - _ = @import("behavior/type_info_stage1.zig"); - _ = @import("behavior/typename.zig"); - _ = @import("behavior/union_stage1.zig"); - _ = @import("behavior/union_with_members.zig"); - _ = @import("behavior/var_args.zig"); - _ = @import("behavior/vector.zig"); - if (builtin.target.cpu.arch == .wasm32) { - _ = @import("behavior/wasm.zig"); - } - _ = @import("behavior/while_stage1.zig"); - _ = @import("behavior/translate_c_macros_stage1.zig"); } } } From b5f03b3b7a33a1c63855a609ea2bb224f4a76065 Mon Sep 17 00:00:00 2001 From: joachimschmidt557 Date: Sun, 9 Jan 2022 19:09:57 +0100 Subject: [PATCH 3/3] stage2 codegen: fix airBlock bug in 3 backends --- src/arch/aarch64/CodeGen.zig | 7 +++---- src/arch/riscv64/CodeGen.zig | 7 +++---- src/arch/x86_64/CodeGen.zig | 7 +++---- 3 files changed, 9 insertions(+), 12 deletions(-) diff --git a/src/arch/aarch64/CodeGen.zig b/src/arch/aarch64/CodeGen.zig index ecfb6de7f0..1e69f7db5a 100644 --- a/src/arch/aarch64/CodeGen.zig +++ b/src/arch/aarch64/CodeGen.zig @@ -2104,17 +2104,16 @@ fn airBlock(self: *Self, inst: Air.Inst.Index) !void { // block results. .mcv = MCValue{ .none = {} }, }); - const block_data = self.blocks.getPtr(inst).?; - defer block_data.relocs.deinit(self.gpa); + defer self.blocks.getPtr(inst).?.relocs.deinit(self.gpa); const ty_pl = self.air.instructions.items(.data)[inst].ty_pl; const extra = self.air.extraData(Air.Block, ty_pl.payload); const body = self.air.extra[extra.end..][0..extra.data.body_len]; try self.genBody(body); - for (block_data.relocs.items) |reloc| try self.performReloc(reloc); + for (self.blocks.getPtr(inst).?.relocs.items) |reloc| try self.performReloc(reloc); - const result = @bitCast(MCValue, block_data.mcv); + const result = self.blocks.getPtr(inst).?.mcv; return self.finishAir(inst, result, .{ .none, .none, .none }); } diff --git a/src/arch/riscv64/CodeGen.zig b/src/arch/riscv64/CodeGen.zig index c878f672a3..a8f2b69d90 100644 --- a/src/arch/riscv64/CodeGen.zig +++ b/src/arch/riscv64/CodeGen.zig @@ -1720,17 +1720,16 @@ fn airBlock(self: *Self, inst: Air.Inst.Index) !void { // block results. .mcv = MCValue{ .none = {} }, }); - const block_data = self.blocks.getPtr(inst).?; - defer block_data.relocs.deinit(self.gpa); + defer self.blocks.getPtr(inst).?.relocs.deinit(self.gpa); const ty_pl = self.air.instructions.items(.data)[inst].ty_pl; const extra = self.air.extraData(Air.Block, ty_pl.payload); const body = self.air.extra[extra.end..][0..extra.data.body_len]; try self.genBody(body); - for (block_data.relocs.items) |reloc| try self.performReloc(reloc); + for (self.blocks.getPtr(inst).?.relocs.items) |reloc| try self.performReloc(reloc); - const result = @bitCast(MCValue, block_data.mcv); + const result = self.blocks.getPtr(inst).?.mcv; return self.finishAir(inst, result, .{ .none, .none, .none }); } diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig index 76f48e5b99..2cb7fc1ab7 100644 --- a/src/arch/x86_64/CodeGen.zig +++ b/src/arch/x86_64/CodeGen.zig @@ -2853,17 +2853,16 @@ fn airBlock(self: *Self, inst: Air.Inst.Index) !void { // block results. .mcv = MCValue{ .none = {} }, }); - const block_data = self.blocks.getPtr(inst).?; - defer block_data.relocs.deinit(self.gpa); + defer self.blocks.getPtr(inst).?.relocs.deinit(self.gpa); const ty_pl = self.air.instructions.items(.data)[inst].ty_pl; const extra = self.air.extraData(Air.Block, ty_pl.payload); const body = self.air.extra[extra.end..][0..extra.data.body_len]; try self.genBody(body); - for (block_data.relocs.items) |reloc| try self.performReloc(reloc); + for (self.blocks.getPtr(inst).?.relocs.items) |reloc| try self.performReloc(reloc); - const result = @bitCast(MCValue, block_data.mcv); + const result = self.blocks.getPtr(inst).?.mcv; return self.finishAir(inst, result, .{ .none, .none, .none }); }