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Merge pull request #13236 from joachimschmidt557/stage2-aarch64
stage2 AArch64: move to new allocRegs mechanism
This commit is contained in:
Joachim Schmidt
GitHub
commit
41575b1f55
File diff suppressed because it is too large
Load Diff
@ -150,6 +150,7 @@ pub fn emitMir(
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.ldp => try emit.mirLoadStoreRegisterPair(inst),
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.stp => try emit.mirLoadStoreRegisterPair(inst),
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.ldr_ptr_stack => try emit.mirLoadStoreStack(inst),
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.ldr_stack => try emit.mirLoadStoreStack(inst),
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.ldrb_stack => try emit.mirLoadStoreStack(inst),
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.ldrh_stack => try emit.mirLoadStoreStack(inst),
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@ -159,8 +160,8 @@ pub fn emitMir(
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.strb_stack => try emit.mirLoadStoreStack(inst),
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.strh_stack => try emit.mirLoadStoreStack(inst),
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.ldr_stack_argument => try emit.mirLoadStackArgument(inst),
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.ldr_ptr_stack_argument => try emit.mirLoadStackArgument(inst),
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.ldr_stack_argument => try emit.mirLoadStackArgument(inst),
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.ldrb_stack_argument => try emit.mirLoadStackArgument(inst),
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.ldrh_stack_argument => try emit.mirLoadStackArgument(inst),
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.ldrsb_stack_argument => try emit.mirLoadStackArgument(inst),
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@ -842,14 +843,14 @@ fn mirLoadMemoryPie(emit: *Emit, inst: Mir.Inst.Index) !void {
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// PC-relative displacement to the entry in memory.
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// adrp
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const offset = @intCast(u32, emit.code.items.len);
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try emit.writeInstruction(Instruction.adrp(reg.to64(), 0));
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try emit.writeInstruction(Instruction.adrp(reg.toX(), 0));
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switch (tag) {
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.load_memory_got => {
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// ldr reg, reg, offset
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try emit.writeInstruction(Instruction.ldr(
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reg,
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reg.to64(),
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reg.toX(),
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Instruction.LoadStoreOffset.imm(0),
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));
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},
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@ -863,11 +864,11 @@ fn mirLoadMemoryPie(emit: *Emit, inst: Mir.Inst.Index) !void {
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// Note that this can potentially be optimised out by the codegen/linker if the
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// target address is appropriately aligned.
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// add reg, reg, offset
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try emit.writeInstruction(Instruction.add(reg.to64(), reg.to64(), 0, false));
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try emit.writeInstruction(Instruction.add(reg.toX(), reg.toX(), 0, false));
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// ldr reg, reg, offset
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try emit.writeInstruction(Instruction.ldr(
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reg,
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reg.to64(),
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reg.toX(),
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Instruction.LoadStoreOffset.imm(0),
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));
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},
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@ -1003,23 +1004,43 @@ fn mirLoadStoreStack(emit: *Emit, inst: Mir.Inst.Index) !void {
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const rt = load_store_stack.rt;
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const raw_offset = emit.stack_size - load_store_stack.offset;
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const offset = switch (tag) {
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.ldrb_stack, .ldrsb_stack, .strb_stack => blk: {
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if (math.cast(u12, raw_offset)) |imm| {
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break :blk Instruction.LoadStoreOffset.imm(imm);
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} else {
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switch (tag) {
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.ldr_ptr_stack => {
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const offset = if (math.cast(u12, raw_offset)) |imm| imm else {
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return emit.fail("TODO load stack argument ptr with larger offset", .{});
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};
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switch (tag) {
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.ldr_ptr_stack => try emit.writeInstruction(Instruction.add(rt, .sp, offset, false)),
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else => unreachable,
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}
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},
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.ldrb_stack, .ldrsb_stack, .strb_stack => {
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const offset = if (math.cast(u12, raw_offset)) |imm| Instruction.LoadStoreOffset.imm(imm) else {
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return emit.fail("TODO load/store stack byte with larger offset", .{});
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};
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switch (tag) {
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.ldrb_stack => try emit.writeInstruction(Instruction.ldrb(rt, .sp, offset)),
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.ldrsb_stack => try emit.writeInstruction(Instruction.ldrsb(rt, .sp, offset)),
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.strb_stack => try emit.writeInstruction(Instruction.strb(rt, .sp, offset)),
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else => unreachable,
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}
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},
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.ldrh_stack, .ldrsh_stack, .strh_stack => blk: {
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.ldrh_stack, .ldrsh_stack, .strh_stack => {
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assert(std.mem.isAlignedGeneric(u32, raw_offset, 2)); // misaligned stack entry
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if (math.cast(u12, @divExact(raw_offset, 2))) |imm| {
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break :blk Instruction.LoadStoreOffset.imm(imm);
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} else {
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const offset = if (math.cast(u12, @divExact(raw_offset, 2))) |imm| Instruction.LoadStoreOffset.imm(imm) else {
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return emit.fail("TODO load/store stack halfword with larger offset", .{});
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};
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switch (tag) {
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.ldrh_stack => try emit.writeInstruction(Instruction.ldrh(rt, .sp, offset)),
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.ldrsh_stack => try emit.writeInstruction(Instruction.ldrsh(rt, .sp, offset)),
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.strh_stack => try emit.writeInstruction(Instruction.strh(rt, .sp, offset)),
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else => unreachable,
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}
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},
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.ldr_stack, .str_stack => blk: {
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.ldr_stack, .str_stack => {
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const alignment: u32 = switch (rt.size()) {
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32 => 4,
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64 => 8,
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@ -1027,25 +1048,17 @@ fn mirLoadStoreStack(emit: *Emit, inst: Mir.Inst.Index) !void {
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};
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assert(std.mem.isAlignedGeneric(u32, raw_offset, alignment)); // misaligned stack entry
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if (math.cast(u12, @divExact(raw_offset, alignment))) |imm| {
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break :blk Instruction.LoadStoreOffset.imm(imm);
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} else {
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const offset = if (math.cast(u12, @divExact(raw_offset, alignment))) |imm| Instruction.LoadStoreOffset.imm(imm) else {
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return emit.fail("TODO load/store stack with larger offset", .{});
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};
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switch (tag) {
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.ldr_stack => try emit.writeInstruction(Instruction.ldr(rt, .sp, offset)),
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.str_stack => try emit.writeInstruction(Instruction.str(rt, .sp, offset)),
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else => unreachable,
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}
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},
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else => unreachable,
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};
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switch (tag) {
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.ldr_stack => try emit.writeInstruction(Instruction.ldr(rt, .sp, offset)),
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.ldrb_stack => try emit.writeInstruction(Instruction.ldrb(rt, .sp, offset)),
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.ldrh_stack => try emit.writeInstruction(Instruction.ldrh(rt, .sp, offset)),
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.ldrsb_stack => try emit.writeInstruction(Instruction.ldrsb(rt, .sp, offset)),
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.ldrsh_stack => try emit.writeInstruction(Instruction.ldrsh(rt, .sp, offset)),
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.str_stack => try emit.writeInstruction(Instruction.str(rt, .sp, offset)),
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.strb_stack => try emit.writeInstruction(Instruction.strb(rt, .sp, offset)),
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.strh_stack => try emit.writeInstruction(Instruction.strh(rt, .sp, offset)),
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else => unreachable,
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}
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}
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@ -92,6 +92,8 @@ pub const Inst = struct {
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load_memory_ptr_direct,
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/// Load Pair of Registers
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ldp,
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/// Pseudo-instruction: Load pointer to stack item
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ldr_ptr_stack,
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/// Pseudo-instruction: Load pointer to stack argument
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ldr_ptr_stack_argument,
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/// Pseudo-instruction: Load from stack
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@ -432,7 +434,7 @@ pub const Inst = struct {
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rn: Register,
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offset: bits.Instruction.LoadStoreOffsetRegister,
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},
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/// A registers and a stack offset
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/// A register and a stack offset
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///
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/// Used by e.g. str_stack
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load_store_stack: struct {
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@ -464,10 +466,6 @@ pub const Inst = struct {
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line: u32,
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column: u32,
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},
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load_memory: struct {
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register: u32,
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addr: u32,
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},
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};
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// Make sure we don't accidentally make instructions bigger than expected.
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@ -4,17 +4,22 @@ const DW = std.dwarf;
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const assert = std.debug.assert;
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const testing = std.testing;
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// zig fmt: off
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pub const RegisterClass = enum {
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general_purpose,
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stack_pointer,
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floating_point,
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};
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/// General purpose registers in the AArch64 instruction set
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pub const Register = enum(u7) {
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// 64-bit registers
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pub const Register = enum(u8) {
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// zig fmt: off
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// 64-bit general-purpose registers
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x0, x1, x2, x3, x4, x5, x6, x7,
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x8, x9, x10, x11, x12, x13, x14, x15,
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x16, x17, x18, x19, x20, x21, x22, x23,
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x24, x25, x26, x27, x28, x29, x30, xzr,
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// 32-bit registers
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// 32-bit general-purpose registers
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w0, w1, w2, w3, w4, w5, w6, w7,
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w8, w9, w10, w11, w12, w13, w14, w15,
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w16, w17, w18, w19, w20, w21, w22, w23,
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@ -23,51 +28,267 @@ pub const Register = enum(u7) {
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// Stack pointer
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sp, wsp,
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// 128-bit floating-point registers
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q0, q1, q2, q3, q4, q5, q6, q7,
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q8, q9, q10, q11, q12, q13, q14, q15,
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q16, q17, q18, q19, q20, q21, q22, q23,
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q24, q25, q26, q27, q28, q29, q30, q31,
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// 64-bit floating-point registers
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d0, d1, d2, d3, d4, d5, d6, d7,
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d8, d9, d10, d11, d12, d13, d14, d15,
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d16, d17, d18, d19, d20, d21, d22, d23,
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d24, d25, d26, d27, d28, d29, d30, d31,
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// 32-bit floating-point registers
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s0, s1, s2, s3, s4, s5, s6, s7,
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s8, s9, s10, s11, s12, s13, s14, s15,
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s16, s17, s18, s19, s20, s21, s22, s23,
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s24, s25, s26, s27, s28, s29, s30, s31,
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// 16-bit floating-point registers
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h0, h1, h2, h3, h4, h5, h6, h7,
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h8, h9, h10, h11, h12, h13, h14, h15,
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h16, h17, h18, h19, h20, h21, h22, h23,
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h24, h25, h26, h27, h28, h29, h30, h31,
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// 8-bit floating-point registers
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b0, b1, b2, b3, b4, b5, b6, b7,
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b8, b9, b10, b11, b12, b13, b14, b15,
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b16, b17, b18, b19, b20, b21, b22, b23,
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b24, b25, b26, b27, b28, b29, b30, b31,
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// zig fmt: on
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pub fn class(self: Register) RegisterClass {
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return switch (@enumToInt(self)) {
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@enumToInt(Register.x0)...@enumToInt(Register.xzr) => .general_purpose,
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@enumToInt(Register.w0)...@enumToInt(Register.wzr) => .general_purpose,
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@enumToInt(Register.sp) => .stack_pointer,
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@enumToInt(Register.wsp) => .stack_pointer,
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@enumToInt(Register.q0)...@enumToInt(Register.q31) => .floating_point,
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@enumToInt(Register.d0)...@enumToInt(Register.d31) => .floating_point,
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@enumToInt(Register.s0)...@enumToInt(Register.s31) => .floating_point,
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@enumToInt(Register.h0)...@enumToInt(Register.h31) => .floating_point,
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@enumToInt(Register.b0)...@enumToInt(Register.b31) => .floating_point,
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else => unreachable,
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};
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}
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pub fn id(self: Register) u6 {
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return switch (@enumToInt(self)) {
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0...63 => return @as(u6, @truncate(u5, @enumToInt(self))),
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64...65 => 32,
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@enumToInt(Register.x0)...@enumToInt(Register.xzr) => @intCast(u6, @enumToInt(self) - @enumToInt(Register.x0)),
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@enumToInt(Register.w0)...@enumToInt(Register.wzr) => @intCast(u6, @enumToInt(self) - @enumToInt(Register.w0)),
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@enumToInt(Register.sp) => 32,
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@enumToInt(Register.wsp) => 32,
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@enumToInt(Register.q0)...@enumToInt(Register.q31) => @intCast(u6, @enumToInt(self) - @enumToInt(Register.q0) + 33),
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@enumToInt(Register.d0)...@enumToInt(Register.d31) => @intCast(u6, @enumToInt(self) - @enumToInt(Register.d0) + 33),
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@enumToInt(Register.s0)...@enumToInt(Register.s31) => @intCast(u6, @enumToInt(self) - @enumToInt(Register.s0) + 33),
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@enumToInt(Register.h0)...@enumToInt(Register.h31) => @intCast(u6, @enumToInt(self) - @enumToInt(Register.h0) + 33),
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@enumToInt(Register.b0)...@enumToInt(Register.b31) => @intCast(u6, @enumToInt(self) - @enumToInt(Register.b0) + 33),
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else => unreachable,
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};
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}
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pub fn enc(self: Register) u5 {
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return switch (@enumToInt(self)) {
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0...63 => return @truncate(u5, @enumToInt(self)),
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64...65 => 31,
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@enumToInt(Register.x0)...@enumToInt(Register.xzr) => @intCast(u5, @enumToInt(self) - @enumToInt(Register.x0)),
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@enumToInt(Register.w0)...@enumToInt(Register.wzr) => @intCast(u5, @enumToInt(self) - @enumToInt(Register.w0)),
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@enumToInt(Register.sp) => 31,
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@enumToInt(Register.wsp) => 31,
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@enumToInt(Register.q0)...@enumToInt(Register.q31) => @intCast(u5, @enumToInt(self) - @enumToInt(Register.q0)),
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@enumToInt(Register.d0)...@enumToInt(Register.d31) => @intCast(u5, @enumToInt(self) - @enumToInt(Register.d0)),
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@enumToInt(Register.s0)...@enumToInt(Register.s31) => @intCast(u5, @enumToInt(self) - @enumToInt(Register.s0)),
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@enumToInt(Register.h0)...@enumToInt(Register.h31) => @intCast(u5, @enumToInt(self) - @enumToInt(Register.h0)),
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@enumToInt(Register.b0)...@enumToInt(Register.b31) => @intCast(u5, @enumToInt(self) - @enumToInt(Register.b0)),
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else => unreachable,
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};
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}
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/// Returns the bit-width of the register.
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pub fn size(self: Register) u7 {
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pub fn size(self: Register) u8 {
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return switch (@enumToInt(self)) {
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0...31 => 64,
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32...63 => 32,
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64 => 64,
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65 => 32,
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@enumToInt(Register.x0)...@enumToInt(Register.xzr) => 64,
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@enumToInt(Register.w0)...@enumToInt(Register.wzr) => 32,
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@enumToInt(Register.sp) => 64,
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@enumToInt(Register.wsp) => 32,
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@enumToInt(Register.q0)...@enumToInt(Register.q31) => 128,
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@enumToInt(Register.d0)...@enumToInt(Register.d31) => 64,
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@enumToInt(Register.s0)...@enumToInt(Register.s31) => 32,
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@enumToInt(Register.h0)...@enumToInt(Register.h31) => 16,
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@enumToInt(Register.b0)...@enumToInt(Register.b31) => 8,
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else => unreachable,
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};
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}
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/// Convert from any register to its 64 bit alias.
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pub fn to64(self: Register) Register {
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/// Convert from a general-purpose register to its 64 bit alias.
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pub fn toX(self: Register) Register {
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return switch (@enumToInt(self)) {
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0...31 => self,
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32...63 => @intToEnum(Register, @enumToInt(self) - 32),
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64 => .sp,
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65 => .sp,
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@enumToInt(Register.x0)...@enumToInt(Register.xzr) => @intToEnum(
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Register,
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@enumToInt(self) - @enumToInt(Register.x0) + @enumToInt(Register.x0),
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),
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@enumToInt(Register.w0)...@enumToInt(Register.wzr) => @intToEnum(
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Register,
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@enumToInt(self) - @enumToInt(Register.w0) + @enumToInt(Register.x0),
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),
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else => unreachable,
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};
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}
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/// Convert from any register to its 32 bit alias.
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pub fn to32(self: Register) Register {
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/// Convert from a general-purpose register to its 32 bit alias.
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pub fn toW(self: Register) Register {
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return switch (@enumToInt(self)) {
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0...31 => @intToEnum(Register, @enumToInt(self) + 32),
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32...63 => self,
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64 => .wsp,
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65 => .wsp,
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@enumToInt(Register.x0)...@enumToInt(Register.xzr) => @intToEnum(
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Register,
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@enumToInt(self) - @enumToInt(Register.x0) + @enumToInt(Register.w0),
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),
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@enumToInt(Register.w0)...@enumToInt(Register.wzr) => @intToEnum(
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Register,
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@enumToInt(self) - @enumToInt(Register.w0) + @enumToInt(Register.w0),
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),
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else => unreachable,
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};
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}
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/// Convert from a floating-point register to its 128 bit alias.
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pub fn toQ(self: Register) Register {
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return switch (@enumToInt(self)) {
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@enumToInt(Register.q0)...@enumToInt(Register.q31) => @intToEnum(
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Register,
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@enumToInt(self) - @enumToInt(Register.q0) + @enumToInt(Register.q0),
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),
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@enumToInt(Register.d0)...@enumToInt(Register.d31) => @intToEnum(
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Register,
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@enumToInt(self) - @enumToInt(Register.d0) + @enumToInt(Register.q0),
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),
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@enumToInt(Register.s0)...@enumToInt(Register.s31) => @intToEnum(
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Register,
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@enumToInt(self) - @enumToInt(Register.s0) + @enumToInt(Register.q0),
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),
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@enumToInt(Register.h0)...@enumToInt(Register.h31) => @intToEnum(
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Register,
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@enumToInt(self) - @enumToInt(Register.h0) + @enumToInt(Register.q0),
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),
|
||||
@enumToInt(Register.b0)...@enumToInt(Register.b31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.b0) + @enumToInt(Register.q0),
|
||||
),
|
||||
else => unreachable,
|
||||
};
|
||||
}
|
||||
|
||||
/// Convert from a floating-point register to its 64 bit alias.
|
||||
pub fn toD(self: Register) Register {
|
||||
return switch (@enumToInt(self)) {
|
||||
@enumToInt(Register.q0)...@enumToInt(Register.q31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.q0) + @enumToInt(Register.d0),
|
||||
),
|
||||
@enumToInt(Register.d0)...@enumToInt(Register.d31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.d0) + @enumToInt(Register.d0),
|
||||
),
|
||||
@enumToInt(Register.s0)...@enumToInt(Register.s31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.s0) + @enumToInt(Register.d0),
|
||||
),
|
||||
@enumToInt(Register.h0)...@enumToInt(Register.h31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.h0) + @enumToInt(Register.d0),
|
||||
),
|
||||
@enumToInt(Register.b0)...@enumToInt(Register.b31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.b0) + @enumToInt(Register.d0),
|
||||
),
|
||||
else => unreachable,
|
||||
};
|
||||
}
|
||||
|
||||
/// Convert from a floating-point register to its 32 bit alias.
|
||||
pub fn toS(self: Register) Register {
|
||||
return switch (@enumToInt(self)) {
|
||||
@enumToInt(Register.q0)...@enumToInt(Register.q31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.q0) + @enumToInt(Register.s0),
|
||||
),
|
||||
@enumToInt(Register.d0)...@enumToInt(Register.d31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.d0) + @enumToInt(Register.s0),
|
||||
),
|
||||
@enumToInt(Register.s0)...@enumToInt(Register.s31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.s0) + @enumToInt(Register.s0),
|
||||
),
|
||||
@enumToInt(Register.h0)...@enumToInt(Register.h31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.h0) + @enumToInt(Register.s0),
|
||||
),
|
||||
@enumToInt(Register.b0)...@enumToInt(Register.b31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.b0) + @enumToInt(Register.s0),
|
||||
),
|
||||
else => unreachable,
|
||||
};
|
||||
}
|
||||
|
||||
/// Convert from a floating-point register to its 16 bit alias.
|
||||
pub fn toH(self: Register) Register {
|
||||
return switch (@enumToInt(self)) {
|
||||
@enumToInt(Register.q0)...@enumToInt(Register.q31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.q0) + @enumToInt(Register.h0),
|
||||
),
|
||||
@enumToInt(Register.d0)...@enumToInt(Register.d31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.d0) + @enumToInt(Register.h0),
|
||||
),
|
||||
@enumToInt(Register.s0)...@enumToInt(Register.s31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.s0) + @enumToInt(Register.h0),
|
||||
),
|
||||
@enumToInt(Register.h0)...@enumToInt(Register.h31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.h0) + @enumToInt(Register.h0),
|
||||
),
|
||||
@enumToInt(Register.b0)...@enumToInt(Register.b31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.b0) + @enumToInt(Register.h0),
|
||||
),
|
||||
else => unreachable,
|
||||
};
|
||||
}
|
||||
|
||||
/// Convert from a floating-point register to its 8 bit alias.
|
||||
pub fn toB(self: Register) Register {
|
||||
return switch (@enumToInt(self)) {
|
||||
@enumToInt(Register.q0)...@enumToInt(Register.q31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.q0) + @enumToInt(Register.b0),
|
||||
),
|
||||
@enumToInt(Register.d0)...@enumToInt(Register.d31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.d0) + @enumToInt(Register.b0),
|
||||
),
|
||||
@enumToInt(Register.s0)...@enumToInt(Register.s31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.s0) + @enumToInt(Register.b0),
|
||||
),
|
||||
@enumToInt(Register.h0)...@enumToInt(Register.h31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.h0) + @enumToInt(Register.b0),
|
||||
),
|
||||
@enumToInt(Register.b0)...@enumToInt(Register.b31) => @intToEnum(
|
||||
Register,
|
||||
@enumToInt(self) - @enumToInt(Register.b0) + @enumToInt(Register.b0),
|
||||
),
|
||||
else => unreachable,
|
||||
};
|
||||
}
|
||||
@ -77,8 +298,6 @@ pub const Register = enum(u7) {
|
||||
}
|
||||
};
|
||||
|
||||
// zig fmt: on
|
||||
|
||||
test "Register.enc" {
|
||||
try testing.expectEqual(@as(u5, 0), Register.x0.enc());
|
||||
try testing.expectEqual(@as(u5, 0), Register.w0.enc());
|
||||
@ -91,124 +310,16 @@ test "Register.enc" {
|
||||
}
|
||||
|
||||
test "Register.size" {
|
||||
try testing.expectEqual(@as(u7, 64), Register.x19.size());
|
||||
try testing.expectEqual(@as(u7, 32), Register.w3.size());
|
||||
try testing.expectEqual(@as(u8, 64), Register.x19.size());
|
||||
try testing.expectEqual(@as(u8, 32), Register.w3.size());
|
||||
}
|
||||
|
||||
test "Register.to64/to32" {
|
||||
try testing.expectEqual(Register.x0, Register.w0.to64());
|
||||
try testing.expectEqual(Register.x0, Register.x0.to64());
|
||||
test "Register.toX/toW" {
|
||||
try testing.expectEqual(Register.x0, Register.w0.toX());
|
||||
try testing.expectEqual(Register.x0, Register.x0.toX());
|
||||
|
||||
try testing.expectEqual(Register.w3, Register.w3.to32());
|
||||
try testing.expectEqual(Register.w3, Register.x3.to32());
|
||||
}
|
||||
|
||||
// zig fmt: off
|
||||
|
||||
/// Scalar floating point registers in the aarch64 instruction set
|
||||
pub const FloatingPointRegister = enum(u8) {
|
||||
// 128-bit registers
|
||||
q0, q1, q2, q3, q4, q5, q6, q7,
|
||||
q8, q9, q10, q11, q12, q13, q14, q15,
|
||||
q16, q17, q18, q19, q20, q21, q22, q23,
|
||||
q24, q25, q26, q27, q28, q29, q30, q31,
|
||||
|
||||
// 64-bit registers
|
||||
d0, d1, d2, d3, d4, d5, d6, d7,
|
||||
d8, d9, d10, d11, d12, d13, d14, d15,
|
||||
d16, d17, d18, d19, d20, d21, d22, d23,
|
||||
d24, d25, d26, d27, d28, d29, d30, d31,
|
||||
|
||||
// 32-bit registers
|
||||
s0, s1, s2, s3, s4, s5, s6, s7,
|
||||
s8, s9, s10, s11, s12, s13, s14, s15,
|
||||
s16, s17, s18, s19, s20, s21, s22, s23,
|
||||
s24, s25, s26, s27, s28, s29, s30, s31,
|
||||
|
||||
// 16-bit registers
|
||||
h0, h1, h2, h3, h4, h5, h6, h7,
|
||||
h8, h9, h10, h11, h12, h13, h14, h15,
|
||||
h16, h17, h18, h19, h20, h21, h22, h23,
|
||||
h24, h25, h26, h27, h28, h29, h30, h31,
|
||||
|
||||
// 8-bit registers
|
||||
b0, b1, b2, b3, b4, b5, b6, b7,
|
||||
b8, b9, b10, b11, b12, b13, b14, b15,
|
||||
b16, b17, b18, b19, b20, b21, b22, b23,
|
||||
b24, b25, b26, b27, b28, b29, b30, b31,
|
||||
|
||||
pub fn id(self: FloatingPointRegister) u5 {
|
||||
return @truncate(u5, @enumToInt(self));
|
||||
}
|
||||
|
||||
/// Returns the bit-width of the register.
|
||||
pub fn size(self: FloatingPointRegister) u8 {
|
||||
return switch (@enumToInt(self)) {
|
||||
0...31 => 128,
|
||||
32...63 => 64,
|
||||
64...95 => 32,
|
||||
96...127 => 16,
|
||||
128...159 => 8,
|
||||
else => unreachable,
|
||||
};
|
||||
}
|
||||
|
||||
/// Convert from any register to its 128 bit alias.
|
||||
pub fn to128(self: FloatingPointRegister) FloatingPointRegister {
|
||||
return @intToEnum(FloatingPointRegister, self.id());
|
||||
}
|
||||
|
||||
/// Convert from any register to its 64 bit alias.
|
||||
pub fn to64(self: FloatingPointRegister) FloatingPointRegister {
|
||||
return @intToEnum(FloatingPointRegister, @as(u8, self.id()) + 32);
|
||||
}
|
||||
|
||||
/// Convert from any register to its 32 bit alias.
|
||||
pub fn to32(self: FloatingPointRegister) FloatingPointRegister {
|
||||
return @intToEnum(FloatingPointRegister, @as(u8, self.id()) + 64);
|
||||
}
|
||||
|
||||
/// Convert from any register to its 16 bit alias.
|
||||
pub fn to16(self: FloatingPointRegister) FloatingPointRegister {
|
||||
return @intToEnum(FloatingPointRegister, @as(u8, self.id()) + 96);
|
||||
}
|
||||
|
||||
/// Convert from any register to its 8 bit alias.
|
||||
pub fn to8(self: FloatingPointRegister) FloatingPointRegister {
|
||||
return @intToEnum(FloatingPointRegister, @as(u8, self.id()) + 128);
|
||||
}
|
||||
};
|
||||
|
||||
// zig fmt: on
|
||||
|
||||
test "FloatingPointRegister.id" {
|
||||
try testing.expectEqual(@as(u5, 0), FloatingPointRegister.b0.id());
|
||||
try testing.expectEqual(@as(u5, 0), FloatingPointRegister.h0.id());
|
||||
try testing.expectEqual(@as(u5, 0), FloatingPointRegister.s0.id());
|
||||
try testing.expectEqual(@as(u5, 0), FloatingPointRegister.d0.id());
|
||||
try testing.expectEqual(@as(u5, 0), FloatingPointRegister.q0.id());
|
||||
|
||||
try testing.expectEqual(@as(u5, 2), FloatingPointRegister.q2.id());
|
||||
try testing.expectEqual(@as(u5, 31), FloatingPointRegister.d31.id());
|
||||
}
|
||||
|
||||
test "FloatingPointRegister.size" {
|
||||
try testing.expectEqual(@as(u8, 128), FloatingPointRegister.q1.size());
|
||||
try testing.expectEqual(@as(u8, 64), FloatingPointRegister.d2.size());
|
||||
try testing.expectEqual(@as(u8, 32), FloatingPointRegister.s3.size());
|
||||
try testing.expectEqual(@as(u8, 16), FloatingPointRegister.h4.size());
|
||||
try testing.expectEqual(@as(u8, 8), FloatingPointRegister.b5.size());
|
||||
}
|
||||
|
||||
test "FloatingPointRegister.toX" {
|
||||
try testing.expectEqual(FloatingPointRegister.q1, FloatingPointRegister.q1.to128());
|
||||
try testing.expectEqual(FloatingPointRegister.q2, FloatingPointRegister.b2.to128());
|
||||
try testing.expectEqual(FloatingPointRegister.q3, FloatingPointRegister.h3.to128());
|
||||
|
||||
try testing.expectEqual(FloatingPointRegister.d0, FloatingPointRegister.q0.to64());
|
||||
try testing.expectEqual(FloatingPointRegister.s1, FloatingPointRegister.d1.to32());
|
||||
try testing.expectEqual(FloatingPointRegister.h2, FloatingPointRegister.s2.to16());
|
||||
try testing.expectEqual(FloatingPointRegister.b3, FloatingPointRegister.h3.to8());
|
||||
try testing.expectEqual(Register.w3, Register.w3.toW());
|
||||
try testing.expectEqual(Register.w3, Register.x3.toW());
|
||||
}
|
||||
|
||||
/// Represents an instruction in the AArch64 instruction set
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user