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synced 2025-12-06 06:13:07 +00:00
stage2 ARM: implement ptr_add, ptr_sub for all element sizes
Also reduces slice_elem_val to ptr_add, simplifying the implementation
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@ -1434,29 +1434,11 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
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break :result dst_mcv;
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},
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else => {
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const dst_mcv = try self.allocRegOrMem(inst, true);
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const dest = try self.allocRegOrMem(inst, true);
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const addr = try self.binOp(.ptr_add, null, base_mcv, index_mcv, slice_ty, Type.usize);
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try self.load(dest, addr, slice_ptr_field_type);
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const offset_mcv = try self.binOp(
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.mul,
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null,
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index_mcv,
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.{ .immediate = elem_size },
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Type.usize,
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Type.usize,
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);
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assert(offset_mcv == .register); // result of multiplication should always be register
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self.register_manager.freezeRegs(&.{offset_mcv.register});
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const addr_mcv = try self.binOp(.add, null, base_mcv, offset_mcv, Type.usize, Type.usize);
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// At this point in time, neither the base register
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// nor the offset register contains any valuable data
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// anymore.
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self.register_manager.unfreezeRegs(&.{ base_mcv.register, offset_mcv.register });
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try self.load(dst_mcv, addr_mcv, slice_ptr_field_type);
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break :result dst_mcv;
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break :result dest;
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},
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}
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};
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@ -1710,6 +1692,8 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type
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defer self.register_manager.unfreezeRegs(&.{addr_reg});
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switch (value) {
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.dead => unreachable,
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.undef => unreachable,
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.register => |value_reg| {
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try self.genStrRegister(value_reg, addr_reg, value_ty);
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},
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@ -2140,7 +2124,7 @@ fn binOp(
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rhs: MCValue,
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lhs_ty: Type,
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rhs_ty: Type,
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) !MCValue {
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) InnerError!MCValue {
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switch (tag) {
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.add,
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.sub,
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@ -2281,16 +2265,21 @@ fn binOp(
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switch (lhs_ty.zigTypeTag()) {
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.Pointer => {
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const ptr_ty = lhs_ty;
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const pointee_ty = switch (ptr_ty.ptrSize()) {
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const elem_ty = switch (ptr_ty.ptrSize()) {
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.One => ptr_ty.childType().childType(), // ptr to array, so get array element type
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else => ptr_ty.childType(),
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};
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const elem_size = @intCast(u32, elem_ty.abiSize(self.target.*));
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if (pointee_ty.abiSize(self.target.*) > 1) {
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return self.fail("TODO ptr_add, ptr_sub with more element sizes", .{});
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if (elem_size == 1) {
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return try self.binOpRegister(tag, maybe_inst, lhs, rhs, lhs_ty, rhs_ty);
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} else {
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// convert the offset into a byte offset by
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// multiplying it with elem_size
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const offset = try self.binOp(.mul, null, rhs, .{ .immediate = elem_size }, Type.usize, Type.usize);
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const addr = try self.binOp(tag, null, lhs, offset, Type.initTag(.manyptr_u8), Type.usize);
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return addr;
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}
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return try self.binOpRegister(tag, maybe_inst, lhs, rhs, lhs_ty, rhs_ty);
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},
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else => unreachable,
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}
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@ -3494,6 +3483,12 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
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const reg = try self.copyToTmpRegister(ty, mcv);
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return self.genSetStack(ty, stack_offset, MCValue{ .register = reg });
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} else {
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var ptr_ty_payload: Type.Payload.ElemType = .{
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.base = .{ .tag = .single_mut_pointer },
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.data = ty,
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};
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const ptr_ty = Type.initPayload(&ptr_ty_payload.base);
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// TODO call extern memcpy
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const regs = try self.register_manager.allocRegs(5, .{ null, null, null, null, null });
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const src_reg = regs[0];
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@ -3505,20 +3500,9 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
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switch (mcv) {
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.stack_offset => |off| {
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// sub src_reg, fp, #off
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const adj_src_offset = off + @intCast(u32, abi_size);
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const src_offset_op: Instruction.Operand = if (Instruction.Operand.fromU32(adj_src_offset)) |x| x else {
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return self.fail("TODO load: set reg to stack offset with all possible offsets", .{});
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};
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_ = try self.addInst(.{
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.tag = .sub,
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.data = .{ .rr_op = .{
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.rd = src_reg,
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.rn = .fp,
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.op = src_offset_op,
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} },
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});
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try self.genSetReg(ptr_ty, src_reg, .{ .ptr_stack_offset = off });
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},
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.memory => |addr| try self.genSetReg(Type.usize, src_reg, .{ .immediate = @intCast(u32, addr) }),
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.memory => |addr| try self.genSetReg(ptr_ty, src_reg, .{ .immediate = @intCast(u32, addr) }),
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.embedded_in_code,
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.stack_argument_offset,
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=> return self.fail("TODO genSetStack with src={}", .{mcv}),
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@ -3526,18 +3510,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
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}
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// sub dst_reg, fp, #stack_offset
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const adj_dst_offset = stack_offset + abi_size;
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const dst_offset_op: Instruction.Operand = if (Instruction.Operand.fromU32(adj_dst_offset)) |x| x else {
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return self.fail("TODO load: set reg to stack offset with all possible offsets", .{});
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};
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_ = try self.addInst(.{
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.tag = .sub,
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.data = .{ .rr_op = .{
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.rd = dst_reg,
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.rn = .fp,
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.op = dst_offset_op,
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} },
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});
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try self.genSetReg(ptr_ty, dst_reg, .{ .ptr_stack_offset = stack_offset });
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// mov len, #abi_size
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try self.genSetReg(Type.usize, len_reg, .{ .immediate = abi_size });
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@ -3882,6 +3855,12 @@ fn genSetStackArgument(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) I
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const reg = try self.copyToTmpRegister(ty, mcv);
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return self.genSetStackArgument(ty, stack_offset, MCValue{ .register = reg });
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} else {
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var ptr_ty_payload: Type.Payload.ElemType = .{
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.base = .{ .tag = .single_mut_pointer },
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.data = ty,
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};
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const ptr_ty = Type.initPayload(&ptr_ty_payload.base);
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// TODO call extern memcpy
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const regs = try self.register_manager.allocRegs(5, .{ null, null, null, null, null });
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const src_reg = regs[0];
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@ -3893,20 +3872,9 @@ fn genSetStackArgument(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) I
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switch (mcv) {
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.stack_offset => |off| {
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// sub src_reg, fp, #off
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const adj_src_offset = off + abi_size;
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const src_offset_op: Instruction.Operand = if (Instruction.Operand.fromU32(adj_src_offset)) |x| x else {
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return self.fail("TODO load: set reg to stack offset with all possible offsets", .{});
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};
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_ = try self.addInst(.{
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.tag = .sub,
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.data = .{ .rr_op = .{
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.rd = src_reg,
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.rn = .fp,
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.op = src_offset_op,
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} },
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});
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try self.genSetReg(ptr_ty, src_reg, .{ .ptr_stack_offset = off });
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},
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.memory => |addr| try self.genSetReg(Type.usize, src_reg, .{ .immediate = @intCast(u32, addr) }),
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.memory => |addr| try self.genSetReg(ptr_ty, src_reg, .{ .immediate = @intCast(u32, addr) }),
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.stack_argument_offset,
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.embedded_in_code,
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=> return self.fail("TODO genSetStackArgument src={}", .{mcv}),
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@ -105,7 +105,6 @@ fn fnWithAlignedStack() i32 {
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test "implicitly decreasing slice alignment" {
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if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
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const a: u32 align(4) = 3;
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const b: u32 align(8) = 4;
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@ -8,7 +8,6 @@ const expectEqual = testing.expectEqual;
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test "array to slice" {
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if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
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const a: u32 align(4) = 3;
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const b: u32 align(8) = 4;
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@ -984,7 +984,6 @@ test "peer type resolve array pointers, one of them const" {
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test "peer type resolve array pointer and unknown pointer" {
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if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
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const const_array: [4]u8 = undefined;
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