diff --git a/BRANCH_TODO b/BRANCH_TODO index fd005a8276..2d50ce1384 100644 --- a/BRANCH_TODO +++ b/BRANCH_TODO @@ -20,6 +20,7 @@ Merge TODO list: Performance optimizations to look into: * astgen: pass *GenZir as the first arg, not *Module + - point here is to avoid the unnecessary virtual call scope.getGenZir() * don't store end index for blocks; rely on last instruction being noreturn * look into not storing the field name of field access as a string in zir instructions. or, look into introducing interning to string_bytes (local diff --git a/src/astgen.zig b/src/astgen.zig index 7245e09b66..bab9bda8ad 100644 --- a/src/astgen.zig +++ b/src/astgen.zig @@ -1838,25 +1838,21 @@ fn arrayAccess( rl: ResultLoc, node: ast.Node.Index, ) InnerError!zir.Inst.Ref { - if (true) @panic("TODO update for zir-memory-layout"); - const tree = scope.tree(); + const gz = scope.getGenZir(); + const tree = gz.tree(); const main_tokens = tree.nodes.items(.main_token); const node_datas = tree.nodes.items(.data); - - const usize_type = try addZIRInstConst(mod, scope, src, .{ - .ty = Type.initTag(.type), - .val = Value.initTag(.usize_type), - }); - const index_rl: ResultLoc = .{ .ty = usize_type }; switch (rl) { - .ref => return addZirInstTag(mod, scope, src, .elem_ptr, .{ - .array = try expr(mod, scope, .ref, node_datas[node].lhs), - .index = try expr(mod, scope, index_rl, node_datas[node].rhs), - }), - else => return rvalue(mod, scope, rl, try addZirInstTag(mod, scope, src, .elem_val, .{ - .array = try expr(mod, scope, .none, node_datas[node].lhs), - .index = try expr(mod, scope, index_rl, node_datas[node].rhs), - })), + .ref => return gz.addBin( + .elem_ptr, + try expr(mod, scope, .ref, node_datas[node].lhs), + try expr(mod, scope, .{ .ty = .usize_type }, node_datas[node].rhs), + ), + else => return rvalue(mod, scope, rl, try gz.addBin( + .elem_val, + try expr(mod, scope, .none, node_datas[node].lhs), + try expr(mod, scope, .{ .ty = .usize_type }, node_datas[node].rhs), + ), node), } } diff --git a/test/stage2/test.zig b/test/stage2/test.zig index 4ced83a951..757e03da10 100644 --- a/test/stage2/test.zig +++ b/test/stage2/test.zig @@ -917,29 +917,29 @@ pub fn addCases(ctx: *TestContext) !void { ); // Array access. - //case.addCompareOutput( - // \\export fn _start() noreturn { - // \\ assert("hello"[0] == 'h'); - // \\ - // \\ exit(); - // \\} - // \\ - // \\pub fn assert(ok: bool) void { - // \\ if (!ok) unreachable; // assertion failure - // \\} - // \\ - // \\fn exit() noreturn { - // \\ asm volatile ("syscall" - // \\ : - // \\ : [number] "{rax}" (231), - // \\ [arg1] "{rdi}" (0) - // \\ : "rcx", "r11", "memory" - // \\ ); - // \\ unreachable; - // \\} - //, - // "", - //); + case.addCompareOutput( + \\export fn _start() noreturn { + \\ assert("hello"[0] == 'h'); + \\ + \\ exit(); + \\} + \\ + \\pub fn assert(ok: bool) void { + \\ if (!ok) unreachable; // assertion failure + \\} + \\ + \\fn exit() noreturn { + \\ asm volatile ("syscall" + \\ : + \\ : [number] "{rax}" (231), + \\ [arg1] "{rdi}" (0) + \\ : "rcx", "r11", "memory" + \\ ); + \\ unreachable; + \\} + , + "", + ); // 64bit set stack case.addCompareOutput(