libc: Update Linux headers to 6.13.4.

This commit is contained in:
Alex Rønne Petersen 2025-02-24 03:40:54 +01:00
parent 1cc388d526
commit 37706cc1d9
212 changed files with 8818 additions and 609 deletions

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@ -21,7 +21,7 @@
* HWCAP flags - for AT_HWCAP
*
* Bits 62 and 63 are reserved for use by libc.
* Bits 32-61 are unallocated for potential use by libc.
* Bits 33-61 are unallocated for potential use by libc.
*/
#define HWCAP_FP (1 << 0)
#define HWCAP_ASIMD (1 << 1)
@ -55,6 +55,7 @@
#define HWCAP_SB (1 << 29)
#define HWCAP_PACA (1 << 30)
#define HWCAP_PACG (1UL << 31)
#define HWCAP_GCS (1UL << 32)
/*
* HWCAP2 flags - for AT_HWCAP2
@ -122,5 +123,10 @@
#define HWCAP2_SME_SF8FMA (1UL << 60)
#define HWCAP2_SME_SF8DP4 (1UL << 61)
#define HWCAP2_SME_SF8DP2 (1UL << 62)
#define HWCAP2_POE (1UL << 63)
/*
* HWCAP3 flags - for AT_HWCAP3
*/
#endif /* __ASM_HWCAP_H */

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@ -473,6 +473,12 @@ enum {
*/
#define KVM_SYSTEM_EVENT_RESET_FLAG_PSCI_RESET2 (1ULL << 0)
/*
* Shutdown caused by a PSCI v1.3 SYSTEM_OFF2 call.
* Valid only when the system event has a type of KVM_SYSTEM_EVENT_SHUTDOWN.
*/
#define KVM_SYSTEM_EVENT_SHUTDOWN_FLAG_PSCI_OFF2 (1ULL << 0)
/* run->fail_entry.hardware_entry_failure_reason codes. */
#define KVM_EXIT_FAIL_ENTRY_CPU_UNSUPPORTED (1ULL << 0)

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@ -7,4 +7,13 @@
#define PROT_BTI 0x10 /* BTI guarded page */
#define PROT_MTE 0x20 /* Normal Tagged mapping */
/* Override any generic PKEY permission defines */
#define PKEY_DISABLE_EXECUTE 0x4
#define PKEY_DISABLE_READ 0x8
#undef PKEY_ACCESS_MASK
#define PKEY_ACCESS_MASK (PKEY_DISABLE_ACCESS |\
PKEY_DISABLE_WRITE |\
PKEY_DISABLE_READ |\
PKEY_DISABLE_EXECUTE)
#endif /* ! _UAPI__ASM_MMAN_H */

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@ -324,6 +324,14 @@ struct user_za_header {
#define ZA_PT_SIZE(vq) \
(ZA_PT_ZA_OFFSET + ZA_PT_ZA_SIZE(vq))
/* GCS state (NT_ARM_GCS) */
struct user_gcs {
__u64 features_enabled;
__u64 features_locked;
__u64 gcspr_el0;
};
#endif /* __ASSEMBLY__ */
#endif /* __ASM_PTRACE_H */

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@ -98,6 +98,13 @@ struct esr_context {
__u64 esr;
};
#define POE_MAGIC 0x504f4530
struct poe_context {
struct _aarch64_ctx head;
__u64 por_el0;
};
/*
* extra_context: describes extra space in the signal frame for
* additional structures that don't fit in sigcontext.__reserved[].
@ -176,6 +183,15 @@ struct zt_context {
__u16 __reserved[3];
};
#define GCS_MAGIC 0x47435300
struct gcs_context {
struct _aarch64_ctx head;
__u64 gcspr;
__u64 features_enabled;
__u64 reserved;
};
#endif /* !__ASSEMBLY__ */
#include <asm/sve_context.h>
@ -320,10 +336,10 @@ struct zt_context {
((sizeof(struct za_context) + (__SVE_VQ_BYTES - 1)) \
/ __SVE_VQ_BYTES * __SVE_VQ_BYTES)
#define ZA_SIG_REGS_SIZE(vq) ((vq * __SVE_VQ_BYTES) * (vq * __SVE_VQ_BYTES))
#define ZA_SIG_REGS_SIZE(vq) (((vq) * __SVE_VQ_BYTES) * ((vq) * __SVE_VQ_BYTES))
#define ZA_SIG_ZAV_OFFSET(vq, n) (ZA_SIG_REGS_OFFSET + \
(SVE_SIG_ZREG_SIZE(vq) * n))
(SVE_SIG_ZREG_SIZE(vq) * (n)))
#define ZA_SIG_CONTEXT_SIZE(vq) \
(ZA_SIG_REGS_OFFSET + ZA_SIG_REGS_SIZE(vq))
@ -334,7 +350,7 @@ struct zt_context {
#define ZT_SIG_REGS_OFFSET sizeof(struct zt_context)
#define ZT_SIG_REGS_SIZE(n) (ZT_SIG_REG_BYTES * n)
#define ZT_SIG_REGS_SIZE(n) (ZT_SIG_REG_BYTES * (n))
#define ZT_SIG_CONTEXT_SIZE(n) \
(sizeof(struct zt_context) + ZT_SIG_REGS_SIZE(n))

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@ -1,25 +1,2 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Copyright (C) 2012 ARM Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#define __ARCH_WANT_RENAMEAT
#define __ARCH_WANT_NEW_STAT
#define __ARCH_WANT_SET_GET_RLIMIT
#define __ARCH_WANT_TIME32_SYSCALLS
#define __ARCH_WANT_SYS_CLONE3
#define __ARCH_WANT_MEMFD_SECRET
#include <asm-generic/unistd.h>
#include <asm/unistd_64.h>

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@ -0,0 +1,328 @@
#ifndef _ASM_UNISTD_64_H
#define _ASM_UNISTD_64_H
#define __NR_io_setup 0
#define __NR_io_destroy 1
#define __NR_io_submit 2
#define __NR_io_cancel 3
#define __NR_io_getevents 4
#define __NR_setxattr 5
#define __NR_lsetxattr 6
#define __NR_fsetxattr 7
#define __NR_getxattr 8
#define __NR_lgetxattr 9
#define __NR_fgetxattr 10
#define __NR_listxattr 11
#define __NR_llistxattr 12
#define __NR_flistxattr 13
#define __NR_removexattr 14
#define __NR_lremovexattr 15
#define __NR_fremovexattr 16
#define __NR_getcwd 17
#define __NR_lookup_dcookie 18
#define __NR_eventfd2 19
#define __NR_epoll_create1 20
#define __NR_epoll_ctl 21
#define __NR_epoll_pwait 22
#define __NR_dup 23
#define __NR_dup3 24
#define __NR_fcntl 25
#define __NR_inotify_init1 26
#define __NR_inotify_add_watch 27
#define __NR_inotify_rm_watch 28
#define __NR_ioctl 29
#define __NR_ioprio_set 30
#define __NR_ioprio_get 31
#define __NR_flock 32
#define __NR_mknodat 33
#define __NR_mkdirat 34
#define __NR_unlinkat 35
#define __NR_symlinkat 36
#define __NR_linkat 37
#define __NR_renameat 38
#define __NR_umount2 39
#define __NR_mount 40
#define __NR_pivot_root 41
#define __NR_nfsservctl 42
#define __NR_statfs 43
#define __NR_fstatfs 44
#define __NR_truncate 45
#define __NR_ftruncate 46
#define __NR_fallocate 47
#define __NR_faccessat 48
#define __NR_chdir 49
#define __NR_fchdir 50
#define __NR_chroot 51
#define __NR_fchmod 52
#define __NR_fchmodat 53
#define __NR_fchownat 54
#define __NR_fchown 55
#define __NR_openat 56
#define __NR_close 57
#define __NR_vhangup 58
#define __NR_pipe2 59
#define __NR_quotactl 60
#define __NR_getdents64 61
#define __NR_lseek 62
#define __NR_read 63
#define __NR_write 64
#define __NR_readv 65
#define __NR_writev 66
#define __NR_pread64 67
#define __NR_pwrite64 68
#define __NR_preadv 69
#define __NR_pwritev 70
#define __NR_sendfile 71
#define __NR_pselect6 72
#define __NR_ppoll 73
#define __NR_signalfd4 74
#define __NR_vmsplice 75
#define __NR_splice 76
#define __NR_tee 77
#define __NR_readlinkat 78
#define __NR_newfstatat 79
#define __NR_fstat 80
#define __NR_sync 81
#define __NR_fsync 82
#define __NR_fdatasync 83
#define __NR_sync_file_range 84
#define __NR_timerfd_create 85
#define __NR_timerfd_settime 86
#define __NR_timerfd_gettime 87
#define __NR_utimensat 88
#define __NR_acct 89
#define __NR_capget 90
#define __NR_capset 91
#define __NR_personality 92
#define __NR_exit 93
#define __NR_exit_group 94
#define __NR_waitid 95
#define __NR_set_tid_address 96
#define __NR_unshare 97
#define __NR_futex 98
#define __NR_set_robust_list 99
#define __NR_get_robust_list 100
#define __NR_nanosleep 101
#define __NR_getitimer 102
#define __NR_setitimer 103
#define __NR_kexec_load 104
#define __NR_init_module 105
#define __NR_delete_module 106
#define __NR_timer_create 107
#define __NR_timer_gettime 108
#define __NR_timer_getoverrun 109
#define __NR_timer_settime 110
#define __NR_timer_delete 111
#define __NR_clock_settime 112
#define __NR_clock_gettime 113
#define __NR_clock_getres 114
#define __NR_clock_nanosleep 115
#define __NR_syslog 116
#define __NR_ptrace 117
#define __NR_sched_setparam 118
#define __NR_sched_setscheduler 119
#define __NR_sched_getscheduler 120
#define __NR_sched_getparam 121
#define __NR_sched_setaffinity 122
#define __NR_sched_getaffinity 123
#define __NR_sched_yield 124
#define __NR_sched_get_priority_max 125
#define __NR_sched_get_priority_min 126
#define __NR_sched_rr_get_interval 127
#define __NR_restart_syscall 128
#define __NR_kill 129
#define __NR_tkill 130
#define __NR_tgkill 131
#define __NR_sigaltstack 132
#define __NR_rt_sigsuspend 133
#define __NR_rt_sigaction 134
#define __NR_rt_sigprocmask 135
#define __NR_rt_sigpending 136
#define __NR_rt_sigtimedwait 137
#define __NR_rt_sigqueueinfo 138
#define __NR_rt_sigreturn 139
#define __NR_setpriority 140
#define __NR_getpriority 141
#define __NR_reboot 142
#define __NR_setregid 143
#define __NR_setgid 144
#define __NR_setreuid 145
#define __NR_setuid 146
#define __NR_setresuid 147
#define __NR_getresuid 148
#define __NR_setresgid 149
#define __NR_getresgid 150
#define __NR_setfsuid 151
#define __NR_setfsgid 152
#define __NR_times 153
#define __NR_setpgid 154
#define __NR_getpgid 155
#define __NR_getsid 156
#define __NR_setsid 157
#define __NR_getgroups 158
#define __NR_setgroups 159
#define __NR_uname 160
#define __NR_sethostname 161
#define __NR_setdomainname 162
#define __NR_getrlimit 163
#define __NR_setrlimit 164
#define __NR_getrusage 165
#define __NR_umask 166
#define __NR_prctl 167
#define __NR_getcpu 168
#define __NR_gettimeofday 169
#define __NR_settimeofday 170
#define __NR_adjtimex 171
#define __NR_getpid 172
#define __NR_getppid 173
#define __NR_getuid 174
#define __NR_geteuid 175
#define __NR_getgid 176
#define __NR_getegid 177
#define __NR_gettid 178
#define __NR_sysinfo 179
#define __NR_mq_open 180
#define __NR_mq_unlink 181
#define __NR_mq_timedsend 182
#define __NR_mq_timedreceive 183
#define __NR_mq_notify 184
#define __NR_mq_getsetattr 185
#define __NR_msgget 186
#define __NR_msgctl 187
#define __NR_msgrcv 188
#define __NR_msgsnd 189
#define __NR_semget 190
#define __NR_semctl 191
#define __NR_semtimedop 192
#define __NR_semop 193
#define __NR_shmget 194
#define __NR_shmctl 195
#define __NR_shmat 196
#define __NR_shmdt 197
#define __NR_socket 198
#define __NR_socketpair 199
#define __NR_bind 200
#define __NR_listen 201
#define __NR_accept 202
#define __NR_connect 203
#define __NR_getsockname 204
#define __NR_getpeername 205
#define __NR_sendto 206
#define __NR_recvfrom 207
#define __NR_setsockopt 208
#define __NR_getsockopt 209
#define __NR_shutdown 210
#define __NR_sendmsg 211
#define __NR_recvmsg 212
#define __NR_readahead 213
#define __NR_brk 214
#define __NR_munmap 215
#define __NR_mremap 216
#define __NR_add_key 217
#define __NR_request_key 218
#define __NR_keyctl 219
#define __NR_clone 220
#define __NR_execve 221
#define __NR_mmap 222
#define __NR_fadvise64 223
#define __NR_swapon 224
#define __NR_swapoff 225
#define __NR_mprotect 226
#define __NR_msync 227
#define __NR_mlock 228
#define __NR_munlock 229
#define __NR_mlockall 230
#define __NR_munlockall 231
#define __NR_mincore 232
#define __NR_madvise 233
#define __NR_remap_file_pages 234
#define __NR_mbind 235
#define __NR_get_mempolicy 236
#define __NR_set_mempolicy 237
#define __NR_migrate_pages 238
#define __NR_move_pages 239
#define __NR_rt_tgsigqueueinfo 240
#define __NR_perf_event_open 241
#define __NR_accept4 242
#define __NR_recvmmsg 243
#define __NR_wait4 260
#define __NR_prlimit64 261
#define __NR_fanotify_init 262
#define __NR_fanotify_mark 263
#define __NR_name_to_handle_at 264
#define __NR_open_by_handle_at 265
#define __NR_clock_adjtime 266
#define __NR_syncfs 267
#define __NR_setns 268
#define __NR_sendmmsg 269
#define __NR_process_vm_readv 270
#define __NR_process_vm_writev 271
#define __NR_kcmp 272
#define __NR_finit_module 273
#define __NR_sched_setattr 274
#define __NR_sched_getattr 275
#define __NR_renameat2 276
#define __NR_seccomp 277
#define __NR_getrandom 278
#define __NR_memfd_create 279
#define __NR_bpf 280
#define __NR_execveat 281
#define __NR_userfaultfd 282
#define __NR_membarrier 283
#define __NR_mlock2 284
#define __NR_copy_file_range 285
#define __NR_preadv2 286
#define __NR_pwritev2 287
#define __NR_pkey_mprotect 288
#define __NR_pkey_alloc 289
#define __NR_pkey_free 290
#define __NR_statx 291
#define __NR_io_pgetevents 292
#define __NR_rseq 293
#define __NR_kexec_file_load 294
#define __NR_pidfd_send_signal 424
#define __NR_io_uring_setup 425
#define __NR_io_uring_enter 426
#define __NR_io_uring_register 427
#define __NR_open_tree 428
#define __NR_move_mount 429
#define __NR_fsopen 430
#define __NR_fsconfig 431
#define __NR_fsmount 432
#define __NR_fspick 433
#define __NR_pidfd_open 434
#define __NR_clone3 435
#define __NR_close_range 436
#define __NR_openat2 437
#define __NR_pidfd_getfd 438
#define __NR_faccessat2 439
#define __NR_process_madvise 440
#define __NR_epoll_pwait2 441
#define __NR_mount_setattr 442
#define __NR_quotactl_fd 443
#define __NR_landlock_create_ruleset 444
#define __NR_landlock_add_rule 445
#define __NR_landlock_restrict_self 446
#define __NR_memfd_secret 447
#define __NR_process_mrelease 448
#define __NR_futex_waitv 449
#define __NR_set_mempolicy_home_node 450
#define __NR_cachestat 451
#define __NR_fchmodat2 452
#define __NR_map_shadow_stack 453
#define __NR_futex_wake 454
#define __NR_futex_wait 455
#define __NR_futex_requeue 456
#define __NR_statmount 457
#define __NR_listmount 458
#define __NR_lsm_get_self_attr 459
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
#define __NR_setxattrat 463
#define __NR_getxattrat 464
#define __NR_listxattrat 465
#define __NR_removexattrat 466
#endif /* _ASM_UNISTD_64_H */

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@ -80,13 +80,13 @@
* NOTE: _IOW means userland is writing and kernel is reading. _IOR
* means userland is reading and kernel is writing.
*/
#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0)
#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(size)))
#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
#define _IOR_BAD(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size))
#define _IOW_BAD(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
#define _IOWR_BAD(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0)
#define _IOR(type,nr,argtype) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(argtype)))
#define _IOW(type,nr,argtype) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(argtype)))
#define _IOWR(type,nr,argtype) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(argtype)))
#define _IOR_BAD(type,nr,argtype) _IOC(_IOC_READ,(type),(nr),sizeof(argtype))
#define _IOW_BAD(type,nr,argtype) _IOC(_IOC_WRITE,(type),(nr),sizeof(argtype))
#define _IOWR_BAD(type,nr,argtype) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(argtype))
/* used to decode ioctl numbers.. */
#define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK)

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@ -79,6 +79,9 @@
#define MADV_COLLAPSE 25 /* Synchronous hugepage collapse */
#define MADV_GUARD_INSTALL 102 /* fatal signal on access to range */
#define MADV_GUARD_REMOVE 103 /* unguard range */
/* compatibility flags */
#define MAP_FILE 0

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@ -19,4 +19,8 @@
#define MCL_FUTURE 2 /* lock all future mappings */
#define MCL_ONFAULT 4 /* lock all pages that are faulted in */
#define SHADOW_STACK_SET_TOKEN (1ULL << 0) /* Set up a restore token in the shadow stack */
#define SHADOW_STACK_SET_MARKER (1ULL << 1) /* Set up a top of stack marker in the shadow stack */
#endif /* __ASM_GENERIC_MMAN_H */

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@ -46,7 +46,7 @@ union __sifields {
__kernel_timer_t _tid; /* timer id */
int _overrun; /* overrun count */
sigval_t _sigval; /* same as below */
int _sys_private; /* not to be passed to user */
int _sys_private; /* Not used by the kernel. Historic leftover. Always 0. */
} _timer;
/* POSIX.1b signals */

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@ -135,6 +135,14 @@
#define SO_PASSPIDFD 76
#define SO_PEERPIDFD 77
#define SO_DEVMEM_LINEAR 78
#define SCM_DEVMEM_LINEAR SO_DEVMEM_LINEAR
#define SO_DEVMEM_DMABUF 79
#define SCM_DEVMEM_DMABUF SO_DEVMEM_DMABUF
#define SO_DEVMEM_DONTNEED 80
#define SCM_TS_OPT_ID 81
#if __BITS_PER_LONG == 64 || (defined(__x86_64__) && defined(__ILP32__))
/* on 64-bit and x32, avoid the ?: operator */

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@ -776,12 +776,8 @@ __SYSCALL(__NR_fsmount, sys_fsmount)
__SYSCALL(__NR_fspick, sys_fspick)
#define __NR_pidfd_open 434
__SYSCALL(__NR_pidfd_open, sys_pidfd_open)
#ifdef __ARCH_WANT_SYS_CLONE3
#define __NR_clone3 435
__SYSCALL(__NR_clone3, sys_clone3)
#endif
#define __NR_close_range 436
__SYSCALL(__NR_close_range, sys_close_range)
#define __NR_openat2 437
@ -845,8 +841,17 @@ __SYSCALL(__NR_lsm_list_modules, sys_lsm_list_modules)
#define __NR_mseal 462
__SYSCALL(__NR_mseal, sys_mseal)
#define __NR_setxattrat 463
__SYSCALL(__NR_setxattrat, sys_setxattrat)
#define __NR_getxattrat 464
__SYSCALL(__NR_getxattrat, sys_getxattrat)
#define __NR_listxattrat 465
__SYSCALL(__NR_listxattrat, sys_listxattrat)
#define __NR_removexattrat 466
__SYSCALL(__NR_removexattrat, sys_removexattrat)
#undef __NR_syscalls
#define __NR_syscalls 463
#define __NR_syscalls 467
/*
* 32 bit systems traditionally used different

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@ -171,6 +171,8 @@ extern "C" {
* may override the MTYPE selected in AMDGPU_VA_OP_MAP.
*/
#define AMDGPU_GEM_CREATE_EXT_COHERENT (1 << 15)
/* Set PTE.D and recompress during GTT->VRAM moves according to TILING flags. */
#define AMDGPU_GEM_CREATE_GFX12_DCC (1 << 16)
struct drm_amdgpu_gem_create_in {
/** the requested memory size */
@ -392,7 +394,7 @@ struct drm_amdgpu_gem_userptr {
#define AMDGPU_TILING_NUM_BANKS_SHIFT 21
#define AMDGPU_TILING_NUM_BANKS_MASK 0x3
/* GFX9 and later: */
/* GFX9 - GFX11: */
#define AMDGPU_TILING_SWIZZLE_MODE_SHIFT 0
#define AMDGPU_TILING_SWIZZLE_MODE_MASK 0x1f
#define AMDGPU_TILING_DCC_OFFSET_256B_SHIFT 5
@ -406,6 +408,24 @@ struct drm_amdgpu_gem_userptr {
#define AMDGPU_TILING_SCANOUT_SHIFT 63
#define AMDGPU_TILING_SCANOUT_MASK 0x1
/* GFX12 and later: */
#define AMDGPU_TILING_GFX12_SWIZZLE_MODE_SHIFT 0
#define AMDGPU_TILING_GFX12_SWIZZLE_MODE_MASK 0x7
/* These are DCC recompression settings for memory management: */
#define AMDGPU_TILING_GFX12_DCC_MAX_COMPRESSED_BLOCK_SHIFT 3
#define AMDGPU_TILING_GFX12_DCC_MAX_COMPRESSED_BLOCK_MASK 0x3 /* 0:64B, 1:128B, 2:256B */
#define AMDGPU_TILING_GFX12_DCC_NUMBER_TYPE_SHIFT 5
#define AMDGPU_TILING_GFX12_DCC_NUMBER_TYPE_MASK 0x7 /* CB_COLOR0_INFO.NUMBER_TYPE */
#define AMDGPU_TILING_GFX12_DCC_DATA_FORMAT_SHIFT 8
#define AMDGPU_TILING_GFX12_DCC_DATA_FORMAT_MASK 0x3f /* [0:4]:CB_COLOR0_INFO.FORMAT, [5]:MM */
/* When clearing the buffer or moving it from VRAM to GTT, don't compress and set DCC metadata
* to uncompressed. Set when parts of an allocation bypass DCC and read raw data. */
#define AMDGPU_TILING_GFX12_DCC_WRITE_COMPRESS_DISABLE_SHIFT 14
#define AMDGPU_TILING_GFX12_DCC_WRITE_COMPRESS_DISABLE_MASK 0x1
/* bit gap */
#define AMDGPU_TILING_GFX12_SCANOUT_SHIFT 63
#define AMDGPU_TILING_GFX12_SCANOUT_MASK 0x1
/* Set/Get helpers for tiling flags. */
#define AMDGPU_TILING_SET(field, value) \
(((__u64)(value) & AMDGPU_TILING_##field##_MASK) << AMDGPU_TILING_##field##_SHIFT)
@ -1268,6 +1288,16 @@ struct drm_amdgpu_info_gpuvm_fault {
#define AMDGPU_FAMILY_GC_10_3_6 149 /* GC 10.3.6 */
#define AMDGPU_FAMILY_GC_10_3_7 151 /* GC 10.3.7 */
#define AMDGPU_FAMILY_GC_11_5_0 150 /* GC 11.5.0 */
#define AMDGPU_FAMILY_GC_12_0_0 152 /* GC 12.0.0 */
/* FIXME wrong namespace! */
struct drm_color_ctm_3x4 {
/*
* Conversion matrix with 3x4 dimensions in S31.32 sign-magnitude
* (not two's complement!) format.
*/
__u64 matrix[12];
};
#if defined(__cplusplus)
}

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@ -1018,6 +1018,13 @@ struct drm_crtc_queue_sequence {
__u64 user_data; /* user data passed to event */
};
#define DRM_CLIENT_NAME_MAX_LEN 64
struct drm_set_client_name {
__u64 name_len;
__u64 name;
};
#if defined(__cplusplus)
}
#endif
@ -1282,6 +1289,16 @@ extern "C" {
*/
#define DRM_IOCTL_MODE_CLOSEFB DRM_IOWR(0xD0, struct drm_mode_closefb)
/**
* DRM_IOCTL_SET_CLIENT_NAME - Attach a name to a drm_file
*
* Having a name allows for easier tracking and debugging.
* The length of the name (without null ending char) must be
* <= DRM_CLIENT_NAME_MAX_LEN.
* The call will fail if the name contains whitespaces or non-printable chars.
*/
#define DRM_IOCTL_SET_CLIENT_NAME DRM_IOWR(0xD1, struct drm_set_client_name)
/*
* Device specific ioctls should only be in their respective headers
* The device specific ioctl range is from 0x40 to 0x9f.

View File

@ -702,6 +702,31 @@ extern "C" {
*/
#define I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC fourcc_mod_code(INTEL, 15)
/*
* Intel Color Control Surfaces (CCS) for graphics ver. 20 unified compression
* on integrated graphics
*
* The main surface is Tile 4 and at plane index 0. For semi-planar formats
* like NV12, the Y and UV planes are Tile 4 and are located at plane indices
* 0 and 1, respectively. The CCS for all planes are stored outside of the
* GEM object in a reserved memory area dedicated for the storage of the
* CCS data for all compressible GEM objects.
*/
#define I915_FORMAT_MOD_4_TILED_LNL_CCS fourcc_mod_code(INTEL, 16)
/*
* Intel Color Control Surfaces (CCS) for graphics ver. 20 unified compression
* on discrete graphics
*
* The main surface is Tile 4 and at plane index 0. For semi-planar formats
* like NV12, the Y and UV planes are Tile 4 and are located at plane indices
* 0 and 1, respectively. The CCS for all planes are stored outside of the
* GEM object in a reserved memory area dedicated for the storage of the
* CCS data for all compressible GEM objects. The GEM object must be stored in
* contiguous memory with a size aligned to 64KB
*/
#define I915_FORMAT_MOD_4_TILED_BMG_CCS fourcc_mod_code(INTEL, 17)
/*
* Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
*
@ -1476,6 +1501,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
#define AMD_FMT_MOD_TILE_VER_GFX10 2
#define AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS 3
#define AMD_FMT_MOD_TILE_VER_GFX11 4
#define AMD_FMT_MOD_TILE_VER_GFX12 5
/*
* 64K_S is the same for GFX9/GFX10/GFX10_RBPLUS and hence has GFX9 as canonical
@ -1486,13 +1512,31 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
/*
* 64K_D for non-32 bpp is the same for GFX9/GFX10/GFX10_RBPLUS and hence has
* GFX9 as canonical version.
*
* 64K_D_2D on GFX12 is identical to 64K_D on GFX11.
*/
#define AMD_FMT_MOD_TILE_GFX9_64K_D 10
#define AMD_FMT_MOD_TILE_GFX9_4K_D_X 22
#define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25
#define AMD_FMT_MOD_TILE_GFX9_64K_D_X 26
#define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27
#define AMD_FMT_MOD_TILE_GFX11_256K_R_X 31
/* Gfx12 swizzle modes:
* 0 - LINEAR
* 1 - 256B_2D - 2D block dimensions
* 2 - 4KB_2D
* 3 - 64KB_2D
* 4 - 256KB_2D
* 5 - 4KB_3D - 3D block dimensions
* 6 - 64KB_3D
* 7 - 256KB_3D
*/
#define AMD_FMT_MOD_TILE_GFX12_256B_2D 1
#define AMD_FMT_MOD_TILE_GFX12_4K_2D 2
#define AMD_FMT_MOD_TILE_GFX12_64K_2D 3
#define AMD_FMT_MOD_TILE_GFX12_256K_2D 4
#define AMD_FMT_MOD_DCC_BLOCK_64B 0
#define AMD_FMT_MOD_DCC_BLOCK_128B 1
#define AMD_FMT_MOD_DCC_BLOCK_256B 2

View File

@ -846,14 +846,6 @@ struct drm_color_ctm {
__u64 matrix[9];
};
struct drm_color_ctm_3x4 {
/*
* Conversion matrix with 3x4 dimensions in S31.32 sign-magnitude
* (not two's complement!) format.
*/
__u64 matrix[12];
};
struct drm_color_lut {
/*
* Values are mapped linearly to 0.0 - 1.0 range, with 0x0 == 0.0 and
@ -867,6 +859,8 @@ struct drm_color_lut {
/**
* struct drm_plane_size_hint - Plane size hints
* @width: The width of the plane in pixel
* @height: The height of the plane in pixel
*
* The plane SIZE_HINTS property blob contains an
* array of struct drm_plane_size_hint.

View File

@ -2163,6 +2163,15 @@ struct drm_i915_gem_context_param {
* supports this per context flag.
*/
#define I915_CONTEXT_PARAM_LOW_LATENCY 0xe
/*
* I915_CONTEXT_PARAM_CONTEXT_IMAGE:
*
* Allows userspace to provide own context images.
*
* Note that this is a debug API not available on production kernel builds.
*/
#define I915_CONTEXT_PARAM_CONTEXT_IMAGE 0xf
/* Must be kept compact -- no holes and well documented */
/** @value: Context parameter value to be set or queried */
@ -2564,6 +2573,24 @@ struct i915_context_param_engines {
struct i915_engine_class_instance engines[N__]; \
} __attribute__((packed)) name__
struct i915_gem_context_param_context_image {
/** @engine: Engine class & instance to be configured. */
struct i915_engine_class_instance engine;
/** @flags: One of the supported flags or zero. */
__u32 flags;
#define I915_CONTEXT_IMAGE_FLAG_ENGINE_INDEX (1u << 0)
/** @size: Size of the image blob pointed to by @image. */
__u32 size;
/** @mbz: Must be zero. */
__u32 mbz;
/** @image: Userspace memory containing the context image. */
__u64 image;
} __attribute__((packed));
/**
* struct drm_i915_gem_context_create_ext_setparam - Context parameter
* to set or query during context creation.

View File

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (C) 2020-2023 Intel Corporation
* Copyright (C) 2020-2024 Intel Corporation
*/
#ifndef __UAPI_IVPU_DRM_H__
@ -12,15 +12,16 @@
extern "C" {
#endif
#define DRM_IVPU_DRIVER_MAJOR 1
#define DRM_IVPU_DRIVER_MINOR 0
#define DRM_IVPU_GET_PARAM 0x00
#define DRM_IVPU_SET_PARAM 0x01
#define DRM_IVPU_BO_CREATE 0x02
#define DRM_IVPU_BO_INFO 0x03
#define DRM_IVPU_SUBMIT 0x05
#define DRM_IVPU_BO_WAIT 0x06
#define DRM_IVPU_METRIC_STREAMER_START 0x07
#define DRM_IVPU_METRIC_STREAMER_STOP 0x08
#define DRM_IVPU_METRIC_STREAMER_GET_DATA 0x09
#define DRM_IVPU_METRIC_STREAMER_GET_INFO 0x0a
#define DRM_IOCTL_IVPU_GET_PARAM \
DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_GET_PARAM, struct drm_ivpu_param)
@ -40,6 +41,22 @@ extern "C" {
#define DRM_IOCTL_IVPU_BO_WAIT \
DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_WAIT, struct drm_ivpu_bo_wait)
#define DRM_IOCTL_IVPU_METRIC_STREAMER_START \
DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_METRIC_STREAMER_START, \
struct drm_ivpu_metric_streamer_start)
#define DRM_IOCTL_IVPU_METRIC_STREAMER_STOP \
DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_METRIC_STREAMER_STOP, \
struct drm_ivpu_metric_streamer_stop)
#define DRM_IOCTL_IVPU_METRIC_STREAMER_GET_DATA \
DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_METRIC_STREAMER_GET_DATA, \
struct drm_ivpu_metric_streamer_get_data)
#define DRM_IOCTL_IVPU_METRIC_STREAMER_GET_INFO \
DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_METRIC_STREAMER_GET_INFO, \
struct drm_ivpu_metric_streamer_get_data)
/**
* DOC: contexts
*
@ -241,7 +258,7 @@ struct drm_ivpu_bo_info {
/* drm_ivpu_submit engines */
#define DRM_IVPU_ENGINE_COMPUTE 0
#define DRM_IVPU_ENGINE_COPY 1
#define DRM_IVPU_ENGINE_COPY 1 /* Deprecated */
/**
* struct drm_ivpu_submit - Submit commands to the VPU
@ -272,10 +289,6 @@ struct drm_ivpu_submit {
* %DRM_IVPU_ENGINE_COMPUTE:
*
* Performs Deep Learning Neural Compute Inference Operations
*
* %DRM_IVPU_ENGINE_COPY:
*
* Performs memory copy operations to/from system memory allocated for VPU
*/
__u32 engine;
@ -336,6 +349,53 @@ struct drm_ivpu_bo_wait {
__u32 pad;
};
/**
* struct drm_ivpu_metric_streamer_start - Start collecting metric data
*/
struct drm_ivpu_metric_streamer_start {
/** @metric_group_mask: Indicates metric streamer instance */
__u64 metric_group_mask;
/** @sampling_period_ns: Sampling period in nanoseconds */
__u64 sampling_period_ns;
/**
* @read_period_samples:
*
* Number of samples after which user space will try to read the data.
* Reading the data after significantly longer period may cause data loss.
*/
__u32 read_period_samples;
/** @sample_size: Returned size of a single sample in bytes */
__u32 sample_size;
/** @max_data_size: Returned max @data_size from %DRM_IOCTL_IVPU_METRIC_STREAMER_GET_DATA */
__u32 max_data_size;
};
/**
* struct drm_ivpu_metric_streamer_get_data - Copy collected metric data
*/
struct drm_ivpu_metric_streamer_get_data {
/** @metric_group_mask: Indicates metric streamer instance */
__u64 metric_group_mask;
/** @buffer_ptr: A pointer to a destination for the copied data */
__u64 buffer_ptr;
/** @buffer_size: Size of the destination buffer */
__u64 buffer_size;
/**
* @data_size: Returned size of copied metric data
*
* If the @buffer_size is zero, returns the amount of data ready to be copied.
*/
__u64 data_size;
};
/**
* struct drm_ivpu_metric_streamer_stop - Stop collecting metric data
*/
struct drm_ivpu_metric_streamer_stop {
/** @metric_group_mask: Indicates metric streamer instance */
__u64 metric_group_mask;
};
#if defined(__cplusplus)
}
#endif

View File

@ -87,6 +87,9 @@ struct drm_msm_timespec {
#define MSM_PARAM_VA_START 0x0e /* RO: start of valid GPU iova range */
#define MSM_PARAM_VA_SIZE 0x0f /* RO: size of valid GPU iova range (bytes) */
#define MSM_PARAM_HIGHEST_BANK_BIT 0x10 /* RO */
#define MSM_PARAM_RAYTRACING 0x11 /* RO */
#define MSM_PARAM_UBWC_SWIZZLE 0x12 /* RO */
#define MSM_PARAM_MACROTILE_MODE 0x13 /* RO */
/* For backwards compat. The original support for preemption was based on
* a single ring per priority level so # of priority levels equals the #
@ -344,7 +347,10 @@ struct drm_msm_gem_madvise {
* backwards compatibility as a "default" submitqueue
*/
#define MSM_SUBMITQUEUE_FLAGS (0)
#define MSM_SUBMITQUEUE_ALLOW_PREEMPT 0x00000001
#define MSM_SUBMITQUEUE_FLAGS ( \
MSM_SUBMITQUEUE_ALLOW_PREEMPT | \
0)
/*
* The submitqueue priority should be between 0 and MSM_PARAM_PRIORITIES-1,

View File

@ -40,6 +40,7 @@ extern "C" {
#define DRM_IOCTL_PANFROST_PERFCNT_DUMP DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_PERFCNT_DUMP, struct drm_panfrost_perfcnt_dump)
#define PANFROST_JD_REQ_FS (1 << 0)
#define PANFROST_JD_REQ_CYCLE_COUNT (1 << 1)
/**
* struct drm_panfrost_submit - ioctl argument for submitting commands to the 3D
* engine.
@ -172,6 +173,8 @@ enum drm_panfrost_param {
DRM_PANFROST_PARAM_NR_CORE_GROUPS,
DRM_PANFROST_PARAM_THREAD_TLS_ALLOC,
DRM_PANFROST_PARAM_AFBC_FEATURES,
DRM_PANFROST_PARAM_SYSTEM_TIMESTAMP,
DRM_PANFROST_PARAM_SYSTEM_TIMESTAMP_FREQUENCY,
};
struct drm_panfrost_get_param {

View File

@ -260,6 +260,14 @@ enum drm_panthor_dev_query_type {
/** @DRM_PANTHOR_DEV_QUERY_CSIF_INFO: Query command-stream interface information. */
DRM_PANTHOR_DEV_QUERY_CSIF_INFO,
/** @DRM_PANTHOR_DEV_QUERY_TIMESTAMP_INFO: Query timestamp information. */
DRM_PANTHOR_DEV_QUERY_TIMESTAMP_INFO,
/**
* @DRM_PANTHOR_DEV_QUERY_GROUP_PRIORITIES_INFO: Query allowed group priorities information.
*/
DRM_PANTHOR_DEV_QUERY_GROUP_PRIORITIES_INFO,
};
/**
@ -377,6 +385,42 @@ struct drm_panthor_csif_info {
__u32 pad;
};
/**
* struct drm_panthor_timestamp_info - Timestamp information
*
* Structure grouping all queryable information relating to the GPU timestamp.
*/
struct drm_panthor_timestamp_info {
/**
* @timestamp_frequency: The frequency of the timestamp timer or 0 if
* unknown.
*/
__u64 timestamp_frequency;
/** @current_timestamp: The current timestamp. */
__u64 current_timestamp;
/** @timestamp_offset: The offset of the timestamp timer. */
__u64 timestamp_offset;
};
/**
* struct drm_panthor_group_priorities_info - Group priorities information
*
* Structure grouping all queryable information relating to the allowed group priorities.
*/
struct drm_panthor_group_priorities_info {
/**
* @allowed_mask: Bitmask of the allowed group priorities.
*
* Each bit represents a variant of the enum drm_panthor_group_priority.
*/
__u8 allowed_mask;
/** @pad: Padding fields, MBZ. */
__u8 pad[3];
};
/**
* struct drm_panthor_dev_query - Arguments passed to DRM_PANTHOR_IOCTL_DEV_QUERY
*/
@ -692,8 +736,19 @@ enum drm_panthor_group_priority {
/** @PANTHOR_GROUP_PRIORITY_MEDIUM: Medium priority group. */
PANTHOR_GROUP_PRIORITY_MEDIUM,
/** @PANTHOR_GROUP_PRIORITY_HIGH: High priority group. */
/**
* @PANTHOR_GROUP_PRIORITY_HIGH: High priority group.
*
* Requires CAP_SYS_NICE or DRM_MASTER.
*/
PANTHOR_GROUP_PRIORITY_HIGH,
/**
* @PANTHOR_GROUP_PRIORITY_REALTIME: Realtime priority group.
*
* Requires CAP_SYS_NICE or DRM_MASTER.
*/
PANTHOR_GROUP_PRIORITY_REALTIME,
};
/**

View File

@ -42,6 +42,7 @@ extern "C" {
#define DRM_V3D_PERFMON_DESTROY 0x09
#define DRM_V3D_PERFMON_GET_VALUES 0x0a
#define DRM_V3D_SUBMIT_CPU 0x0b
#define DRM_V3D_PERFMON_GET_COUNTER 0x0c
#define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)
#define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)
@ -58,6 +59,8 @@ extern "C" {
#define DRM_IOCTL_V3D_PERFMON_GET_VALUES DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_PERFMON_GET_VALUES, \
struct drm_v3d_perfmon_get_values)
#define DRM_IOCTL_V3D_SUBMIT_CPU DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CPU, struct drm_v3d_submit_cpu)
#define DRM_IOCTL_V3D_PERFMON_GET_COUNTER DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_PERFMON_GET_COUNTER, \
struct drm_v3d_perfmon_get_counter)
#define DRM_V3D_SUBMIT_CL_FLUSH_CACHE 0x01
#define DRM_V3D_SUBMIT_EXTENSION 0x02
@ -286,6 +289,8 @@ enum drm_v3d_param {
DRM_V3D_PARAM_SUPPORTS_PERFMON,
DRM_V3D_PARAM_SUPPORTS_MULTISYNC_EXT,
DRM_V3D_PARAM_SUPPORTS_CPU_QUEUE,
DRM_V3D_PARAM_MAX_PERF_COUNTERS,
DRM_V3D_PARAM_SUPPORTS_SUPER_PAGES,
};
struct drm_v3d_get_param {
@ -599,6 +604,16 @@ struct drm_v3d_submit_cpu {
__u64 extensions;
};
/* The performance counters index represented by this enum are deprecated and
* must no longer be used. These counters are only valid for V3D 4.2.
*
* In order to check for performance counter information,
* use DRM_IOCTL_V3D_PERFMON_GET_COUNTER.
*
* Don't use V3D_PERFCNT_NUM to retrieve the maximum number of performance
* counters. You should use DRM_IOCTL_V3D_GET_PARAM with the following
* parameter: DRM_V3D_PARAM_MAX_PERF_COUNTERS.
*/
enum {
V3D_PERFCNT_FEP_VALID_PRIMTS_NO_PIXELS,
V3D_PERFCNT_FEP_VALID_PRIMS,
@ -717,6 +732,40 @@ struct drm_v3d_perfmon_get_values {
__u64 values_ptr;
};
#define DRM_V3D_PERFCNT_MAX_NAME 64
#define DRM_V3D_PERFCNT_MAX_CATEGORY 32
#define DRM_V3D_PERFCNT_MAX_DESCRIPTION 256
/**
* struct drm_v3d_perfmon_get_counter - ioctl to get the description of a
* performance counter
*
* As userspace needs to retrieve information about the performance counters
* available, this IOCTL allows users to get information about a performance
* counter (name, category and description).
*/
struct drm_v3d_perfmon_get_counter {
/*
* Counter ID
*
* Must be smaller than the maximum number of performance counters, which
* can be retrieve through DRM_V3D_PARAM_MAX_PERF_COUNTERS.
*/
__u8 counter;
/* Name of the counter */
__u8 name[DRM_V3D_PERFCNT_MAX_NAME];
/* Category of the counter */
__u8 category[DRM_V3D_PERFCNT_MAX_CATEGORY];
/* Description of the counter */
__u8 description[DRM_V3D_PERFCNT_MAX_DESCRIPTION];
/* mbz */
__u8 reserved[7];
};
#if defined(__cplusplus)
}
#endif

View File

@ -80,6 +80,7 @@ extern "C" {
* - &DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY
* - &DRM_IOCTL_XE_EXEC
* - &DRM_IOCTL_XE_WAIT_USER_FENCE
* - &DRM_IOCTL_XE_OBSERVATION
*/
/*
@ -100,6 +101,8 @@ extern "C" {
#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x08
#define DRM_XE_EXEC 0x09
#define DRM_XE_WAIT_USER_FENCE 0x0a
#define DRM_XE_OBSERVATION 0x0b
/* Must be kept compact -- no holes */
#define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
@ -113,6 +116,7 @@ extern "C" {
#define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property)
#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
#define DRM_IOCTL_XE_OBSERVATION DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OBSERVATION, struct drm_xe_observation_param)
/**
* DOC: Xe IOCTL Extensions
@ -508,11 +512,21 @@ struct drm_xe_query_gt_list {
* containing the following in mask:
* ``DSS_COMPUTE ff ff ff ff 00 00 00 00``
* means 32 DSS are available for compute.
* - %DRM_XE_TOPO_L3_BANK - To query the mask of enabled L3 banks. This type
* may be omitted if the driver is unable to query the mask from the
* hardware.
* - %DRM_XE_TOPO_EU_PER_DSS - To query the mask of Execution Units (EU)
* available per Dual Sub Slices (DSS). For example a query response
* containing the following in mask:
* ``EU_PER_DSS ff ff 00 00 00 00 00 00``
* means each DSS has 16 EU.
* means each DSS has 16 SIMD8 EUs. This type may be omitted if device
* doesn't have SIMD8 EUs.
* - %DRM_XE_TOPO_SIMD16_EU_PER_DSS - To query the mask of SIMD16 Execution
* Units (EU) available per Dual Sub Slices (DSS). For example a query
* response containing the following in mask:
* ``SIMD16_EU_PER_DSS ff ff 00 00 00 00 00 00``
* means each DSS has 16 SIMD16 EUs. This type may be omitted if device
* doesn't have SIMD16 EUs.
*/
struct drm_xe_query_topology_mask {
/** @gt_id: GT ID the mask is associated with */
@ -520,7 +534,9 @@ struct drm_xe_query_topology_mask {
#define DRM_XE_TOPO_DSS_GEOMETRY 1
#define DRM_XE_TOPO_DSS_COMPUTE 2
#define DRM_XE_TOPO_L3_BANK 3
#define DRM_XE_TOPO_EU_PER_DSS 4
#define DRM_XE_TOPO_SIMD16_EU_PER_DSS 5
/** @type: type of mask */
__u16 type;
@ -683,6 +699,7 @@ struct drm_xe_device_query {
#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
#define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6
#define DRM_XE_DEVICE_QUERY_UC_FW_VERSION 7
#define DRM_XE_DEVICE_QUERY_OA_UNITS 8
/** @query: The type of data to query */
__u32 query;
@ -776,7 +793,13 @@ struct drm_xe_gem_create {
#define DRM_XE_GEM_CPU_CACHING_WC 2
/**
* @cpu_caching: The CPU caching mode to select for this object. If
* mmaping the object the mode selected here will also be used.
* mmaping the object the mode selected here will also be used. The
* exception is when mapping system memory (including data evicted
* to system) on discrete GPUs. The caching mode selected will
* then be overridden to DRM_XE_GEM_CPU_CACHING_WB, and coherency
* between GPU- and CPU is guaranteed. The caching mode of
* existing CPU-mappings will be updated transparently to
* user-space clients.
*/
__u16 cpu_caching;
/** @pad: MBZ */
@ -1368,6 +1391,344 @@ struct drm_xe_wait_user_fence {
__u64 reserved[2];
};
/**
* enum drm_xe_observation_type - Observation stream types
*/
enum drm_xe_observation_type {
/** @DRM_XE_OBSERVATION_TYPE_OA: OA observation stream type */
DRM_XE_OBSERVATION_TYPE_OA,
};
/**
* enum drm_xe_observation_op - Observation stream ops
*/
enum drm_xe_observation_op {
/** @DRM_XE_OBSERVATION_OP_STREAM_OPEN: Open an observation stream */
DRM_XE_OBSERVATION_OP_STREAM_OPEN,
/** @DRM_XE_OBSERVATION_OP_ADD_CONFIG: Add observation stream config */
DRM_XE_OBSERVATION_OP_ADD_CONFIG,
/** @DRM_XE_OBSERVATION_OP_REMOVE_CONFIG: Remove observation stream config */
DRM_XE_OBSERVATION_OP_REMOVE_CONFIG,
};
/**
* struct drm_xe_observation_param - Input of &DRM_XE_OBSERVATION
*
* The observation layer enables multiplexing observation streams of
* multiple types. The actual params for a particular stream operation are
* supplied via the @param pointer (use __copy_from_user to get these
* params).
*/
struct drm_xe_observation_param {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
/** @observation_type: observation stream type, of enum @drm_xe_observation_type */
__u64 observation_type;
/** @observation_op: observation stream op, of enum @drm_xe_observation_op */
__u64 observation_op;
/** @param: Pointer to actual stream params */
__u64 param;
};
/**
* enum drm_xe_observation_ioctls - Observation stream fd ioctl's
*
* Information exchanged between userspace and kernel for observation fd
* ioctl's is stream type specific
*/
enum drm_xe_observation_ioctls {
/** @DRM_XE_OBSERVATION_IOCTL_ENABLE: Enable data capture for an observation stream */
DRM_XE_OBSERVATION_IOCTL_ENABLE = _IO('i', 0x0),
/** @DRM_XE_OBSERVATION_IOCTL_DISABLE: Disable data capture for a observation stream */
DRM_XE_OBSERVATION_IOCTL_DISABLE = _IO('i', 0x1),
/** @DRM_XE_OBSERVATION_IOCTL_CONFIG: Change observation stream configuration */
DRM_XE_OBSERVATION_IOCTL_CONFIG = _IO('i', 0x2),
/** @DRM_XE_OBSERVATION_IOCTL_STATUS: Return observation stream status */
DRM_XE_OBSERVATION_IOCTL_STATUS = _IO('i', 0x3),
/** @DRM_XE_OBSERVATION_IOCTL_INFO: Return observation stream info */
DRM_XE_OBSERVATION_IOCTL_INFO = _IO('i', 0x4),
};
/**
* enum drm_xe_oa_unit_type - OA unit types
*/
enum drm_xe_oa_unit_type {
/**
* @DRM_XE_OA_UNIT_TYPE_OAG: OAG OA unit. OAR/OAC are considered
* sub-types of OAG. For OAR/OAC, use OAG.
*/
DRM_XE_OA_UNIT_TYPE_OAG,
/** @DRM_XE_OA_UNIT_TYPE_OAM: OAM OA unit */
DRM_XE_OA_UNIT_TYPE_OAM,
};
/**
* struct drm_xe_oa_unit - describe OA unit
*/
struct drm_xe_oa_unit {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
/** @oa_unit_id: OA unit ID */
__u32 oa_unit_id;
/** @oa_unit_type: OA unit type of @drm_xe_oa_unit_type */
__u32 oa_unit_type;
/** @capabilities: OA capabilities bit-mask */
__u64 capabilities;
#define DRM_XE_OA_CAPS_BASE (1 << 0)
#define DRM_XE_OA_CAPS_SYNCS (1 << 1)
#define DRM_XE_OA_CAPS_OA_BUFFER_SIZE (1 << 2)
#define DRM_XE_OA_CAPS_WAIT_NUM_REPORTS (1 << 3)
/** @oa_timestamp_freq: OA timestamp freq */
__u64 oa_timestamp_freq;
/** @reserved: MBZ */
__u64 reserved[4];
/** @num_engines: number of engines in @eci array */
__u64 num_engines;
/** @eci: engines attached to this OA unit */
struct drm_xe_engine_class_instance eci[];
};
/**
* struct drm_xe_query_oa_units - describe OA units
*
* If a query is made with a struct drm_xe_device_query where .query
* is equal to DRM_XE_DEVICE_QUERY_OA_UNITS, then the reply uses struct
* drm_xe_query_oa_units in .data.
*
* OA unit properties for all OA units can be accessed using a code block
* such as the one below:
*
* .. code-block:: C
*
* struct drm_xe_query_oa_units *qoa;
* struct drm_xe_oa_unit *oau;
* u8 *poau;
*
* // malloc qoa and issue DRM_XE_DEVICE_QUERY_OA_UNITS. Then:
* poau = (u8 *)&qoa->oa_units[0];
* for (int i = 0; i < qoa->num_oa_units; i++) {
* oau = (struct drm_xe_oa_unit *)poau;
* // Access 'struct drm_xe_oa_unit' fields here
* poau += sizeof(*oau) + oau->num_engines * sizeof(oau->eci[0]);
* }
*/
struct drm_xe_query_oa_units {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
/** @num_oa_units: number of OA units returned in oau[] */
__u32 num_oa_units;
/** @pad: MBZ */
__u32 pad;
/**
* @oa_units: struct @drm_xe_oa_unit array returned for this device.
* Written below as a u64 array to avoid problems with nested flexible
* arrays with some compilers
*/
__u64 oa_units[];
};
/**
* enum drm_xe_oa_format_type - OA format types as specified in PRM/Bspec
* 52198/60942
*/
enum drm_xe_oa_format_type {
/** @DRM_XE_OA_FMT_TYPE_OAG: OAG report format */
DRM_XE_OA_FMT_TYPE_OAG,
/** @DRM_XE_OA_FMT_TYPE_OAR: OAR report format */
DRM_XE_OA_FMT_TYPE_OAR,
/** @DRM_XE_OA_FMT_TYPE_OAM: OAM report format */
DRM_XE_OA_FMT_TYPE_OAM,
/** @DRM_XE_OA_FMT_TYPE_OAC: OAC report format */
DRM_XE_OA_FMT_TYPE_OAC,
/** @DRM_XE_OA_FMT_TYPE_OAM_MPEC: OAM SAMEDIA or OAM MPEC report format */
DRM_XE_OA_FMT_TYPE_OAM_MPEC,
/** @DRM_XE_OA_FMT_TYPE_PEC: PEC report format */
DRM_XE_OA_FMT_TYPE_PEC,
};
/**
* enum drm_xe_oa_property_id - OA stream property id's
*
* Stream params are specified as a chain of @drm_xe_ext_set_property
* struct's, with @property values from enum @drm_xe_oa_property_id and
* @drm_xe_user_extension base.name set to @DRM_XE_OA_EXTENSION_SET_PROPERTY.
* @param field in struct @drm_xe_observation_param points to the first
* @drm_xe_ext_set_property struct.
*
* Exactly the same mechanism is also used for stream reconfiguration using the
* @DRM_XE_OBSERVATION_IOCTL_CONFIG observation stream fd ioctl, though only a
* subset of properties below can be specified for stream reconfiguration.
*/
enum drm_xe_oa_property_id {
#define DRM_XE_OA_EXTENSION_SET_PROPERTY 0
/**
* @DRM_XE_OA_PROPERTY_OA_UNIT_ID: ID of the OA unit on which to open
* the OA stream, see @oa_unit_id in 'struct
* drm_xe_query_oa_units'. Defaults to 0 if not provided.
*/
DRM_XE_OA_PROPERTY_OA_UNIT_ID = 1,
/**
* @DRM_XE_OA_PROPERTY_SAMPLE_OA: A value of 1 requests inclusion of raw
* OA unit reports or stream samples in a global buffer attached to an
* OA unit.
*/
DRM_XE_OA_PROPERTY_SAMPLE_OA,
/**
* @DRM_XE_OA_PROPERTY_OA_METRIC_SET: OA metrics defining contents of OA
* reports, previously added via @DRM_XE_OBSERVATION_OP_ADD_CONFIG.
*/
DRM_XE_OA_PROPERTY_OA_METRIC_SET,
/** @DRM_XE_OA_PROPERTY_OA_FORMAT: OA counter report format */
DRM_XE_OA_PROPERTY_OA_FORMAT,
/*
* OA_FORMAT's are specified the same way as in PRM/Bspec 52198/60942,
* in terms of the following quantities: a. enum @drm_xe_oa_format_type
* b. Counter select c. Counter size and d. BC report. Also refer to the
* oa_formats array in drivers/gpu/drm/xe/xe_oa.c.
*/
#define DRM_XE_OA_FORMAT_MASK_FMT_TYPE (0xffu << 0)
#define DRM_XE_OA_FORMAT_MASK_COUNTER_SEL (0xffu << 8)
#define DRM_XE_OA_FORMAT_MASK_COUNTER_SIZE (0xffu << 16)
#define DRM_XE_OA_FORMAT_MASK_BC_REPORT (0xffu << 24)
/**
* @DRM_XE_OA_PROPERTY_OA_PERIOD_EXPONENT: Requests periodic OA unit
* sampling with sampling frequency proportional to 2^(period_exponent + 1)
*/
DRM_XE_OA_PROPERTY_OA_PERIOD_EXPONENT,
/**
* @DRM_XE_OA_PROPERTY_OA_DISABLED: A value of 1 will open the OA
* stream in a DISABLED state (see @DRM_XE_OBSERVATION_IOCTL_ENABLE).
*/
DRM_XE_OA_PROPERTY_OA_DISABLED,
/**
* @DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID: Open the stream for a specific
* @exec_queue_id. OA queries can be executed on this exec queue.
*/
DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID,
/**
* @DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE: Optional engine instance to
* pass along with @DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID or will default to 0.
*/
DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE,
/**
* @DRM_XE_OA_PROPERTY_NO_PREEMPT: Allow preemption and timeslicing
* to be disabled for the stream exec queue.
*/
DRM_XE_OA_PROPERTY_NO_PREEMPT,
/**
* @DRM_XE_OA_PROPERTY_NUM_SYNCS: Number of syncs in the sync array
* specified in @DRM_XE_OA_PROPERTY_SYNCS
*/
DRM_XE_OA_PROPERTY_NUM_SYNCS,
/**
* @DRM_XE_OA_PROPERTY_SYNCS: Pointer to struct @drm_xe_sync array
* with array size specified via @DRM_XE_OA_PROPERTY_NUM_SYNCS. OA
* configuration will wait till input fences signal. Output fences
* will signal after the new OA configuration takes effect. For
* @DRM_XE_SYNC_TYPE_USER_FENCE, @addr is a user pointer, similar
* to the VM bind case.
*/
DRM_XE_OA_PROPERTY_SYNCS,
/**
* @DRM_XE_OA_PROPERTY_OA_BUFFER_SIZE: Size of OA buffer to be
* allocated by the driver in bytes. Supported sizes are powers of
* 2 from 128 KiB to 128 MiB. When not specified, a 16 MiB OA
* buffer is allocated by default.
*/
DRM_XE_OA_PROPERTY_OA_BUFFER_SIZE,
/**
* @DRM_XE_OA_PROPERTY_WAIT_NUM_REPORTS: Number of reports to wait
* for before unblocking poll or read
*/
DRM_XE_OA_PROPERTY_WAIT_NUM_REPORTS,
};
/**
* struct drm_xe_oa_config - OA metric configuration
*
* Multiple OA configs can be added using @DRM_XE_OBSERVATION_OP_ADD_CONFIG. A
* particular config can be specified when opening an OA stream using
* @DRM_XE_OA_PROPERTY_OA_METRIC_SET property.
*/
struct drm_xe_oa_config {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
/** @uuid: String formatted like "%\08x-%\04x-%\04x-%\04x-%\012x" */
char uuid[36];
/** @n_regs: Number of regs in @regs_ptr */
__u32 n_regs;
/**
* @regs_ptr: Pointer to (register address, value) pairs for OA config
* registers. Expected length of buffer is: (2 * sizeof(u32) * @n_regs).
*/
__u64 regs_ptr;
};
/**
* struct drm_xe_oa_stream_status - OA stream status returned from
* @DRM_XE_OBSERVATION_IOCTL_STATUS observation stream fd ioctl. Userspace can
* call the ioctl to query stream status in response to EIO errno from
* observation fd read().
*/
struct drm_xe_oa_stream_status {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
/** @oa_status: OA stream status (see Bspec 46717/61226) */
__u64 oa_status;
#define DRM_XE_OASTATUS_MMIO_TRG_Q_FULL (1 << 3)
#define DRM_XE_OASTATUS_COUNTER_OVERFLOW (1 << 2)
#define DRM_XE_OASTATUS_BUFFER_OVERFLOW (1 << 1)
#define DRM_XE_OASTATUS_REPORT_LOST (1 << 0)
/** @reserved: reserved for future use */
__u64 reserved[3];
};
/**
* struct drm_xe_oa_stream_info - OA stream info returned from
* @DRM_XE_OBSERVATION_IOCTL_INFO observation stream fd ioctl
*/
struct drm_xe_oa_stream_info {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
/** @oa_buf_size: OA buffer size */
__u64 oa_buf_size;
/** @reserved: reserved for future use */
__u64 reserved[3];
};
#if defined(__cplusplus)
}
#endif

View File

@ -236,6 +236,12 @@ struct binder_frozen_status_info {
__u32 async_recv;
};
struct binder_frozen_state_info {
binder_uintptr_t cookie;
__u32 is_frozen;
__u32 reserved;
};
/* struct binder_extened_error - extended error information
* @id: identifier for the failed operation
* @command: command as defined by binder_driver_return_protocol
@ -467,6 +473,17 @@ enum binder_driver_return_protocol {
/*
* The target of the last async transaction is frozen. No parameters.
*/
BR_FROZEN_BINDER = _IOR('r', 21, struct binder_frozen_state_info),
/*
* The cookie and a boolean (is_frozen) that indicates whether the process
* transitioned into a frozen or an unfrozen state.
*/
BR_CLEAR_FREEZE_NOTIFICATION_DONE = _IOR('r', 22, binder_uintptr_t),
/*
* void *: cookie
*/
};
enum binder_driver_command_protocol {
@ -550,6 +567,25 @@ enum binder_driver_command_protocol {
/*
* binder_transaction_data_sg: the sent command.
*/
BC_REQUEST_FREEZE_NOTIFICATION =
_IOW('c', 19, struct binder_handle_cookie),
/*
* int: handle
* void *: cookie
*/
BC_CLEAR_FREEZE_NOTIFICATION = _IOW('c', 20,
struct binder_handle_cookie),
/*
* int: handle
* void *: cookie
*/
BC_FREEZE_NOTIFICATION_DONE = _IOW('c', 21, binder_uintptr_t),
/*
* void *: cookie
*/
};
#endif /* _LINUX_BINDER_H */

View File

@ -143,6 +143,9 @@
#define AUDIT_MAC_UNLBL_STCDEL 1417 /* NetLabel: del a static label */
#define AUDIT_MAC_CALIPSO_ADD 1418 /* NetLabel: add CALIPSO DOI entry */
#define AUDIT_MAC_CALIPSO_DEL 1419 /* NetLabel: del CALIPSO DOI entry */
#define AUDIT_IPE_ACCESS 1420 /* IPE denial or grant */
#define AUDIT_IPE_CONFIG_CHANGE 1421 /* IPE config change */
#define AUDIT_IPE_POLICY_LOAD 1422 /* IPE policy load */
#define AUDIT_FIRST_KERN_ANOM_MSG 1700
#define AUDIT_LAST_KERN_ANOM_MSG 1799

View File

@ -21,7 +21,7 @@
#define AUTOFS_MIN_PROTO_VERSION 3
#define AUTOFS_MAX_PROTO_VERSION 5
#define AUTOFS_PROTO_SUBVERSION 5
#define AUTOFS_PROTO_SUBVERSION 6
/*
* The wait_queue_token (autofs_wqt_t) is part of a structure which is passed

View File

@ -9,6 +9,7 @@
#include <asm/byteorder.h>
#include <linux/if_ether.h>
#include <linux/stddef.h>
#include <linux/types.h>
/**
@ -592,19 +593,6 @@ struct batadv_tvlv_gateway_data {
__be32 bandwidth_up;
};
/**
* struct batadv_tvlv_tt_data - tt data propagated through the tt tvlv container
* @flags: translation table flags (see batadv_tt_data_flags)
* @ttvn: translation table version number
* @num_vlan: number of announced VLANs. In the TVLV this struct is followed by
* one batadv_tvlv_tt_vlan_data object per announced vlan
*/
struct batadv_tvlv_tt_data {
__u8 flags;
__u8 ttvn;
__be16 num_vlan;
};
/**
* struct batadv_tvlv_tt_vlan_data - vlan specific tt data propagated through
* the tt tvlv container
@ -618,6 +606,21 @@ struct batadv_tvlv_tt_vlan_data {
__u16 reserved;
};
/**
* struct batadv_tvlv_tt_data - tt data propagated through the tt tvlv container
* @flags: translation table flags (see batadv_tt_data_flags)
* @ttvn: translation table version number
* @num_vlan: number of announced VLANs. In the TVLV this struct is followed by
* one batadv_tvlv_tt_vlan_data object per announced vlan
* @vlan_data: array of batadv_tvlv_tt_vlan_data objects
*/
struct batadv_tvlv_tt_data {
__u8 flags;
__u8 ttvn;
__be16 num_vlan;
struct batadv_tvlv_tt_vlan_data vlan_data[] __counted_by_be(num_vlan);
};
/**
* struct batadv_tvlv_tt_change - translation table diff data
* @flags: status indicators concerning the non-mesh client (see

View File

@ -12,4 +12,7 @@
(((~_ULL(0)) - (_ULL(1) << (l)) + 1) & \
(~_ULL(0) >> (__BITS_PER_LONG_LONG - 1 - (h))))
#define __GENMASK_U128(h, l) \
((_BIT128((h)) << 1) - (_BIT128(l)))
#endif /* _LINUX_BITS_H */

View File

@ -0,0 +1,14 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _LINUX_BLKDEV_H
#define _LINUX_BLKDEV_H
#include <linux/ioctl.h>
#include <linux/types.h>
/*
* io_uring block file commands, see IORING_OP_URING_CMD.
* It's a different number space from ioctl(), reuse the block's code 0x12.
*/
#define BLOCK_URING_CMD_DISCARD _IO(0x12, 0)
#endif

View File

@ -1116,11 +1116,15 @@ enum bpf_attach_type {
BPF_NETKIT_PRIMARY,
BPF_NETKIT_PEER,
BPF_TRACE_KPROBE_SESSION,
BPF_TRACE_UPROBE_SESSION,
__MAX_BPF_ATTACH_TYPE
};
#define MAX_BPF_ATTACH_TYPE __MAX_BPF_ATTACH_TYPE
/* Add BPF_LINK_TYPE(type, name) in bpf_types.h to keep bpf_link_type_strs[]
* in sync with the definitions below.
*/
enum bpf_link_type {
BPF_LINK_TYPE_UNSPEC = 0,
BPF_LINK_TYPE_RAW_TRACEPOINT = 1,
@ -1425,6 +1429,8 @@ enum {
#define BPF_F_TEST_RUN_ON_CPU (1U << 0)
/* If set, XDP frames will be transmitted after processing */
#define BPF_F_TEST_XDP_LIVE_FRAMES (1U << 1)
/* If set, apply CHECKSUM_COMPLETE to skb and validate the checksum */
#define BPF_F_TEST_SKB_CHECKSUM_COMPLETE (1U << 2)
/* type for BPF_ENABLE_STATS */
enum bpf_stats_type {
@ -1968,6 +1974,8 @@ union bpf_attr {
* program.
* Return
* The SMP id of the processor running the program.
* Attributes
* __bpf_fastcall
*
* long bpf_skb_store_bytes(struct sk_buff *skb, u32 offset, const void *from, u32 len, u64 flags)
* Description
@ -2849,7 +2857,7 @@ union bpf_attr {
* **TCP_SYNCNT**, **TCP_USER_TIMEOUT**, **TCP_NOTSENT_LOWAT**,
* **TCP_NODELAY**, **TCP_MAXSEG**, **TCP_WINDOW_CLAMP**,
* **TCP_THIN_LINEAR_TIMEOUTS**, **TCP_BPF_DELACK_MAX**,
* **TCP_BPF_RTO_MIN**.
* **TCP_BPF_RTO_MIN**, **TCP_BPF_SOCK_OPS_CB_FLAGS**.
* * **IPPROTO_IP**, which supports *optname* **IP_TOS**.
* * **IPPROTO_IPV6**, which supports the following *optname*\ s:
* **IPV6_TCLASS**, **IPV6_AUTOFLOWLABEL**.
@ -3099,10 +3107,6 @@ union bpf_attr {
* with the **CONFIG_BPF_KPROBE_OVERRIDE** configuration
* option, and in this case it only works on functions tagged with
* **ALLOW_ERROR_INJECTION** in the kernel code.
*
* Also, the helper is only available for the architectures having
* the CONFIG_FUNCTION_ERROR_INJECTION option. As of this writing,
* x86 architecture is the only one to support this feature.
* Return
* 0
*
@ -5367,7 +5371,7 @@ union bpf_attr {
* Currently, the **flags** must be 0. Currently, nr_loops is
* limited to 1 << 23 (~8 million) loops.
*
* long (\*callback_fn)(u32 index, void \*ctx);
* long (\*callback_fn)(u64 index, void \*ctx);
*
* where **index** is the current index in the loop. The index
* is zero-indexed.
@ -5517,11 +5521,12 @@ union bpf_attr {
* **-EOPNOTSUPP** if the hash calculation failed or **-EINVAL** if
* invalid arguments are passed.
*
* void *bpf_kptr_xchg(void *map_value, void *ptr)
* void *bpf_kptr_xchg(void *dst, void *ptr)
* Description
* Exchange kptr at pointer *map_value* with *ptr*, and return the
* old value. *ptr* can be NULL, otherwise it must be a referenced
* pointer which will be released when this helper is called.
* Exchange kptr at pointer *dst* with *ptr*, and return the old value.
* *dst* can be map value or local kptr. *ptr* can be NULL, otherwise
* it must be a referenced pointer which will be released when this helper
* is called.
* Return
* The old value of kptr (which can be NULL). The returned pointer
* if not NULL, is a reference which must be released using its
@ -6044,11 +6049,6 @@ enum {
BPF_F_MARK_ENFORCE = (1ULL << 6),
};
/* BPF_FUNC_clone_redirect and BPF_FUNC_redirect flags. */
enum {
BPF_F_INGRESS = (1ULL << 0),
};
/* BPF_FUNC_skb_set_tunnel_key and BPF_FUNC_skb_get_tunnel_key flags. */
enum {
BPF_F_TUNINFO_IPV6 = (1ULL << 0),
@ -6195,10 +6195,12 @@ enum {
BPF_F_BPRM_SECUREEXEC = (1ULL << 0),
};
/* Flags for bpf_redirect_map helper */
/* Flags for bpf_redirect and bpf_redirect_map helpers */
enum {
BPF_F_BROADCAST = (1ULL << 3),
BPF_F_EXCLUDE_INGRESS = (1ULL << 4),
BPF_F_INGRESS = (1ULL << 0), /* used for skb path */
BPF_F_BROADCAST = (1ULL << 3), /* used for XDP path */
BPF_F_EXCLUDE_INGRESS = (1ULL << 4), /* used for XDP path */
#define BPF_F_REDIRECT_FLAGS (BPF_F_INGRESS | BPF_F_BROADCAST | BPF_F_EXCLUDE_INGRESS)
};
#define __bpf_md_ptr(type, name) \
@ -6207,12 +6209,17 @@ union { \
__u64 :64; \
} __attribute__((aligned(8)))
/* The enum used in skb->tstamp_type. It specifies the clock type
* of the time stored in the skb->tstamp.
*/
enum {
BPF_SKB_TSTAMP_UNSPEC,
BPF_SKB_TSTAMP_DELIVERY_MONO, /* tstamp has mono delivery time */
/* For any BPF_SKB_TSTAMP_* that the bpf prog cannot handle,
* the bpf prog should handle it like BPF_SKB_TSTAMP_UNSPEC
* and try to deduce it by ingress, egress or skb->sk->sk_clockid.
BPF_SKB_TSTAMP_UNSPEC = 0, /* DEPRECATED */
BPF_SKB_TSTAMP_DELIVERY_MONO = 1, /* DEPRECATED */
BPF_SKB_CLOCK_REALTIME = 0,
BPF_SKB_CLOCK_MONOTONIC = 1,
BPF_SKB_CLOCK_TAI = 2,
/* For any future BPF_SKB_CLOCK_* that the bpf prog cannot handle,
* the bpf prog can try to deduce it by ingress/egress/skb->sk->sk_clockid.
*/
};
@ -7073,6 +7080,7 @@ enum {
TCP_BPF_SYN = 1005, /* Copy the TCP header */
TCP_BPF_SYN_IP = 1006, /* Copy the IP[46] and TCP header */
TCP_BPF_SYN_MAC = 1007, /* Copy the MAC, IP[46], and TCP header */
TCP_BPF_SOCK_OPS_CB_FLAGS = 1008, /* Get or Set TCP sock ops flags */
};
enum {
@ -7505,4 +7513,13 @@ struct bpf_iter_num {
__u64 __opaque[1];
} __attribute__((aligned(8)));
/*
* Flags to control BPF kfunc behaviour.
* - BPF_F_PAD_ZEROS: Pad destination buffer with zeros. (See the respective
* helper documentation for details.)
*/
enum bpf_kfunc_flags {
BPF_F_PAD_ZEROS = (1ULL << 0),
};
#endif /* __LINUX_BPF_H__ */

View File

@ -1047,6 +1047,29 @@ struct btrfs_ioctl_encoded_io_args {
#define BTRFS_ENCODED_IO_ENCRYPTION_NONE 0
#define BTRFS_ENCODED_IO_ENCRYPTION_TYPES 1
/*
* Wait for subvolume cleaning process. This queries the kernel queue and it
* can change between the calls.
*
* - FOR_ONE - specify the subvolid
* - FOR_QUEUED - wait for all currently queued
* - COUNT - count number of queued
* - PEEK_FIRST - read which is the first in the queue (to be cleaned or being
* cleaned already), or 0 if the queue is empty
* - PEEK_LAST - read the last subvolid in the queue, or 0 if the queue is empty
*/
struct btrfs_ioctl_subvol_wait {
__u64 subvolid;
__u32 mode;
__u32 count;
};
#define BTRFS_SUBVOL_SYNC_WAIT_FOR_ONE (0)
#define BTRFS_SUBVOL_SYNC_WAIT_FOR_QUEUED (1)
#define BTRFS_SUBVOL_SYNC_COUNT (2)
#define BTRFS_SUBVOL_SYNC_PEEK_FIRST (3)
#define BTRFS_SUBVOL_SYNC_PEEK_LAST (4)
/* Error codes as returned by the kernel */
enum btrfs_err_code {
BTRFS_ERROR_DEV_RAID1_MIN_NOT_MET = 1,
@ -1179,6 +1202,8 @@ enum btrfs_err_code {
struct btrfs_ioctl_encoded_io_args)
#define BTRFS_IOC_ENCODED_WRITE _IOW(BTRFS_IOCTL_MAGIC, 64, \
struct btrfs_ioctl_encoded_io_args)
#define BTRFS_IOC_SUBVOL_SYNC_WAIT _IOW(BTRFS_IOCTL_MAGIC, 65, \
struct btrfs_ioctl_subvol_wait)
#ifdef __cplusplus
}

View File

@ -743,21 +743,9 @@ struct btrfs_raid_stride {
__le64 physical;
} __attribute__ ((__packed__));
/* The stripe_extent::encoding, 1:1 mapping of enum btrfs_raid_types. */
#define BTRFS_STRIPE_RAID0 1
#define BTRFS_STRIPE_RAID1 2
#define BTRFS_STRIPE_DUP 3
#define BTRFS_STRIPE_RAID10 4
#define BTRFS_STRIPE_RAID5 5
#define BTRFS_STRIPE_RAID6 6
#define BTRFS_STRIPE_RAID1C3 7
#define BTRFS_STRIPE_RAID1C4 8
struct btrfs_stripe_extent {
__u8 encoding;
__u8 reserved[7];
/* An array of raid strides this stripe is composed of. */
struct btrfs_raid_stride strides[];
__DECLARE_FLEX_ARRAY(struct btrfs_raid_stride, strides);
} __attribute__ ((__packed__));
#define BTRFS_HEADER_FLAG_WRITTEN (1ULL << 0)
@ -773,6 +761,14 @@ struct btrfs_stripe_extent {
#define BTRFS_SUPER_FLAG_CHANGING_FSID (1ULL << 35)
#define BTRFS_SUPER_FLAG_CHANGING_FSID_V2 (1ULL << 36)
/*
* Those are temporaray flags utilized by btrfs-progs to do offline conversion.
* They are rejected by kernel.
* But still keep them all here to avoid conflicts.
*/
#define BTRFS_SUPER_FLAG_CHANGING_BG_TREE (1ULL << 38)
#define BTRFS_SUPER_FLAG_CHANGING_DATA_CSUM (1ULL << 39)
#define BTRFS_SUPER_FLAG_CHANGING_META_CSUM (1ULL << 40)
/*
* items in the extent btree are used to record the objectid of the

View File

@ -2,7 +2,7 @@
/*
* linux/can/isotp.h
*
* Definitions for isotp CAN sockets (ISO 15765-2:2016)
* Definitions for ISO 15765-2 CAN transport protocol sockets
*
* Copyright (c) 2020 Volkswagen Group Electronic Research
* All rights reserved.

View File

@ -132,6 +132,8 @@ static __inline__ void cec_msg_init(struct cec_msg *msg,
* Set the msg destination to the orig initiator and the msg initiator to the
* orig destination. Note that msg and orig may be the same pointer, in which
* case the change is done in place.
*
* It also zeroes the reply, timeout and flags fields.
*/
static __inline__ void cec_msg_set_reply_to(struct cec_msg *msg,
struct cec_msg *orig)
@ -139,7 +141,9 @@ static __inline__ void cec_msg_set_reply_to(struct cec_msg *msg,
/* The destination becomes the initiator and vice versa */
msg->msg[0] = (cec_msg_destination(orig) << 4) |
cec_msg_initiator(orig);
msg->reply = msg->timeout = 0;
msg->reply = 0;
msg->timeout = 0;
msg->flags = 0;
}
/**
@ -165,6 +169,7 @@ static __inline__ int cec_msg_recv_is_rx_result(const struct cec_msg *msg)
/* cec_msg flags field */
#define CEC_MSG_FL_REPLY_TO_FOLLOWERS (1 << 0)
#define CEC_MSG_FL_RAW (1 << 1)
#define CEC_MSG_FL_REPLY_VENDOR_ID (1 << 2)
/* cec_msg tx/rx_status field */
#define CEC_TX_STATUS_OK (1 << 0)
@ -339,6 +344,8 @@ static __inline__ int cec_is_unconfigured(__u16 log_addr_mask)
#define CEC_CAP_MONITOR_PIN (1 << 7)
/* CEC_ADAP_G_CONNECTOR_INFO is available */
#define CEC_CAP_CONNECTOR_INFO (1 << 8)
/* CEC_MSG_FL_REPLY_VENDOR_ID is available */
#define CEC_CAP_REPLY_VENDOR_ID (1 << 9)
/**
* struct cec_caps - CEC capabilities structure.

View File

@ -28,6 +28,23 @@
#define _BITUL(x) (_UL(1) << (x))
#define _BITULL(x) (_ULL(1) << (x))
#if !defined(__ASSEMBLY__)
/*
* Missing __asm__ support
*
* __BIT128() would not work in the __asm__ code, as it shifts an
* 'unsigned __init128' data type as direct representation of
* 128 bit constants is not supported in the gcc compiler, as
* they get silently truncated.
*
* TODO: Please revisit this implementation when gcc compiler
* starts representing 128 bit constants directly like long
* and unsigned long etc. Subsequently drop the comment for
* GENMASK_U128() which would then start supporting __asm__ code.
*/
#define _BIT128(x) ((unsigned __int128)(1) << (x))
#endif
#define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (__typeof__(x))(a) - 1)
#define __ALIGN_KERNEL_MASK(x, mask) (((x) + (mask)) & ~(mask))

View File

@ -64,6 +64,7 @@ enum crypto_attr_type_t {
CRYPTOCFGA_STAT_AKCIPHER, /* No longer supported, do not use. */
CRYPTOCFGA_STAT_KPP, /* No longer supported, do not use. */
CRYPTOCFGA_STAT_ACOMP, /* No longer supported, do not use. */
CRYPTOCFGA_REPORT_SIG, /* struct crypto_report_sig */
__CRYPTOCFGA_MAX
#define CRYPTOCFGA_MAX (__CRYPTOCFGA_MAX - 1)
@ -207,6 +208,10 @@ struct crypto_report_acomp {
char type[CRYPTO_MAX_NAME];
};
struct crypto_report_sig {
char type[CRYPTO_MAX_NAME];
};
#define CRYPTO_REPORT_MAXSIZE (sizeof(struct crypto_user_alg) + \
sizeof(struct crypto_report_blkcipher))

View File

@ -71,6 +71,8 @@ struct dlm_lksb {
/* DLM_LSFL_TIMEWARN is deprecated and reserved. DO NOT USE! */
#define DLM_LSFL_TIMEWARN 0x00000002
#define DLM_LSFL_NEWEXCL 0x00000008
/* currently reserved due in-kernel use */
#define __DLM_LSFL_RESERVED0 0x00000010
#endif /* __DLM_DOT_H__ */

View File

@ -19,7 +19,7 @@
#define DMA_HEAP_VALID_FD_FLAGS (O_CLOEXEC | O_ACCMODE)
/* Currently no heap flags */
#define DMA_HEAP_VALID_HEAP_FLAGS (0)
#define DMA_HEAP_VALID_HEAP_FLAGS (0ULL)
/**
* struct dma_heap_allocation_data - metadata passed from userspace for

View File

@ -79,6 +79,29 @@ enum dpll_lock_status_error {
DPLL_LOCK_STATUS_ERROR_MAX = (__DPLL_LOCK_STATUS_ERROR_MAX - 1)
};
/*
* level of quality of a clock device. This mainly applies when the dpll
* lock-status is DPLL_LOCK_STATUS_HOLDOVER. The current list is defined
* according to the table 11-7 contained in ITU-T G.8264/Y.1364 document. One
* may extend this list freely by other ITU-T defined clock qualities, or
* different ones defined by another standardization body (for those, please
* use different prefix).
*/
enum dpll_clock_quality_level {
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_PRC = 1,
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_SSU_A,
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_SSU_B,
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EEC1,
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_PRTC,
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EPRTC,
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EEEC,
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EPRC,
/* private: */
__DPLL_CLOCK_QUALITY_LEVEL_MAX,
DPLL_CLOCK_QUALITY_LEVEL_MAX = (__DPLL_CLOCK_QUALITY_LEVEL_MAX - 1)
};
#define DPLL_TEMP_DIVIDER 1000
/**
@ -180,6 +203,7 @@ enum dpll_a {
DPLL_A_TEMP,
DPLL_A_TYPE,
DPLL_A_LOCK_STATUS_ERROR,
DPLL_A_CLOCK_QUALITY_LEVEL,
__DPLL_A_MAX,
DPLL_A_MAX = (__DPLL_A_MAX - 1)
@ -210,6 +234,9 @@ enum dpll_a_pin {
DPLL_A_PIN_PHASE_ADJUST,
DPLL_A_PIN_PHASE_OFFSET,
DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET,
DPLL_A_PIN_ESYNC_FREQUENCY,
DPLL_A_PIN_ESYNC_FREQUENCY_SUPPORTED,
DPLL_A_PIN_ESYNC_PULSE,
__DPLL_A_PIN_MAX,
DPLL_A_PIN_MAX = (__DPLL_A_PIN_MAX - 1)

View File

@ -411,6 +411,7 @@ typedef struct elf64_shdr {
#define NT_X86_XSTATE 0x202 /* x86 extended state using xsave */
/* Old binutils treats 0x203 as a CET state */
#define NT_X86_SHSTK 0x204 /* x86 SHSTK state */
#define NT_X86_XSAVE_LAYOUT 0x205 /* XSAVE layout description */
#define NT_S390_HIGH_GPRS 0x300 /* s390 upper register halves */
#define NT_S390_TIMER 0x301 /* s390 timer register */
#define NT_S390_TODCMP 0x302 /* s390 TOD clock comparator register */
@ -441,6 +442,8 @@ typedef struct elf64_shdr {
#define NT_ARM_ZA 0x40c /* ARM SME ZA registers */
#define NT_ARM_ZT 0x40d /* ARM SME ZT registers */
#define NT_ARM_FPMR 0x40e /* ARM floating point mode register */
#define NT_ARM_POE 0x40f /* ARM POE registers */
#define NT_ARM_GCS 0x410 /* ARM GCS state */
#define NT_ARC_V2 0x600 /* ARCv2 accumulator/extra registers */
#define NT_VMCOREDD 0x700 /* Vmcore Device Dump Note */
#define NT_MIPS_DSP 0x800 /* MIPS DSP ASE registers */
@ -448,6 +451,7 @@ typedef struct elf64_shdr {
#define NT_MIPS_MSA 0x802 /* MIPS SIMD registers */
#define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */
#define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */
#define NT_RISCV_TAGGED_ADDR_CTRL 0x902 /* RISC-V tagged address control (prctl()) */
#define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */
#define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */
#define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */

View File

@ -750,6 +750,197 @@ enum ethtool_module_power_mode {
ETHTOOL_MODULE_POWER_MODE_HIGH,
};
/**
* enum ethtool_c33_pse_ext_state - groups of PSE extended states
* functions. IEEE 802.3-2022 33.2.4.4 Variables
*
* @ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION: Group of error_condition states
* @ETHTOOL_C33_PSE_EXT_STATE_MR_MPS_VALID: Group of mr_mps_valid states
* @ETHTOOL_C33_PSE_EXT_STATE_MR_PSE_ENABLE: Group of mr_pse_enable states
* @ETHTOOL_C33_PSE_EXT_STATE_OPTION_DETECT_TED: Group of option_detect_ted
* states
* @ETHTOOL_C33_PSE_EXT_STATE_OPTION_VPORT_LIM: Group of option_vport_lim states
* @ETHTOOL_C33_PSE_EXT_STATE_OVLD_DETECTED: Group of ovld_detected states
* @ETHTOOL_C33_PSE_EXT_STATE_PD_DLL_POWER_TYPE: Group of pd_dll_power_type
* states
* @ETHTOOL_C33_PSE_EXT_STATE_POWER_NOT_AVAILABLE: Group of power_not_available
* states
* @ETHTOOL_C33_PSE_EXT_STATE_SHORT_DETECTED: Group of short_detected states
*/
enum ethtool_c33_pse_ext_state {
ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION = 1,
ETHTOOL_C33_PSE_EXT_STATE_MR_MPS_VALID,
ETHTOOL_C33_PSE_EXT_STATE_MR_PSE_ENABLE,
ETHTOOL_C33_PSE_EXT_STATE_OPTION_DETECT_TED,
ETHTOOL_C33_PSE_EXT_STATE_OPTION_VPORT_LIM,
ETHTOOL_C33_PSE_EXT_STATE_OVLD_DETECTED,
ETHTOOL_C33_PSE_EXT_STATE_PD_DLL_POWER_TYPE,
ETHTOOL_C33_PSE_EXT_STATE_POWER_NOT_AVAILABLE,
ETHTOOL_C33_PSE_EXT_STATE_SHORT_DETECTED,
};
/**
* enum ethtool_c33_pse_ext_substate_mr_mps_valid - mr_mps_valid states
* functions. IEEE 802.3-2022 33.2.4.4 Variables
*
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_DETECTED_UNDERLOAD: Underload
* state
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_CONNECTION_OPEN: Port is not
* connected
*
* The PSE monitors either the DC or AC Maintain Power Signature
* (MPS, see 33.2.9.1). This variable indicates the presence or absence of
* a valid MPS.
*/
enum ethtool_c33_pse_ext_substate_mr_mps_valid {
ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_DETECTED_UNDERLOAD = 1,
ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_CONNECTION_OPEN,
};
/**
* enum ethtool_c33_pse_ext_substate_error_condition - error_condition states
* functions. IEEE 802.3-2022 33.2.4.4 Variables
*
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_NON_EXISTING_PORT: Non-existing
* port number
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNDEFINED_PORT: Undefined port
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_INTERNAL_HW_FAULT: Internal
* hardware fault
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_COMM_ERROR_AFTER_FORCE_ON:
* Communication error after force on
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNKNOWN_PORT_STATUS: Unknown
* port status
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_TURN_OFF: Host
* crash turn off
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_FORCE_SHUTDOWN:
* Host crash force shutdown
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_CONFIG_CHANGE: Configuration
* change
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_DETECTED_OVER_TEMP: Over
* temperature detected
*
* error_condition is a variable indicating the status of
* implementation-specific fault conditions or optionally other system faults
* that prevent the PSE from meeting the specifications in Table 3311 and that
* require the PSE not to source power. These error conditions are different
* from those monitored by the state diagrams in Figure 3310.
*/
enum ethtool_c33_pse_ext_substate_error_condition {
ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_NON_EXISTING_PORT = 1,
ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNDEFINED_PORT,
ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_INTERNAL_HW_FAULT,
ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_COMM_ERROR_AFTER_FORCE_ON,
ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNKNOWN_PORT_STATUS,
ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_TURN_OFF,
ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_FORCE_SHUTDOWN,
ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_CONFIG_CHANGE,
ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_DETECTED_OVER_TEMP,
};
/**
* enum ethtool_c33_pse_ext_substate_mr_pse_enable - mr_pse_enable states
* functions. IEEE 802.3-2022 33.2.4.4 Variables
*
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_PSE_ENABLE_DISABLE_PIN_ACTIVE: Disable
* pin active
*
* mr_pse_enable is control variable that selects PSE operation and test
* functions.
*/
enum ethtool_c33_pse_ext_substate_mr_pse_enable {
ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_PSE_ENABLE_DISABLE_PIN_ACTIVE = 1,
};
/**
* enum ethtool_c33_pse_ext_substate_option_detect_ted - option_detect_ted
* states functions. IEEE 802.3-2022 33.2.4.4 Variables
*
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_DET_IN_PROCESS: Detection
* in process
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_CONNECTION_CHECK_ERROR:
* Connection check error
*
* option_detect_ted is a variable indicating if detection can be performed
* by the PSE during the ted_timer interval.
*/
enum ethtool_c33_pse_ext_substate_option_detect_ted {
ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_DET_IN_PROCESS = 1,
ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_CONNECTION_CHECK_ERROR,
};
/**
* enum ethtool_c33_pse_ext_substate_option_vport_lim - option_vport_lim states
* functions. IEEE 802.3-2022 33.2.4.4 Variables
*
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_HIGH_VOLTAGE: Main supply
* voltage is high
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_LOW_VOLTAGE: Main supply
* voltage is low
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_VOLTAGE_INJECTION: Voltage
* injection into the port
*
* option_vport_lim is an optional variable indicates if VPSE is out of the
* operating range during normal operating state.
*/
enum ethtool_c33_pse_ext_substate_option_vport_lim {
ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_HIGH_VOLTAGE = 1,
ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_LOW_VOLTAGE,
ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_VOLTAGE_INJECTION,
};
/**
* enum ethtool_c33_pse_ext_substate_ovld_detected - ovld_detected states
* functions. IEEE 802.3-2022 33.2.4.4 Variables
*
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_OVLD_DETECTED_OVERLOAD: Overload state
*
* ovld_detected is a variable indicating if the PSE output current has been
* in an overload condition (see 33.2.7.6) for at least TCUT of a one-second
* sliding time.
*/
enum ethtool_c33_pse_ext_substate_ovld_detected {
ETHTOOL_C33_PSE_EXT_SUBSTATE_OVLD_DETECTED_OVERLOAD = 1,
};
/**
* enum ethtool_c33_pse_ext_substate_power_not_available - power_not_available
* states functions. IEEE 802.3-2022 33.2.4.4 Variables
*
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_BUDGET_EXCEEDED: Power
* budget exceeded for the controller
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PORT_PW_LIMIT_EXCEEDS_CONTROLLER_BUDGET:
* Configured port power limit exceeded controller power budget
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PD_REQUEST_EXCEEDS_PORT_LIMIT:
* Power request from PD exceeds port limit
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_HW_PW_LIMIT: Power
* denied due to Hardware power limit
*
* power_not_available is a variable that is asserted in an
* implementation-dependent manner when the PSE is no longer capable of
* sourcing sufficient power to support the attached PD. Sufficient power
* is defined by classification; see 33.2.6.
*/
enum ethtool_c33_pse_ext_substate_power_not_available {
ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_BUDGET_EXCEEDED = 1,
ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PORT_PW_LIMIT_EXCEEDS_CONTROLLER_BUDGET,
ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PD_REQUEST_EXCEEDS_PORT_LIMIT,
ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_HW_PW_LIMIT,
};
/**
* enum ethtool_c33_pse_ext_substate_short_detected - short_detected states
* functions. IEEE 802.3-2022 33.2.4.4 Variables
*
* @ETHTOOL_C33_PSE_EXT_SUBSTATE_SHORT_DETECTED_SHORT_CONDITION: Short
* condition was detected
*
* short_detected is a variable indicating if the PSE output current has been
* in a short circuit condition for TLIM within a sliding window (see 33.2.7.7).
*/
enum ethtool_c33_pse_ext_substate_short_detected {
ETHTOOL_C33_PSE_EXT_SUBSTATE_SHORT_DETECTED_SHORT_CONDITION = 1,
};
/**
* enum ethtool_pse_types - Types of PSE controller.
* @ETHTOOL_PSE_UNKNOWN: Type of PSE controller is unknown
@ -875,6 +1066,24 @@ enum ethtool_mm_verify_status {
ETHTOOL_MM_VERIFY_STATUS_DISABLED,
};
/**
* enum ethtool_module_fw_flash_status - plug-in module firmware flashing status
* @ETHTOOL_MODULE_FW_FLASH_STATUS_STARTED: The firmware flashing process has
* started.
* @ETHTOOL_MODULE_FW_FLASH_STATUS_IN_PROGRESS: The firmware flashing process
* is in progress.
* @ETHTOOL_MODULE_FW_FLASH_STATUS_COMPLETED: The firmware flashing process was
* completed successfully.
* @ETHTOOL_MODULE_FW_FLASH_STATUS_ERROR: The firmware flashing process was
* stopped due to an error.
*/
enum ethtool_module_fw_flash_status {
ETHTOOL_MODULE_FW_FLASH_STATUS_STARTED = 1,
ETHTOOL_MODULE_FW_FLASH_STATUS_IN_PROGRESS,
ETHTOOL_MODULE_FW_FLASH_STATUS_COMPLETED,
ETHTOOL_MODULE_FW_FLASH_STATUS_ERROR,
};
/**
* struct ethtool_gstrings - string set for data tagging
* @cmd: Command number = %ETHTOOL_GSTRINGS
@ -1843,6 +2052,7 @@ enum ethtool_link_mode_bit_indices {
ETHTOOL_LINK_MODE_10baseT1S_Full_BIT = 99,
ETHTOOL_LINK_MODE_10baseT1S_Half_BIT = 100,
ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT = 101,
ETHTOOL_LINK_MODE_10baseT1BRR_Full_BIT = 102,
/* must be last entry */
__ETHTOOL_LINK_MODE_MASK_NBITS
@ -2314,6 +2524,11 @@ struct ethtool_link_settings {
__u8 master_slave_state;
__u8 rate_matching;
__u32 reserved[7];
/* Linux builds with -Wflex-array-member-not-at-end but does
* not use the "link_mode_masks" member. Leave it defined for
* userspace for now, and when userspace wants to start using
* -Wfamnae, we'll need a new solution.
*/
__u32 link_mode_masks[];
/* layout of link_mode_masks fields:
* __u32 map_supported[link_mode_masks_nwords];
@ -2321,4 +2536,20 @@ struct ethtool_link_settings {
* __u32 map_lp_advertising[link_mode_masks_nwords];
*/
};
/**
* enum phy_upstream - Represents the upstream component a given PHY device
* is connected to, as in what is on the other end of the MII bus. Most PHYs
* will be attached to an Ethernet MAC controller, but in some cases, there's
* an intermediate PHY used as a media-converter, which will driver another
* MII interface as its output.
* @PHY_UPSTREAM_MAC: Upstream component is a MAC (a switch port,
* or ethernet controller)
* @PHY_UPSTREAM_PHY: Upstream component is a PHY (likely a media converter)
*/
enum phy_upstream {
PHY_UPSTREAM_MAC,
PHY_UPSTREAM_PHY,
};
#endif /* _LINUX_ETHTOOL_H */

View File

@ -57,6 +57,8 @@ enum {
ETHTOOL_MSG_PLCA_GET_STATUS,
ETHTOOL_MSG_MM_GET,
ETHTOOL_MSG_MM_SET,
ETHTOOL_MSG_MODULE_FW_FLASH_ACT,
ETHTOOL_MSG_PHY_GET,
/* add new constants above here */
__ETHTOOL_MSG_USER_CNT,
@ -109,6 +111,9 @@ enum {
ETHTOOL_MSG_PLCA_NTF,
ETHTOOL_MSG_MM_GET_REPLY,
ETHTOOL_MSG_MM_NTF,
ETHTOOL_MSG_MODULE_FW_FLASH_NTF,
ETHTOOL_MSG_PHY_GET_REPLY,
ETHTOOL_MSG_PHY_NTF,
/* add new constants above here */
__ETHTOOL_MSG_KERNEL_CNT,
@ -132,6 +137,7 @@ enum {
ETHTOOL_A_HEADER_DEV_INDEX, /* u32 */
ETHTOOL_A_HEADER_DEV_NAME, /* string */
ETHTOOL_A_HEADER_FLAGS, /* u32 - ETHTOOL_FLAG_* */
ETHTOOL_A_HEADER_PHY_INDEX, /* u32 */
/* add new constants above here */
__ETHTOOL_A_HEADER_CNT,
@ -415,12 +421,34 @@ enum {
ETHTOOL_A_COALESCE_TX_AGGR_MAX_BYTES, /* u32 */
ETHTOOL_A_COALESCE_TX_AGGR_MAX_FRAMES, /* u32 */
ETHTOOL_A_COALESCE_TX_AGGR_TIME_USECS, /* u32 */
/* nest - _A_PROFILE_IRQ_MODERATION */
ETHTOOL_A_COALESCE_RX_PROFILE,
/* nest - _A_PROFILE_IRQ_MODERATION */
ETHTOOL_A_COALESCE_TX_PROFILE,
/* add new constants above here */
__ETHTOOL_A_COALESCE_CNT,
ETHTOOL_A_COALESCE_MAX = (__ETHTOOL_A_COALESCE_CNT - 1)
};
enum {
ETHTOOL_A_PROFILE_UNSPEC,
/* nest, _A_IRQ_MODERATION_* */
ETHTOOL_A_PROFILE_IRQ_MODERATION,
__ETHTOOL_A_PROFILE_CNT,
ETHTOOL_A_PROFILE_MAX = (__ETHTOOL_A_PROFILE_CNT - 1)
};
enum {
ETHTOOL_A_IRQ_MODERATION_UNSPEC,
ETHTOOL_A_IRQ_MODERATION_USEC, /* u32 */
ETHTOOL_A_IRQ_MODERATION_PKTS, /* u32 */
ETHTOOL_A_IRQ_MODERATION_COMPS, /* u32 */
__ETHTOOL_A_IRQ_MODERATION_CNT,
ETHTOOL_A_IRQ_MODERATION_MAX = (__ETHTOOL_A_IRQ_MODERATION_CNT - 1)
};
/* PAUSE */
enum {
@ -532,6 +560,10 @@ enum {
* a regular 100 Ohm cable and a part with the abnormal impedance value
*/
ETHTOOL_A_CABLE_RESULT_CODE_IMPEDANCE_MISMATCH,
/* TDR not possible due to high noise level */
ETHTOOL_A_CABLE_RESULT_CODE_NOISE,
/* TDR resolution not possible / out of distance */
ETHTOOL_A_CABLE_RESULT_CODE_RESOLUTION_NOT_POSSIBLE,
};
enum {
@ -541,10 +573,20 @@ enum {
ETHTOOL_A_CABLE_PAIR_D,
};
/* Information source for specific results. */
enum {
ETHTOOL_A_CABLE_INF_SRC_UNSPEC,
/* Results provided by the Time Domain Reflectometry (TDR) */
ETHTOOL_A_CABLE_INF_SRC_TDR,
/* Results provided by the Active Link Cable Diagnostic (ALCD) */
ETHTOOL_A_CABLE_INF_SRC_ALCD,
};
enum {
ETHTOOL_A_CABLE_RESULT_UNSPEC,
ETHTOOL_A_CABLE_RESULT_PAIR, /* u8 ETHTOOL_A_CABLE_PAIR_ */
ETHTOOL_A_CABLE_RESULT_CODE, /* u8 ETHTOOL_A_CABLE_RESULT_CODE_ */
ETHTOOL_A_CABLE_RESULT_SRC, /* u32 ETHTOOL_A_CABLE_INF_SRC_ */
__ETHTOOL_A_CABLE_RESULT_CNT,
ETHTOOL_A_CABLE_RESULT_MAX = (__ETHTOOL_A_CABLE_RESULT_CNT - 1)
@ -554,6 +596,7 @@ enum {
ETHTOOL_A_CABLE_FAULT_LENGTH_UNSPEC,
ETHTOOL_A_CABLE_FAULT_LENGTH_PAIR, /* u8 ETHTOOL_A_CABLE_PAIR_ */
ETHTOOL_A_CABLE_FAULT_LENGTH_CM, /* u32 */
ETHTOOL_A_CABLE_FAULT_LENGTH_SRC, /* u32 ETHTOOL_A_CABLE_INF_SRC_ */
__ETHTOOL_A_CABLE_FAULT_LENGTH_CNT,
ETHTOOL_A_CABLE_FAULT_LENGTH_MAX = (__ETHTOOL_A_CABLE_FAULT_LENGTH_CNT - 1)
@ -906,6 +949,12 @@ enum {
};
/* Power Sourcing Equipment */
enum {
ETHTOOL_A_C33_PSE_PW_LIMIT_UNSPEC,
ETHTOOL_A_C33_PSE_PW_LIMIT_MIN, /* u32 */
ETHTOOL_A_C33_PSE_PW_LIMIT_MAX, /* u32 */
};
enum {
ETHTOOL_A_PSE_UNSPEC,
ETHTOOL_A_PSE_HEADER, /* nest - _A_HEADER_* */
@ -915,6 +964,12 @@ enum {
ETHTOOL_A_C33_PSE_ADMIN_STATE, /* u32 */
ETHTOOL_A_C33_PSE_ADMIN_CONTROL, /* u32 */
ETHTOOL_A_C33_PSE_PW_D_STATUS, /* u32 */
ETHTOOL_A_C33_PSE_PW_CLASS, /* u32 */
ETHTOOL_A_C33_PSE_ACTUAL_PW, /* u32 */
ETHTOOL_A_C33_PSE_EXT_STATE, /* u32 */
ETHTOOL_A_C33_PSE_EXT_SUBSTATE, /* u32 */
ETHTOOL_A_C33_PSE_AVAIL_PW_LIMIT, /* u32 */
ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES, /* nest - _C33_PSE_PW_LIMIT_* */
/* add new constants above here */
__ETHTOOL_A_PSE_CNT,
@ -929,6 +984,7 @@ enum {
ETHTOOL_A_RSS_INDIR, /* binary */
ETHTOOL_A_RSS_HKEY, /* binary */
ETHTOOL_A_RSS_INPUT_XFRM, /* u32 */
ETHTOOL_A_RSS_START_CONTEXT, /* u32 */
__ETHTOOL_A_RSS_CNT,
ETHTOOL_A_RSS_MAX = (__ETHTOOL_A_RSS_CNT - 1),
@ -996,6 +1052,39 @@ enum {
ETHTOOL_A_MM_MAX = (__ETHTOOL_A_MM_CNT - 1)
};
/* MODULE_FW_FLASH */
enum {
ETHTOOL_A_MODULE_FW_FLASH_UNSPEC,
ETHTOOL_A_MODULE_FW_FLASH_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_MODULE_FW_FLASH_FILE_NAME, /* string */
ETHTOOL_A_MODULE_FW_FLASH_PASSWORD, /* u32 */
ETHTOOL_A_MODULE_FW_FLASH_STATUS, /* u32 */
ETHTOOL_A_MODULE_FW_FLASH_STATUS_MSG, /* string */
ETHTOOL_A_MODULE_FW_FLASH_DONE, /* uint */
ETHTOOL_A_MODULE_FW_FLASH_TOTAL, /* uint */
/* add new constants above here */
__ETHTOOL_A_MODULE_FW_FLASH_CNT,
ETHTOOL_A_MODULE_FW_FLASH_MAX = (__ETHTOOL_A_MODULE_FW_FLASH_CNT - 1)
};
enum {
ETHTOOL_A_PHY_UNSPEC,
ETHTOOL_A_PHY_HEADER, /* nest - _A_HEADER_* */
ETHTOOL_A_PHY_INDEX, /* u32 */
ETHTOOL_A_PHY_DRVNAME, /* string */
ETHTOOL_A_PHY_NAME, /* string */
ETHTOOL_A_PHY_UPSTREAM_TYPE, /* u32 */
ETHTOOL_A_PHY_UPSTREAM_INDEX, /* u32 */
ETHTOOL_A_PHY_UPSTREAM_SFP_NAME, /* string */
ETHTOOL_A_PHY_DOWNSTREAM_SFP_NAME, /* string */
/* add new constants above here */
__ETHTOOL_A_PHY_CNT,
ETHTOOL_A_PHY_MAX = (__ETHTOOL_A_PHY_CNT - 1)
};
/* generic netlink info */
#define ETHTOOL_GENL_NAME "ethtool"
#define ETHTOOL_GENL_VERSION 1

View File

@ -0,0 +1,25 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Copyright (C) 2024 Unisoc Technologies Co., Ltd.
*/
#ifndef _LINUX_EXFAT_H
#define _LINUX_EXFAT_H
#include <linux/types.h>
#include <linux/ioctl.h>
/*
* exfat-specific ioctl commands
*/
#define EXFAT_IOC_SHUTDOWN _IOR('X', 125, __u32)
/*
* Flags used by EXFAT_IOC_SHUTDOWN
*/
#define EXFAT_GOING_DOWN_DEFAULT 0x0 /* default with full sync */
#define EXFAT_GOING_DOWN_FULLSYNC 0x1 /* going down with full sync*/
#define EXFAT_GOING_DOWN_NOSYNC 0x2 /* going down */
#endif /* _LINUX_EXFAT_H */

View File

@ -43,6 +43,7 @@
#define F2FS_IOC_DECOMPRESS_FILE _IO(F2FS_IOCTL_MAGIC, 23)
#define F2FS_IOC_COMPRESS_FILE _IO(F2FS_IOCTL_MAGIC, 24)
#define F2FS_IOC_START_ATOMIC_REPLACE _IO(F2FS_IOCTL_MAGIC, 25)
#define F2FS_IOC_GET_DEV_ALIAS_FILE _IOR(F2FS_IOCTL_MAGIC, 26, __u32)
/*
* should be same as XFS_IOC_GOINGDOWN.

View File

@ -2,6 +2,7 @@
#ifndef _FALLOC_H_
#define _FALLOC_H_
#define FALLOC_FL_ALLOCATE_RANGE 0x00 /* allocate range */
#define FALLOC_FL_KEEP_SIZE 0x01 /* default is extend size */
#define FALLOC_FL_PUNCH_HOLE 0x02 /* de-allocates range */
#define FALLOC_FL_NO_HIDE_STALE 0x04 /* reserved codepoint */

View File

@ -60,6 +60,7 @@
#define FAN_REPORT_DIR_FID 0x00000400 /* Report unique directory id */
#define FAN_REPORT_NAME 0x00000800 /* Report events with name */
#define FAN_REPORT_TARGET_FID 0x00001000 /* Report dirent target id */
#define FAN_REPORT_FD_ERROR 0x00002000 /* event->fd can report error */
/* Convenience macro - FAN_REPORT_NAME requires FAN_REPORT_DIR_FID */
#define FAN_REPORT_DFID_NAME (FAN_REPORT_DIR_FID | FAN_REPORT_NAME)

View File

@ -16,6 +16,9 @@
#define F_DUPFD_QUERY (F_LINUX_SPECIFIC_BASE + 3)
/* Was the file just created? */
#define F_CREATED_QUERY (F_LINUX_SPECIFIC_BASE + 4)
/*
* Cancel a blocking posix lock; internal use only until we expose an
* asynchronous lock api to userspace:
@ -87,36 +90,69 @@
#define DN_ATTRIB 0x00000020 /* File changed attibutes */
#define DN_MULTISHOT 0x80000000 /* Don't remove notifier */
#define AT_FDCWD -100 /* Special value for dirfd used to
indicate openat should use the
current working directory. */
/* Generic flags for the *at(2) family of syscalls. */
/* Reserved for per-syscall flags 0xff. */
#define AT_SYMLINK_NOFOLLOW 0x100 /* Do not follow symbolic
links. */
/* Reserved for per-syscall flags 0x200 */
#define AT_SYMLINK_FOLLOW 0x400 /* Follow symbolic links. */
#define AT_NO_AUTOMOUNT 0x800 /* Suppress terminal automount
traversal. */
#define AT_EMPTY_PATH 0x1000 /* Allow empty relative
pathname to operate on dirfd
directly. */
/*
* The constants AT_REMOVEDIR and AT_EACCESS have the same value. AT_EACCESS is
* meaningful only to faccessat, while AT_REMOVEDIR is meaningful only to
* unlinkat. The two functions do completely different things and therefore,
* the flags can be allowed to overlap. For example, passing AT_REMOVEDIR to
* faccessat would be undefined behavior and thus treating it equivalent to
* AT_EACCESS is valid undefined behavior.
* These flags are currently statx(2)-specific, but they could be made generic
* in the future and so they should not be used for other per-syscall flags.
*/
#define AT_FDCWD -100 /* Special value used to indicate
openat should use the current
working directory. */
#define AT_SYMLINK_NOFOLLOW 0x100 /* Do not follow symbolic links. */
#define AT_STATX_SYNC_TYPE 0x6000 /* Type of synchronisation required from statx() */
#define AT_STATX_SYNC_AS_STAT 0x0000 /* - Do whatever stat() does */
#define AT_STATX_FORCE_SYNC 0x2000 /* - Force the attributes to be sync'd with the server */
#define AT_STATX_DONT_SYNC 0x4000 /* - Don't sync attributes with the server */
#define AT_RECURSIVE 0x8000 /* Apply to the entire subtree */
/*
* Per-syscall flags for the *at(2) family of syscalls.
*
* These are flags that are so syscall-specific that a user passing these flags
* to the wrong syscall is so "clearly wrong" that we can safely call such
* usage "undefined behaviour".
*
* For example, the constants AT_REMOVEDIR and AT_EACCESS have the same value.
* AT_EACCESS is meaningful only to faccessat, while AT_REMOVEDIR is meaningful
* only to unlinkat. The two functions do completely different things and
* therefore, the flags can be allowed to overlap. For example, passing
* AT_REMOVEDIR to faccessat would be undefined behavior and thus treating it
* equivalent to AT_EACCESS is valid undefined behavior.
*
* Note for implementers: When picking a new per-syscall AT_* flag, try to
* reuse already existing flags first. This leaves us with as many unused bits
* as possible, so we can use them for generic bits in the future if necessary.
*/
/* Flags for renameat2(2) (must match legacy RENAME_* flags). */
#define AT_RENAME_NOREPLACE 0x0001
#define AT_RENAME_EXCHANGE 0x0002
#define AT_RENAME_WHITEOUT 0x0004
/* Flag for faccessat(2). */
#define AT_EACCESS 0x200 /* Test access permitted for
effective IDs, not real IDs. */
/* Flag for unlinkat(2). */
#define AT_REMOVEDIR 0x200 /* Remove directory instead of
unlinking file. */
#define AT_SYMLINK_FOLLOW 0x400 /* Follow symbolic links. */
#define AT_NO_AUTOMOUNT 0x800 /* Suppress terminal automount traversal */
#define AT_EMPTY_PATH 0x1000 /* Allow empty relative pathname */
#define AT_STATX_SYNC_TYPE 0x6000 /* Type of synchronisation required from statx() */
#define AT_STATX_SYNC_AS_STAT 0x0000 /* - Do whatever stat() does */
#define AT_STATX_FORCE_SYNC 0x2000 /* - Force the attributes to be sync'd with the server */
#define AT_STATX_DONT_SYNC 0x4000 /* - Don't sync attributes with the server */
#define AT_RECURSIVE 0x8000 /* Apply to the entire subtree */
/* Flags for name_to_handle_at(2). We reuse AT_ flag space to save bits... */
#define AT_HANDLE_FID AT_REMOVEDIR /* file handle is needed to
compare object identity and may not
be usable to open_by_handle_at(2) */
/* Flags for name_to_handle_at(2). */
#define AT_HANDLE_FID 0x200 /* File handle is needed to compare
object identity and may not be
usable with open_by_handle_at(2). */
#define AT_HANDLE_MNT_ID_UNIQUE 0x001 /* Return the u64 unique mount ID. */
#define AT_HANDLE_CONNECTABLE 0x002 /* Request a connectable file handle */
#endif /* _LINUX_FCNTL_H */

View File

@ -67,6 +67,7 @@ enum {
FRA_IP_PROTO, /* ip proto */
FRA_SPORT_RANGE, /* sport */
FRA_DPORT_RANGE, /* dport */
FRA_DSCP, /* dscp */
__FRA_MAX
};

View File

@ -325,12 +325,17 @@ typedef int __bitwise __kernel_rwf_t;
/* per-IO negation of O_APPEND */
#define RWF_NOAPPEND ((__kernel_rwf_t)0x00000020)
/* Atomic Write */
#define RWF_ATOMIC ((__kernel_rwf_t)0x00000040)
/* mask of flags supported by the kernel */
#define RWF_SUPPORTED (RWF_HIPRI | RWF_DSYNC | RWF_SYNC | RWF_NOWAIT |\
RWF_APPEND | RWF_NOAPPEND)
RWF_APPEND | RWF_NOAPPEND | RWF_ATOMIC)
#define PROCFS_IOCTL_MAGIC 'f'
/* Pagemap ioctl */
#define PAGEMAP_SCAN _IOWR('f', 16, struct pm_scan_arg)
#define PAGEMAP_SCAN _IOWR(PROCFS_IOCTL_MAGIC, 16, struct pm_scan_arg)
/* Bitmasks provided in pm_scan_args masks and reported in page_region.categories. */
#define PAGE_IS_WPALLOWED (1 << 0)
@ -389,4 +394,158 @@ struct pm_scan_arg {
__u64 return_mask;
};
/* /proc/<pid>/maps ioctl */
#define PROCMAP_QUERY _IOWR(PROCFS_IOCTL_MAGIC, 17, struct procmap_query)
enum procmap_query_flags {
/*
* VMA permission flags.
*
* Can be used as part of procmap_query.query_flags field to look up
* only VMAs satisfying specified subset of permissions. E.g., specifying
* PROCMAP_QUERY_VMA_READABLE only will return both readable and read/write VMAs,
* while having PROCMAP_QUERY_VMA_READABLE | PROCMAP_QUERY_VMA_WRITABLE will only
* return read/write VMAs, though both executable/non-executable and
* private/shared will be ignored.
*
* PROCMAP_QUERY_VMA_* flags are also returned in procmap_query.vma_flags
* field to specify actual VMA permissions.
*/
PROCMAP_QUERY_VMA_READABLE = 0x01,
PROCMAP_QUERY_VMA_WRITABLE = 0x02,
PROCMAP_QUERY_VMA_EXECUTABLE = 0x04,
PROCMAP_QUERY_VMA_SHARED = 0x08,
/*
* Query modifier flags.
*
* By default VMA that covers provided address is returned, or -ENOENT
* is returned. With PROCMAP_QUERY_COVERING_OR_NEXT_VMA flag set, closest
* VMA with vma_start > addr will be returned if no covering VMA is
* found.
*
* PROCMAP_QUERY_FILE_BACKED_VMA instructs query to consider only VMAs that
* have file backing. Can be combined with PROCMAP_QUERY_COVERING_OR_NEXT_VMA
* to iterate all VMAs with file backing.
*/
PROCMAP_QUERY_COVERING_OR_NEXT_VMA = 0x10,
PROCMAP_QUERY_FILE_BACKED_VMA = 0x20,
};
/*
* Input/output argument structured passed into ioctl() call. It can be used
* to query a set of VMAs (Virtual Memory Areas) of a process.
*
* Each field can be one of three kinds, marked in a short comment to the
* right of the field:
* - "in", input argument, user has to provide this value, kernel doesn't modify it;
* - "out", output argument, kernel sets this field with VMA data;
* - "in/out", input and output argument; user provides initial value (used
* to specify maximum allowable buffer size), and kernel sets it to actual
* amount of data written (or zero, if there is no data).
*
* If matching VMA is found (according to criterias specified by
* query_addr/query_flags, all the out fields are filled out, and ioctl()
* returns 0. If there is no matching VMA, -ENOENT will be returned.
* In case of any other error, negative error code other than -ENOENT is
* returned.
*
* Most of the data is similar to the one returned as text in /proc/<pid>/maps
* file, but procmap_query provides more querying flexibility. There are no
* consistency guarantees between subsequent ioctl() calls, but data returned
* for matched VMA is self-consistent.
*/
struct procmap_query {
/* Query struct size, for backwards/forward compatibility */
__u64 size;
/*
* Query flags, a combination of enum procmap_query_flags values.
* Defines query filtering and behavior, see enum procmap_query_flags.
*
* Input argument, provided by user. Kernel doesn't modify it.
*/
__u64 query_flags; /* in */
/*
* Query address. By default, VMA that covers this address will
* be looked up. PROCMAP_QUERY_* flags above modify this default
* behavior further.
*
* Input argument, provided by user. Kernel doesn't modify it.
*/
__u64 query_addr; /* in */
/* VMA starting (inclusive) and ending (exclusive) address, if VMA is found. */
__u64 vma_start; /* out */
__u64 vma_end; /* out */
/* VMA permissions flags. A combination of PROCMAP_QUERY_VMA_* flags. */
__u64 vma_flags; /* out */
/* VMA backing page size granularity. */
__u64 vma_page_size; /* out */
/*
* VMA file offset. If VMA has file backing, this specifies offset
* within the file that VMA's start address corresponds to.
* Is set to zero if VMA has no backing file.
*/
__u64 vma_offset; /* out */
/* Backing file's inode number, or zero, if VMA has no backing file. */
__u64 inode; /* out */
/* Backing file's device major/minor number, or zero, if VMA has no backing file. */
__u32 dev_major; /* out */
__u32 dev_minor; /* out */
/*
* If set to non-zero value, signals the request to return VMA name
* (i.e., VMA's backing file's absolute path, with " (deleted)" suffix
* appended, if file was unlinked from FS) for matched VMA. VMA name
* can also be some special name (e.g., "[heap]", "[stack]") or could
* be even user-supplied with prctl(PR_SET_VMA, PR_SET_VMA_ANON_NAME).
*
* Kernel will set this field to zero, if VMA has no associated name.
* Otherwise kernel will return actual amount of bytes filled in
* user-supplied buffer (see vma_name_addr field below), including the
* terminating zero.
*
* If VMA name is longer that user-supplied maximum buffer size,
* -E2BIG error is returned.
*
* If this field is set to non-zero value, vma_name_addr should point
* to valid user space memory buffer of at least vma_name_size bytes.
* If set to zero, vma_name_addr should be set to zero as well
*/
__u32 vma_name_size; /* in/out */
/*
* If set to non-zero value, signals the request to extract and return
* VMA's backing file's build ID, if the backing file is an ELF file
* and it contains embedded build ID.
*
* Kernel will set this field to zero, if VMA has no backing file,
* backing file is not an ELF file, or ELF file has no build ID
* embedded.
*
* Build ID is a binary value (not a string). Kernel will set
* build_id_size field to exact number of bytes used for build ID.
* If build ID is requested and present, but needs more bytes than
* user-supplied maximum buffer size (see build_id_addr field below),
* -E2BIG error will be returned.
*
* If this field is set to non-zero value, build_id_addr should point
* to valid user space memory buffer of at least build_id_size bytes.
* If set to zero, build_id_addr should be set to zero as well
*/
__u32 build_id_size; /* in/out */
/*
* User-supplied address of a buffer of at least vma_name_size bytes
* for kernel to fill with matched VMA's name (see vma_name_size field
* description above for details).
*
* Should be set to zero if VMA name should not be returned.
*/
__u64 vma_name_addr; /* in */
/*
* User-supplied address of a buffer of at least build_id_size bytes
* for kernel to fill with matched VMA's ELF build ID, if available
* (see build_id_size field description above for details).
*
* Should be set to zero if build ID should not be returned.
*/
__u64 build_id_addr; /* in */
};
#endif /* _LINUX_FS_H */

View File

@ -217,6 +217,9 @@
* - add backing_id to fuse_open_out, add FOPEN_PASSTHROUGH open flag
* - add FUSE_NO_EXPORT_SUPPORT init flag
* - add FUSE_NOTIFY_RESEND, add FUSE_HAS_RESEND init flag
*
* 7.41
* - add FUSE_ALLOW_IDMAP
*/
#ifndef _LINUX_FUSE_H
@ -248,7 +251,7 @@
#define FUSE_KERNEL_VERSION 7
/** Minor version number of this interface */
#define FUSE_KERNEL_MINOR_VERSION 40
#define FUSE_KERNEL_MINOR_VERSION 41
/** The node ID of the root inode */
#define FUSE_ROOT_ID 1
@ -417,6 +420,7 @@ struct fuse_file_lock {
* FUSE_NO_EXPORT_SUPPORT: explicitly disable export support
* FUSE_HAS_RESEND: kernel supports resending pending requests, and the high bit
* of the request ID indicates resend requests
* FUSE_ALLOW_IDMAP: allow creation of idmapped mounts
*/
#define FUSE_ASYNC_READ (1 << 0)
#define FUSE_POSIX_LOCKS (1 << 1)
@ -462,6 +466,7 @@ struct fuse_file_lock {
/* Obsolete alias for FUSE_DIRECT_IO_ALLOW_MMAP */
#define FUSE_DIRECT_IO_RELAX FUSE_DIRECT_IO_ALLOW_MMAP
#define FUSE_ALLOW_IDMAP (1ULL << 40)
/**
* CUSE INIT request/reply flags
@ -980,6 +985,21 @@ struct fuse_fallocate_in {
*/
#define FUSE_UNIQUE_RESEND (1ULL << 63)
/**
* This value will be set by the kernel to
* (struct fuse_in_header).{uid,gid} fields in
* case when:
* - fuse daemon enabled FUSE_ALLOW_IDMAP
* - idmapping information is not available and uid/gid
* can not be mapped in accordance with an idmapping.
*
* Note: an idmapping information always available
* for inode creation operations like:
* FUSE_MKNOD, FUSE_SYMLINK, FUSE_MKDIR, FUSE_TMPFILE,
* FUSE_CREATE and FUSE_RENAME2 (with RENAME_WHITEOUT).
*/
#define FUSE_INVALID_UIDGID ((uint32_t)(-1))
struct fuse_in_header {
uint32_t len;
uint32_t opcode;

View File

@ -46,6 +46,7 @@ struct hidraw_devinfo {
/* The first byte of SOUTPUT and GOUTPUT is the report number */
#define HIDIOCSOUTPUT(len) _IOC(_IOC_WRITE|_IOC_READ, 'H', 0x0B, len)
#define HIDIOCGOUTPUT(len) _IOC(_IOC_WRITE|_IOC_READ, 'H', 0x0C, len)
#define HIDIOCREVOKE _IOW('H', 0x0D, int) /* Revoke device access */
#define HIDRAW_FIRST_MINOR 0
#define HIDRAW_MAX_DEVICES 64

View File

@ -377,6 +377,7 @@ enum {
IFLA_GSO_IPV4_MAX_SIZE,
IFLA_GRO_IPV4_MAX_SIZE,
IFLA_DPLL_PIN,
IFLA_MAX_PACING_OFFLOAD_HORIZON,
__IFLA_MAX
};
@ -1290,6 +1291,19 @@ enum netkit_mode {
NETKIT_L3,
};
/* NETKIT_SCRUB_NONE leaves clearing skb->{mark,priority} up to
* the BPF program if attached. This also means the latter can
* consume the two fields if they were populated earlier.
*
* NETKIT_SCRUB_DEFAULT zeroes skb->{mark,priority} fields before
* invoking the attached BPF program when the peer device resides
* in a different network namespace. This is the default behavior.
*/
enum netkit_scrub {
NETKIT_SCRUB_NONE,
NETKIT_SCRUB_DEFAULT,
};
enum {
IFLA_NETKIT_UNSPEC,
IFLA_NETKIT_PEER_INFO,
@ -1297,6 +1311,8 @@ enum {
IFLA_NETKIT_POLICY,
IFLA_NETKIT_PEER_POLICY,
IFLA_NETKIT_MODE,
IFLA_NETKIT_SCRUB,
IFLA_NETKIT_PEER_SCRUB,
__IFLA_NETKIT_MAX,
};
#define IFLA_NETKIT_MAX (__IFLA_NETKIT_MAX - 1)
@ -1940,6 +1956,7 @@ struct ifla_rmnet_flags {
enum {
IFLA_MCTP_UNSPEC,
IFLA_MCTP_NET,
IFLA_MCTP_PHYS_BINDING,
__IFLA_MCTP_MAX,
};

View File

@ -230,8 +230,8 @@ struct tpacket_hdr_v1 {
* ts_first_pkt:
* Is always the time-stamp when the block was opened.
* Case a) ZERO packets
* No packets to deal with but atleast you know the
* time-interval of this block.
* No packets to deal with but at least you know
* the time-interval of this block.
* Case b) Non-zero packets
* Use the ts of the first packet in the block.
*
@ -265,7 +265,8 @@ enum tpacket_versions {
- struct tpacket_hdr
- pad to TPACKET_ALIGNMENT=16
- struct sockaddr_ll
- Gap, chosen so that packet data (Start+tp_net) alignes to TPACKET_ALIGNMENT=16
- Gap, chosen so that packet data (Start+tp_net) aligns to
TPACKET_ALIGNMENT=16
- Start+tp_mac: [ Optional MAC header ]
- Start+tp_net: Packet data, aligned to TPACKET_ALIGNMENT=16.
- Pad to align to TPACKET_ALIGNMENT=16

View File

@ -41,6 +41,10 @@
*/
#define XDP_UMEM_TX_SW_CSUM (1 << 1)
/* Request to reserve tx_metadata_len bytes of per-chunk metadata.
*/
#define XDP_UMEM_TX_METADATA_LEN (1 << 2)
struct sockaddr_xdp {
__u16 sxdp_family;
__u16 sxdp_flags;

View File

@ -5,6 +5,28 @@
#ifndef _IIO_BUFFER_H_
#define _IIO_BUFFER_H_
#include <linux/types.h>
/* Flags for iio_dmabuf.flags */
#define IIO_BUFFER_DMABUF_CYCLIC (1 << 0)
#define IIO_BUFFER_DMABUF_SUPPORTED_FLAGS 0x00000001
/**
* struct iio_dmabuf - Descriptor for a single IIO DMABUF object
* @fd: file descriptor of the DMABUF object
* @flags: one or more IIO_BUFFER_DMABUF_* flags
* @bytes_used: number of bytes used in this DMABUF for the data transfer.
* Should generally be set to the DMABUF's size.
*/
struct iio_dmabuf {
__u32 fd;
__u32 flags;
__u64 bytes_used;
};
#define IIO_BUFFER_GET_FD_IOCTL _IOWR('i', 0x91, int)
#define IIO_BUFFER_DMABUF_ATTACH_IOCTL _IOW('i', 0x92, int)
#define IIO_BUFFER_DMABUF_DETACH_IOCTL _IOW('i', 0x93, int)
#define IIO_BUFFER_DMABUF_ENQUEUE_IOCTL _IOW('i', 0x94, struct iio_dmabuf)
#endif /* _IIO_BUFFER_H_ */

View File

@ -51,6 +51,7 @@ enum iio_chan_type {
IIO_DELTA_VELOCITY,
IIO_COLORTEMP,
IIO_CHROMATICITY,
IIO_ATTENTION,
};
enum iio_modifier {

View File

@ -81,6 +81,8 @@ enum {
#define IPPROTO_ETHERNET IPPROTO_ETHERNET
IPPROTO_RAW = 255, /* Raw IP packets */
#define IPPROTO_RAW IPPROTO_RAW
IPPROTO_SMC = 256, /* Shared Memory Communications */
#define IPPROTO_SMC IPPROTO_SMC
IPPROTO_MPTCP = 262, /* Multipath TCP connection */
#define IPPROTO_MPTCP IPPROTO_MPTCP
IPPROTO_MAX
@ -139,7 +141,7 @@ struct in_addr {
*/
#define IP_PMTUDISC_INTERFACE 4
/* weaker version of IP_PMTUDISC_INTERFACE, which allows packets to get
* fragmented if they exeed the interface mtu
* fragmented if they exceed the interface mtu
*/
#define IP_PMTUDISC_OMIT 5

View File

@ -143,7 +143,7 @@ enum {
INET_DIAG_SHUTDOWN,
/*
* Next extenstions cannot be requested in struct inet_diag_req_v2:
* Next extensions cannot be requested in struct inet_diag_req_v2:
* its field idiag_ext has only 8 bits.
*/

View File

@ -519,6 +519,7 @@
#define KEY_NOTIFICATION_CENTER 0x1bc /* Show/hide the notification center */
#define KEY_PICKUP_PHONE 0x1bd /* Answer incoming call */
#define KEY_HANGUP_PHONE 0x1be /* Decline incoming call */
#define KEY_LINK_PHONE 0x1bf /* AL Phone Syncing */
#define KEY_DEL_EOL 0x1c0
#define KEY_DEL_EOS 0x1c1

View File

@ -200,6 +200,9 @@ enum io_uring_sqe_flags_bit {
*/
#define IORING_SETUP_NO_SQARRAY (1U << 16)
/* Use hybrid poll in iopoll process */
#define IORING_SETUP_HYBRID_IOPOLL (1U << 17)
enum io_uring_op {
IORING_OP_NOP,
IORING_OP_READV,
@ -257,6 +260,8 @@ enum io_uring_op {
IORING_OP_FUTEX_WAITV,
IORING_OP_FIXED_FD_INSTALL,
IORING_OP_FTRUNCATE,
IORING_OP_BIND,
IORING_OP_LISTEN,
/* this goes last, obviously */
IORING_OP_LAST,
@ -414,12 +419,15 @@ enum io_uring_msg_ring_flags {
* IORING_NOP_INJECT_RESULT Inject result from sqe->result
*/
#define IORING_NOP_INJECT_RESULT (1U << 0)
#define IORING_NOP_FILE (1U << 1)
#define IORING_NOP_FIXED_FILE (1U << 2)
#define IORING_NOP_FIXED_BUFFER (1U << 3)
/*
* IO completion data structure (Completion Queue Entry)
*/
struct io_uring_cqe {
__u64 user_data; /* sqe->data submission passed back */
__u64 user_data; /* sqe->user_data value passed back */
__s32 res; /* result code for this event */
__u32 flags;
@ -438,11 +446,21 @@ struct io_uring_cqe {
* IORING_CQE_F_SOCK_NONEMPTY If set, more data to read after socket recv
* IORING_CQE_F_NOTIF Set for notification CQEs. Can be used to distinct
* them from sends.
* IORING_CQE_F_BUF_MORE If set, the buffer ID set in the completion will get
* more completions. In other words, the buffer is being
* partially consumed, and will be used by the kernel for
* more completions. This is only set for buffers used via
* the incremental buffer consumption, as provided by
* a ring buffer setup with IOU_PBUF_RING_INC. For any
* other provided buffer type, all completions with a
* buffer passed back is automatically returned to the
* application.
*/
#define IORING_CQE_F_BUFFER (1U << 0)
#define IORING_CQE_F_MORE (1U << 1)
#define IORING_CQE_F_SOCK_NONEMPTY (1U << 2)
#define IORING_CQE_F_NOTIF (1U << 3)
#define IORING_CQE_F_BUF_MORE (1U << 4)
#define IORING_CQE_BUFFER_SHIFT 16
@ -505,6 +523,8 @@ struct io_cqring_offsets {
#define IORING_ENTER_SQ_WAIT (1U << 2)
#define IORING_ENTER_EXT_ARG (1U << 3)
#define IORING_ENTER_REGISTERED_RING (1U << 4)
#define IORING_ENTER_ABS_TIMER (1U << 5)
#define IORING_ENTER_EXT_ARG_REG (1U << 6)
/*
* Passed in for io_uring_setup(2). Copied back with updated info on success
@ -540,6 +560,7 @@ struct io_uring_params {
#define IORING_FEAT_LINKED_FILE (1U << 12)
#define IORING_FEAT_REG_REG_RING (1U << 13)
#define IORING_FEAT_RECVSEND_BUNDLE (1U << 14)
#define IORING_FEAT_MIN_TIMEOUT (1U << 15)
/*
* io_uring_register(2) opcodes and arguments
@ -593,6 +614,21 @@ enum io_uring_register_op {
IORING_REGISTER_NAPI = 27,
IORING_UNREGISTER_NAPI = 28,
IORING_REGISTER_CLOCK = 29,
/* clone registered buffers from source ring to current ring */
IORING_REGISTER_CLONE_BUFFERS = 30,
/* send MSG_RING without having a ring */
IORING_REGISTER_SEND_MSG_RING = 31,
/* 32 reserved for zc rx */
/* resize CQ ring */
IORING_REGISTER_RESIZE_RINGS = 33,
IORING_REGISTER_MEM_REGION = 34,
/* this goes last */
IORING_REGISTER_LAST,
@ -613,6 +649,31 @@ struct io_uring_files_update {
__aligned_u64 /* __s32 * */ fds;
};
enum {
/* initialise with user provided memory pointed by user_addr */
IORING_MEM_REGION_TYPE_USER = 1,
};
struct io_uring_region_desc {
__u64 user_addr;
__u64 size;
__u32 flags;
__u32 id;
__u64 mmap_offset;
__u64 __resv[4];
};
enum {
/* expose the region as registered wait arguments */
IORING_MEM_REGION_REG_WAIT_ARG = 1,
};
struct io_uring_mem_region_reg {
__u64 region_uptr; /* struct io_uring_region_desc * */
__u64 flags;
__u64 __resv[2];
};
/*
* Register a fully sparse file space, rather than pass in an array of all
* -1 file descriptors.
@ -673,6 +734,25 @@ struct io_uring_restriction {
__u32 resv2[3];
};
struct io_uring_clock_register {
__u32 clockid;
__u32 __resv[3];
};
enum {
IORING_REGISTER_SRC_REGISTERED = (1U << 0),
IORING_REGISTER_DST_REPLACE = (1U << 1),
};
struct io_uring_clone_buffers {
__u32 src_fd;
__u32 flags;
__u32 src_off;
__u32 dst_off;
__u32 nr;
__u32 pad[3];
};
struct io_uring_buf {
__u64 addr;
__u32 len;
@ -705,9 +785,17 @@ struct io_uring_buf_ring {
* mmap(2) with the offset set as:
* IORING_OFF_PBUF_RING | (bgid << IORING_OFF_PBUF_SHIFT)
* to get a virtual mapping for the ring.
* IOU_PBUF_RING_INC: If set, buffers consumed from this buffer ring can be
* consumed incrementally. Normally one (or more) buffers
* are fully consumed. With incremental consumptions, it's
* feasible to register big ranges of buffers, and each
* use of it will consume only as much as it needs. This
* requires that both the kernel and application keep
* track of where the current read/recv index is at.
*/
enum io_uring_register_pbuf_ring_flags {
IOU_PBUF_RING_MMAP = 1,
IOU_PBUF_RING_INC = 2,
};
/* argument for IORING_(UN)REGISTER_PBUF_RING */
@ -726,12 +814,40 @@ struct io_uring_buf_status {
__u32 resv[8];
};
enum io_uring_napi_op {
/* register/ungister backward compatible opcode */
IO_URING_NAPI_REGISTER_OP = 0,
/* opcodes to update napi_list when static tracking is used */
IO_URING_NAPI_STATIC_ADD_ID = 1,
IO_URING_NAPI_STATIC_DEL_ID = 2
};
enum io_uring_napi_tracking_strategy {
/* value must be 0 for backward compatibility */
IO_URING_NAPI_TRACKING_DYNAMIC = 0,
IO_URING_NAPI_TRACKING_STATIC = 1,
IO_URING_NAPI_TRACKING_INACTIVE = 255
};
/* argument for IORING_(UN)REGISTER_NAPI */
struct io_uring_napi {
__u32 busy_poll_to;
__u8 prefer_busy_poll;
__u8 pad[3];
__u64 resv;
/* a io_uring_napi_op value */
__u8 opcode;
__u8 pad[2];
/*
* for IO_URING_NAPI_REGISTER_OP, it is a
* io_uring_napi_tracking_strategy value.
*
* for IO_URING_NAPI_STATIC_ADD_ID/IO_URING_NAPI_STATIC_DEL_ID
* it is the napi id to add/del from napi_list.
*/
__u32 op_param;
__u32 resv;
};
/*
@ -753,10 +869,33 @@ enum io_uring_register_restriction_op {
IORING_RESTRICTION_LAST
};
enum {
IORING_REG_WAIT_TS = (1U << 0),
};
/*
* Argument for io_uring_enter(2) with
* IORING_GETEVENTS | IORING_ENTER_EXT_ARG_REG set, where the actual argument
* is an index into a previously registered fixed wait region described by
* the below structure.
*/
struct io_uring_reg_wait {
struct __kernel_timespec ts;
__u32 min_wait_usec;
__u32 flags;
__u64 sigmask;
__u32 sigmask_sz;
__u32 pad[3];
__u64 pad2[2];
};
/*
* Argument for io_uring_enter(2) with IORING_GETEVENTS | IORING_ENTER_EXT_ARG
*/
struct io_uring_getevents_arg {
__u64 sigmask;
__u32 sigmask_sz;
__u32 pad;
__u32 min_wait_usec;
__u64 ts;
};

View File

@ -50,6 +50,12 @@ enum {
IOAM6_IPTUNNEL_FREQ_K, /* u32 */
IOAM6_IPTUNNEL_FREQ_N, /* u32 */
/* Tunnel src address.
* For encap,auto modes.
* Optional (automatic if not provided).
*/
IOAM6_IPTUNNEL_SRC, /* struct in6_addr */
__IOAM6_IPTUNNEL_MAX,
};

View File

@ -4,8 +4,8 @@
#ifndef _IOMMUFD_H
#define _IOMMUFD_H
#include <linux/types.h>
#include <linux/ioctl.h>
#include <linux/types.h>
#define IOMMUFD_TYPE (';')
@ -37,19 +37,24 @@
enum {
IOMMUFD_CMD_BASE = 0x80,
IOMMUFD_CMD_DESTROY = IOMMUFD_CMD_BASE,
IOMMUFD_CMD_IOAS_ALLOC,
IOMMUFD_CMD_IOAS_ALLOW_IOVAS,
IOMMUFD_CMD_IOAS_COPY,
IOMMUFD_CMD_IOAS_IOVA_RANGES,
IOMMUFD_CMD_IOAS_MAP,
IOMMUFD_CMD_IOAS_UNMAP,
IOMMUFD_CMD_OPTION,
IOMMUFD_CMD_VFIO_IOAS,
IOMMUFD_CMD_HWPT_ALLOC,
IOMMUFD_CMD_GET_HW_INFO,
IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING,
IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP,
IOMMUFD_CMD_HWPT_INVALIDATE,
IOMMUFD_CMD_IOAS_ALLOC = 0x81,
IOMMUFD_CMD_IOAS_ALLOW_IOVAS = 0x82,
IOMMUFD_CMD_IOAS_COPY = 0x83,
IOMMUFD_CMD_IOAS_IOVA_RANGES = 0x84,
IOMMUFD_CMD_IOAS_MAP = 0x85,
IOMMUFD_CMD_IOAS_UNMAP = 0x86,
IOMMUFD_CMD_OPTION = 0x87,
IOMMUFD_CMD_VFIO_IOAS = 0x88,
IOMMUFD_CMD_HWPT_ALLOC = 0x89,
IOMMUFD_CMD_GET_HW_INFO = 0x8a,
IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING = 0x8b,
IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP = 0x8c,
IOMMUFD_CMD_HWPT_INVALIDATE = 0x8d,
IOMMUFD_CMD_FAULT_QUEUE_ALLOC = 0x8e,
IOMMUFD_CMD_IOAS_MAP_FILE = 0x8f,
IOMMUFD_CMD_VIOMMU_ALLOC = 0x90,
IOMMUFD_CMD_VDEVICE_ALLOC = 0x91,
IOMMUFD_CMD_IOAS_CHANGE_PROCESS = 0x92,
};
/**
@ -212,6 +217,30 @@ struct iommu_ioas_map {
};
#define IOMMU_IOAS_MAP _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_MAP)
/**
* struct iommu_ioas_map_file - ioctl(IOMMU_IOAS_MAP_FILE)
* @size: sizeof(struct iommu_ioas_map_file)
* @flags: same as for iommu_ioas_map
* @ioas_id: same as for iommu_ioas_map
* @fd: the memfd to map
* @start: byte offset from start of file to map from
* @length: same as for iommu_ioas_map
* @iova: same as for iommu_ioas_map
*
* Set an IOVA mapping from a memfd file. All other arguments and semantics
* match those of IOMMU_IOAS_MAP.
*/
struct iommu_ioas_map_file {
__u32 size;
__u32 flags;
__u32 ioas_id;
__s32 fd;
__aligned_u64 start;
__aligned_u64 length;
__aligned_u64 iova;
};
#define IOMMU_IOAS_MAP_FILE _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_MAP_FILE)
/**
* struct iommu_ioas_copy - ioctl(IOMMU_IOAS_COPY)
* @size: sizeof(struct iommu_ioas_copy)
@ -268,7 +297,7 @@ struct iommu_ioas_unmap {
* ioctl(IOMMU_OPTION_HUGE_PAGES)
* @IOMMU_OPTION_RLIMIT_MODE:
* Change how RLIMIT_MEMLOCK accounting works. The caller must have privilege
* to invoke this. Value 0 (default) is user based accouting, 1 uses process
* to invoke this. Value 0 (default) is user based accounting, 1 uses process
* based accounting. Global option, object_id must be 0
* @IOMMU_OPTION_HUGE_PAGES:
* Value 1 (default) allows contiguous pages to be combined when generating
@ -356,10 +385,21 @@ struct iommu_vfio_ioas {
* the parent HWPT in a nesting configuration.
* @IOMMU_HWPT_ALLOC_DIRTY_TRACKING: Dirty tracking support for device IOMMU is
* enforced on device attachment
* @IOMMU_HWPT_FAULT_ID_VALID: The fault_id field of hwpt allocation data is
* valid.
* @IOMMU_HWPT_ALLOC_PASID: Requests a domain that can be used with PASID. The
* domain can be attached to any PASID on the device.
* Any domain attached to the non-PASID part of the
* device must also be flagged, otherwise attaching a
* PASID will blocked.
* If IOMMU does not support PASID it will return
* error (-EOPNOTSUPP).
*/
enum iommufd_hwpt_alloc_flags {
IOMMU_HWPT_ALLOC_NEST_PARENT = 1 << 0,
IOMMU_HWPT_ALLOC_DIRTY_TRACKING = 1 << 1,
IOMMU_HWPT_FAULT_ID_VALID = 1 << 2,
IOMMU_HWPT_ALLOC_PASID = 1 << 3,
};
/**
@ -390,14 +430,36 @@ struct iommu_hwpt_vtd_s1 {
__u32 __reserved;
};
/**
* struct iommu_hwpt_arm_smmuv3 - ARM SMMUv3 nested STE
* (IOMMU_HWPT_DATA_ARM_SMMUV3)
*
* @ste: The first two double words of the user space Stream Table Entry for
* the translation. Must be little-endian.
* Allowed fields: (Refer to "5.2 Stream Table Entry" in SMMUv3 HW Spec)
* - word-0: V, Cfg, S1Fmt, S1ContextPtr, S1CDMax
* - word-1: EATS, S1DSS, S1CIR, S1COR, S1CSH, S1STALLD
*
* -EIO will be returned if @ste is not legal or contains any non-allowed field.
* Cfg can be used to select a S1, Bypass or Abort configuration. A Bypass
* nested domain will translate the same as the nesting parent. The S1 will
* install a Context Descriptor Table pointing at userspace memory translated
* by the nesting parent.
*/
struct iommu_hwpt_arm_smmuv3 {
__aligned_le64 ste[2];
};
/**
* enum iommu_hwpt_data_type - IOMMU HWPT Data Type
* @IOMMU_HWPT_DATA_NONE: no data
* @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table
* @IOMMU_HWPT_DATA_ARM_SMMUV3: ARM SMMUv3 Context Descriptor Table
*/
enum iommu_hwpt_data_type {
IOMMU_HWPT_DATA_NONE,
IOMMU_HWPT_DATA_VTD_S1,
IOMMU_HWPT_DATA_NONE = 0,
IOMMU_HWPT_DATA_VTD_S1 = 1,
IOMMU_HWPT_DATA_ARM_SMMUV3 = 2,
};
/**
@ -405,12 +467,15 @@ enum iommu_hwpt_data_type {
* @size: sizeof(struct iommu_hwpt_alloc)
* @flags: Combination of enum iommufd_hwpt_alloc_flags
* @dev_id: The device to allocate this HWPT for
* @pt_id: The IOAS or HWPT to connect this HWPT to
* @pt_id: The IOAS or HWPT or vIOMMU to connect this HWPT to
* @out_hwpt_id: The ID of the new HWPT
* @__reserved: Must be 0
* @data_type: One of enum iommu_hwpt_data_type
* @data_len: Length of the type specific data
* @data_uptr: User pointer to the type specific data
* @fault_id: The ID of IOMMUFD_FAULT object. Valid only if flags field of
* IOMMU_HWPT_FAULT_ID_VALID is set.
* @__reserved2: Padding to 64-bit alignment. Must be 0.
*
* Explicitly allocate a hardware page table object. This is the same object
* type that is returned by iommufd_device_attach() and represents the
@ -421,11 +486,13 @@ enum iommu_hwpt_data_type {
* IOMMU_HWPT_DATA_NONE. The HWPT can be allocated as a parent HWPT for a
* nesting configuration by passing IOMMU_HWPT_ALLOC_NEST_PARENT via @flags.
*
* A user-managed nested HWPT will be created from a given parent HWPT via
* @pt_id, in which the parent HWPT must be allocated previously via the
* same ioctl from a given IOAS (@pt_id). In this case, the @data_type
* must be set to a pre-defined type corresponding to an I/O page table
* type supported by the underlying IOMMU hardware.
* A user-managed nested HWPT will be created from a given vIOMMU (wrapping a
* parent HWPT) or a parent HWPT via @pt_id, in which the parent HWPT must be
* allocated previously via the same ioctl from a given IOAS (@pt_id). In this
* case, the @data_type must be set to a pre-defined type corresponding to an
* I/O page table type supported by the underlying IOMMU hardware. The device
* via @dev_id and the vIOMMU via @pt_id must be associated to the same IOMMU
* instance.
*
* If the @data_type is set to IOMMU_HWPT_DATA_NONE, @data_len and
* @data_uptr should be zero. Otherwise, both @data_len and @data_uptr
@ -441,6 +508,8 @@ struct iommu_hwpt_alloc {
__u32 data_type;
__u32 data_len;
__aligned_u64 data_uptr;
__u32 fault_id;
__u32 __reserved2;
};
#define IOMMU_HWPT_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_ALLOC)
@ -475,15 +544,59 @@ struct iommu_hw_info_vtd {
__aligned_u64 ecap_reg;
};
/**
* struct iommu_hw_info_arm_smmuv3 - ARM SMMUv3 hardware information
* (IOMMU_HW_INFO_TYPE_ARM_SMMUV3)
*
* @flags: Must be set to 0
* @__reserved: Must be 0
* @idr: Implemented features for ARM SMMU Non-secure programming interface
* @iidr: Information about the implementation and implementer of ARM SMMU,
* and architecture version supported
* @aidr: ARM SMMU architecture version
*
* For the details of @idr, @iidr and @aidr, please refer to the chapters
* from 6.3.1 to 6.3.6 in the SMMUv3 Spec.
*
* This reports the raw HW capability, and not all bits are meaningful to be
* read by userspace. Only the following fields should be used:
*
* idr[0]: ST_LEVEL, TERM_MODEL, STALL_MODEL, TTENDIAN , CD2L, ASID16, TTF
* idr[1]: SIDSIZE, SSIDSIZE
* idr[3]: BBML, RIL
* idr[5]: VAX, GRAN64K, GRAN16K, GRAN4K
*
* - S1P should be assumed to be true if a NESTED HWPT can be created
* - VFIO/iommufd only support platforms with COHACC, it should be assumed to be
* true.
* - ATS is a per-device property. If the VMM describes any devices as ATS
* capable in ACPI/DT it should set the corresponding idr.
*
* This list may expand in future (eg E0PD, AIE, PBHA, D128, DS etc). It is
* important that VMMs do not read bits outside the list to allow for
* compatibility with future kernels. Several features in the SMMUv3
* architecture are not currently supported by the kernel for nesting: HTTU,
* BTM, MPAM and others.
*/
struct iommu_hw_info_arm_smmuv3 {
__u32 flags;
__u32 __reserved;
__u32 idr[6];
__u32 iidr;
__u32 aidr;
};
/**
* enum iommu_hw_info_type - IOMMU Hardware Info Types
* @IOMMU_HW_INFO_TYPE_NONE: Used by the drivers that do not report hardware
* info
* @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type
* @IOMMU_HW_INFO_TYPE_ARM_SMMUV3: ARM SMMUv3 iommu info type
*/
enum iommu_hw_info_type {
IOMMU_HW_INFO_TYPE_NONE,
IOMMU_HW_INFO_TYPE_INTEL_VTD,
IOMMU_HW_INFO_TYPE_NONE = 0,
IOMMU_HW_INFO_TYPE_INTEL_VTD = 1,
IOMMU_HW_INFO_TYPE_ARM_SMMUV3 = 2,
};
/**
@ -618,9 +731,11 @@ struct iommu_hwpt_get_dirty_bitmap {
* enum iommu_hwpt_invalidate_data_type - IOMMU HWPT Cache Invalidation
* Data Type
* @IOMMU_HWPT_INVALIDATE_DATA_VTD_S1: Invalidation data for VTD_S1
* @IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3: Invalidation data for ARM SMMUv3
*/
enum iommu_hwpt_invalidate_data_type {
IOMMU_HWPT_INVALIDATE_DATA_VTD_S1,
IOMMU_HWPT_INVALIDATE_DATA_VTD_S1 = 0,
IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3 = 1,
};
/**
@ -659,10 +774,32 @@ struct iommu_hwpt_vtd_s1_invalidate {
__u32 __reserved;
};
/**
* struct iommu_viommu_arm_smmuv3_invalidate - ARM SMMUv3 cache invalidation
* (IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3)
* @cmd: 128-bit cache invalidation command that runs in SMMU CMDQ.
* Must be little-endian.
*
* Supported command list only when passing in a vIOMMU via @hwpt_id:
* CMDQ_OP_TLBI_NSNH_ALL
* CMDQ_OP_TLBI_NH_VA
* CMDQ_OP_TLBI_NH_VAA
* CMDQ_OP_TLBI_NH_ALL
* CMDQ_OP_TLBI_NH_ASID
* CMDQ_OP_ATC_INV
* CMDQ_OP_CFGI_CD
* CMDQ_OP_CFGI_CD_ALL
*
* -EIO will be returned if the command is not supported.
*/
struct iommu_viommu_arm_smmuv3_invalidate {
__aligned_le64 cmd[2];
};
/**
* struct iommu_hwpt_invalidate - ioctl(IOMMU_HWPT_INVALIDATE)
* @size: sizeof(struct iommu_hwpt_invalidate)
* @hwpt_id: ID of a nested HWPT for cache invalidation
* @hwpt_id: ID of a nested HWPT or a vIOMMU, for cache invalidation
* @data_uptr: User pointer to an array of driver-specific cache invalidation
* data.
* @data_type: One of enum iommu_hwpt_invalidate_data_type, defining the data
@ -673,8 +810,11 @@ struct iommu_hwpt_vtd_s1_invalidate {
* Output the number of requests successfully handled by kernel.
* @__reserved: Must be 0.
*
* Invalidate the iommu cache for user-managed page table. Modifications on a
* user-managed page table should be followed by this operation to sync cache.
* Invalidate iommu cache for user-managed page table or vIOMMU. Modifications
* on a user-managed page table should be followed by this operation, if a HWPT
* is passed in via @hwpt_id. Other caches, such as device cache or descriptor
* cache can be flushed if a vIOMMU is passed in via the @hwpt_id field.
*
* Each ioctl can support one or more cache invalidation requests in the array
* that has a total size of @entry_len * @entry_num.
*
@ -692,4 +832,186 @@ struct iommu_hwpt_invalidate {
__u32 __reserved;
};
#define IOMMU_HWPT_INVALIDATE _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_INVALIDATE)
/**
* enum iommu_hwpt_pgfault_flags - flags for struct iommu_hwpt_pgfault
* @IOMMU_PGFAULT_FLAGS_PASID_VALID: The pasid field of the fault data is
* valid.
* @IOMMU_PGFAULT_FLAGS_LAST_PAGE: It's the last fault of a fault group.
*/
enum iommu_hwpt_pgfault_flags {
IOMMU_PGFAULT_FLAGS_PASID_VALID = (1 << 0),
IOMMU_PGFAULT_FLAGS_LAST_PAGE = (1 << 1),
};
/**
* enum iommu_hwpt_pgfault_perm - perm bits for struct iommu_hwpt_pgfault
* @IOMMU_PGFAULT_PERM_READ: request for read permission
* @IOMMU_PGFAULT_PERM_WRITE: request for write permission
* @IOMMU_PGFAULT_PERM_EXEC: (PCIE 10.4.1) request with a PASID that has the
* Execute Requested bit set in PASID TLP Prefix.
* @IOMMU_PGFAULT_PERM_PRIV: (PCIE 10.4.1) request with a PASID that has the
* Privileged Mode Requested bit set in PASID TLP
* Prefix.
*/
enum iommu_hwpt_pgfault_perm {
IOMMU_PGFAULT_PERM_READ = (1 << 0),
IOMMU_PGFAULT_PERM_WRITE = (1 << 1),
IOMMU_PGFAULT_PERM_EXEC = (1 << 2),
IOMMU_PGFAULT_PERM_PRIV = (1 << 3),
};
/**
* struct iommu_hwpt_pgfault - iommu page fault data
* @flags: Combination of enum iommu_hwpt_pgfault_flags
* @dev_id: id of the originated device
* @pasid: Process Address Space ID
* @grpid: Page Request Group Index
* @perm: Combination of enum iommu_hwpt_pgfault_perm
* @__reserved: Must be 0.
* @addr: Fault address
* @length: a hint of how much data the requestor is expecting to fetch. For
* example, if the PRI initiator knows it is going to do a 10MB
* transfer, it could fill in 10MB and the OS could pre-fault in
* 10MB of IOVA. It's default to 0 if there's no such hint.
* @cookie: kernel-managed cookie identifying a group of fault messages. The
* cookie number encoded in the last page fault of the group should
* be echoed back in the response message.
*/
struct iommu_hwpt_pgfault {
__u32 flags;
__u32 dev_id;
__u32 pasid;
__u32 grpid;
__u32 perm;
__u32 __reserved;
__aligned_u64 addr;
__u32 length;
__u32 cookie;
};
/**
* enum iommufd_page_response_code - Return status of fault handlers
* @IOMMUFD_PAGE_RESP_SUCCESS: Fault has been handled and the page tables
* populated, retry the access. This is the
* "Success" defined in PCI 10.4.2.1.
* @IOMMUFD_PAGE_RESP_INVALID: Could not handle this fault, don't retry the
* access. This is the "Invalid Request" in PCI
* 10.4.2.1.
*/
enum iommufd_page_response_code {
IOMMUFD_PAGE_RESP_SUCCESS = 0,
IOMMUFD_PAGE_RESP_INVALID = 1,
};
/**
* struct iommu_hwpt_page_response - IOMMU page fault response
* @cookie: The kernel-managed cookie reported in the fault message.
* @code: One of response code in enum iommufd_page_response_code.
*/
struct iommu_hwpt_page_response {
__u32 cookie;
__u32 code;
};
/**
* struct iommu_fault_alloc - ioctl(IOMMU_FAULT_QUEUE_ALLOC)
* @size: sizeof(struct iommu_fault_alloc)
* @flags: Must be 0
* @out_fault_id: The ID of the new FAULT
* @out_fault_fd: The fd of the new FAULT
*
* Explicitly allocate a fault handling object.
*/
struct iommu_fault_alloc {
__u32 size;
__u32 flags;
__u32 out_fault_id;
__u32 out_fault_fd;
};
#define IOMMU_FAULT_QUEUE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_FAULT_QUEUE_ALLOC)
/**
* enum iommu_viommu_type - Virtual IOMMU Type
* @IOMMU_VIOMMU_TYPE_DEFAULT: Reserved for future use
* @IOMMU_VIOMMU_TYPE_ARM_SMMUV3: ARM SMMUv3 driver specific type
*/
enum iommu_viommu_type {
IOMMU_VIOMMU_TYPE_DEFAULT = 0,
IOMMU_VIOMMU_TYPE_ARM_SMMUV3 = 1,
};
/**
* struct iommu_viommu_alloc - ioctl(IOMMU_VIOMMU_ALLOC)
* @size: sizeof(struct iommu_viommu_alloc)
* @flags: Must be 0
* @type: Type of the virtual IOMMU. Must be defined in enum iommu_viommu_type
* @dev_id: The device's physical IOMMU will be used to back the virtual IOMMU
* @hwpt_id: ID of a nesting parent HWPT to associate to
* @out_viommu_id: Output virtual IOMMU ID for the allocated object
*
* Allocate a virtual IOMMU object, representing the underlying physical IOMMU's
* virtualization support that is a security-isolated slice of the real IOMMU HW
* that is unique to a specific VM. Operations global to the IOMMU are connected
* to the vIOMMU, such as:
* - Security namespace for guest owned ID, e.g. guest-controlled cache tags
* - Non-device-affiliated event reporting, e.g. invalidation queue errors
* - Access to a sharable nesting parent pagetable across physical IOMMUs
* - Virtualization of various platforms IDs, e.g. RIDs and others
* - Delivery of paravirtualized invalidation
* - Direct assigned invalidation queues
* - Direct assigned interrupts
*/
struct iommu_viommu_alloc {
__u32 size;
__u32 flags;
__u32 type;
__u32 dev_id;
__u32 hwpt_id;
__u32 out_viommu_id;
};
#define IOMMU_VIOMMU_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VIOMMU_ALLOC)
/**
* struct iommu_vdevice_alloc - ioctl(IOMMU_VDEVICE_ALLOC)
* @size: sizeof(struct iommu_vdevice_alloc)
* @viommu_id: vIOMMU ID to associate with the virtual device
* @dev_id: The physical device to allocate a virtual instance on the vIOMMU
* @out_vdevice_id: Object handle for the vDevice. Pass to IOMMU_DESTORY
* @virt_id: Virtual device ID per vIOMMU, e.g. vSID of ARM SMMUv3, vDeviceID
* of AMD IOMMU, and vRID of a nested Intel VT-d to a Context Table
*
* Allocate a virtual device instance (for a physical device) against a vIOMMU.
* This instance holds the device's information (related to its vIOMMU) in a VM.
*/
struct iommu_vdevice_alloc {
__u32 size;
__u32 viommu_id;
__u32 dev_id;
__u32 out_vdevice_id;
__aligned_u64 virt_id;
};
#define IOMMU_VDEVICE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VDEVICE_ALLOC)
/**
* struct iommu_ioas_change_process - ioctl(VFIO_IOAS_CHANGE_PROCESS)
* @size: sizeof(struct iommu_ioas_change_process)
* @__reserved: Must be 0
*
* This transfers pinned memory counts for every memory map in every IOAS
* in the context to the current process. This only supports maps created
* with IOMMU_IOAS_MAP_FILE, and returns EINVAL if other maps are present.
* If the ioctl returns a failure status, then nothing is changed.
*
* This API is useful for transferring operation of a device from one process
* to another, such as during userland live update.
*/
struct iommu_ioas_change_process {
__u32 size;
__u32 __reserved;
};
#define IOMMU_IOAS_CHANGE_PROCESS \
_IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_CHANGE_PROCESS)
#endif

View File

@ -7,7 +7,7 @@
*/
#define KPF_LOCKED 0
#define KPF_ERROR 1
#define KPF_ERROR 1 /* Now unused */
#define KPF_REFERENCED 2
#define KPF_UPTODATE 3
#define KPF_DIRTY 4

View File

@ -41,9 +41,11 @@
* - 1.13 - Add debugger API
* - 1.14 - Update kfd_event_data
* - 1.15 - Enable managing mappings in compute VMs with GEM_VA ioctl
* - 1.16 - Add contiguous VRAM allocation flag
* - 1.17 - Add SDMA queue creation with target SDMA engine ID
*/
#define KFD_IOCTL_MAJOR_VERSION 1
#define KFD_IOCTL_MINOR_VERSION 15
#define KFD_IOCTL_MINOR_VERSION 17
struct kfd_ioctl_get_version_args {
__u32 major_version; /* from KFD */
@ -55,6 +57,7 @@ struct kfd_ioctl_get_version_args {
#define KFD_IOC_QUEUE_TYPE_SDMA 0x1
#define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL 0x2
#define KFD_IOC_QUEUE_TYPE_SDMA_XGMI 0x3
#define KFD_IOC_QUEUE_TYPE_SDMA_BY_ENG_ID 0x4
#define KFD_MAX_QUEUE_PERCENTAGE 100
#define KFD_MAX_QUEUE_PRIORITY 15
@ -77,6 +80,8 @@ struct kfd_ioctl_create_queue_args {
__u64 ctx_save_restore_address; /* to KFD */
__u32 ctx_save_restore_size; /* to KFD */
__u32 ctl_stack_size; /* to KFD */
__u32 sdma_engine_id; /* to KFD */
__u32 pad;
};
struct kfd_ioctl_destroy_queue_args {
@ -407,6 +412,7 @@ struct kfd_ioctl_acquire_vm_args {
#define KFD_IOC_ALLOC_MEM_FLAGS_COHERENT (1 << 26)
#define KFD_IOC_ALLOC_MEM_FLAGS_UNCACHED (1 << 25)
#define KFD_IOC_ALLOC_MEM_FLAGS_EXT_COHERENT (1 << 24)
#define KFD_IOC_ALLOC_MEM_FLAGS_CONTIGUOUS (1 << 23)
/* Allocate memory for later SVM (shared virtual memory) mapping.
*
@ -534,26 +540,29 @@ enum kfd_smi_event {
KFD_SMI_EVENT_ALL_PROCESS = 64
};
/* The reason of the page migration event */
enum KFD_MIGRATE_TRIGGERS {
KFD_MIGRATE_TRIGGER_PREFETCH,
KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU,
KFD_MIGRATE_TRIGGER_PAGEFAULT_CPU,
KFD_MIGRATE_TRIGGER_TTM_EVICTION
KFD_MIGRATE_TRIGGER_PREFETCH, /* Prefetch to GPU VRAM or system memory */
KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, /* GPU page fault recover */
KFD_MIGRATE_TRIGGER_PAGEFAULT_CPU, /* CPU page fault recover */
KFD_MIGRATE_TRIGGER_TTM_EVICTION /* TTM eviction */
};
/* The reason of user queue evition event */
enum KFD_QUEUE_EVICTION_TRIGGERS {
KFD_QUEUE_EVICTION_TRIGGER_SVM,
KFD_QUEUE_EVICTION_TRIGGER_USERPTR,
KFD_QUEUE_EVICTION_TRIGGER_TTM,
KFD_QUEUE_EVICTION_TRIGGER_SUSPEND,
KFD_QUEUE_EVICTION_CRIU_CHECKPOINT,
KFD_QUEUE_EVICTION_CRIU_RESTORE
KFD_QUEUE_EVICTION_TRIGGER_SVM, /* SVM buffer migration */
KFD_QUEUE_EVICTION_TRIGGER_USERPTR, /* userptr movement */
KFD_QUEUE_EVICTION_TRIGGER_TTM, /* TTM move buffer */
KFD_QUEUE_EVICTION_TRIGGER_SUSPEND, /* GPU suspend */
KFD_QUEUE_EVICTION_CRIU_CHECKPOINT, /* CRIU checkpoint */
KFD_QUEUE_EVICTION_CRIU_RESTORE /* CRIU restore */
};
/* The reason of unmap buffer from GPU event */
enum KFD_SVM_UNMAP_TRIGGERS {
KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY,
KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE,
KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU
KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY, /* MMU notifier CPU buffer movement */
KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE,/* MMU notifier page migration */
KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU /* Unmap to free the buffer */
};
#define KFD_SMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1))
@ -564,6 +573,78 @@ struct kfd_ioctl_smi_events_args {
__u32 anon_fd; /* from KFD */
};
/*
* SVM event tracing via SMI system management interface
*
* Open event file descriptor
* use ioctl AMDKFD_IOC_SMI_EVENTS, pass in gpuid and return a anonymous file
* descriptor to receive SMI events.
* If calling with sudo permission, then file descriptor can be used to receive
* SVM events from all processes, otherwise, to only receive SVM events of same
* process.
*
* To enable the SVM event
* Write event file descriptor with KFD_SMI_EVENT_MASK_FROM_INDEX(event) bitmap
* mask to start record the event to the kfifo, use bitmap mask combination
* for multiple events. New event mask will overwrite the previous event mask.
* KFD_SMI_EVENT_MASK_FROM_INDEX(KFD_SMI_EVENT_ALL_PROCESS) bit requires sudo
* permisson to receive SVM events from all process.
*
* To receive the event
* Application can poll file descriptor to wait for the events, then read event
* from the file into a buffer. Each event is one line string message, starting
* with the event id, then the event specific information.
*
* To decode event information
* The following event format string macro can be used with sscanf to decode
* the specific event information.
* event triggers: the reason to generate the event, defined as enum for unmap,
* eviction and migrate events.
* node, from, to, prefetch_loc, preferred_loc: GPU ID, or 0 for system memory.
* addr: user mode address, in pages
* size: in pages
* pid: the process ID to generate the event
* ns: timestamp in nanosecond-resolution, starts at system boot time but
* stops during suspend
* migrate_update: GPU page fault is recovered by 'M' for migrate, 'U' for update
* rw: 'W' for write page fault, 'R' for read page fault
* rescheduled: 'R' if the queue restore failed and rescheduled to try again
* error_code: migrate failure error code, 0 if no error
*/
#define KFD_EVENT_FMT_UPDATE_GPU_RESET(reset_seq_num, reset_cause)\
"%x %s\n", (reset_seq_num), (reset_cause)
#define KFD_EVENT_FMT_THERMAL_THROTTLING(bitmask, counter)\
"%llx:%llx\n", (bitmask), (counter)
#define KFD_EVENT_FMT_VMFAULT(pid, task_name)\
"%x:%s\n", (pid), (task_name)
#define KFD_EVENT_FMT_PAGEFAULT_START(ns, pid, addr, node, rw)\
"%lld -%d @%lx(%x) %c\n", (ns), (pid), (addr), (node), (rw)
#define KFD_EVENT_FMT_PAGEFAULT_END(ns, pid, addr, node, migrate_update)\
"%lld -%d @%lx(%x) %c\n", (ns), (pid), (addr), (node), (migrate_update)
#define KFD_EVENT_FMT_MIGRATE_START(ns, pid, start, size, from, to, prefetch_loc,\
preferred_loc, migrate_trigger)\
"%lld -%d @%lx(%lx) %x->%x %x:%x %d\n", (ns), (pid), (start), (size),\
(from), (to), (prefetch_loc), (preferred_loc), (migrate_trigger)
#define KFD_EVENT_FMT_MIGRATE_END(ns, pid, start, size, from, to, migrate_trigger, error_code) \
"%lld -%d @%lx(%lx) %x->%x %d %d\n", (ns), (pid), (start), (size),\
(from), (to), (migrate_trigger), (error_code)
#define KFD_EVENT_FMT_QUEUE_EVICTION(ns, pid, node, evict_trigger)\
"%lld -%d %x %d\n", (ns), (pid), (node), (evict_trigger)
#define KFD_EVENT_FMT_QUEUE_RESTORE(ns, pid, node, rescheduled)\
"%lld -%d %x %c\n", (ns), (pid), (node), (rescheduled)
#define KFD_EVENT_FMT_UNMAP_FROM_GPU(ns, pid, addr, size, node, unmap_trigger)\
"%lld -%d @%lx(%lx) %x %d\n", (ns), (pid), (addr), (size),\
(node), (unmap_trigger)
/**************************************************************************************************
* CRIU IOCTLs (Checkpoint Restore In Userspace)
*
@ -852,6 +933,7 @@ enum kfd_dbg_trap_address_watch_mode {
/* Additional wave settings */
enum kfd_dbg_trap_flags {
KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP = 1,
KFD_DBG_TRAP_FLAG_SINGLE_ALU_OP = 2,
};
/* Trap exceptions */

View File

@ -51,15 +51,17 @@
/* Old buggy user mode depends on this being 0 */
#define HSA_CAP_RESERVED_WAS_SRAM_EDCSUPPORTED 0x00080000
#define HSA_CAP_MEM_EDCSUPPORTED 0x00100000
#define HSA_CAP_RASEVENTNOTIFY 0x00200000
#define HSA_CAP_ASIC_REVISION_MASK 0x03c00000
#define HSA_CAP_ASIC_REVISION_SHIFT 22
#define HSA_CAP_SRAM_EDCSUPPORTED 0x04000000
#define HSA_CAP_SVMAPI_SUPPORTED 0x08000000
#define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x10000000
#define HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED 0x20000000
#define HSA_CAP_RESERVED 0xe00f8000
#define HSA_CAP_MEM_EDCSUPPORTED 0x00100000
#define HSA_CAP_RASEVENTNOTIFY 0x00200000
#define HSA_CAP_ASIC_REVISION_MASK 0x03c00000
#define HSA_CAP_ASIC_REVISION_SHIFT 22
#define HSA_CAP_SRAM_EDCSUPPORTED 0x04000000
#define HSA_CAP_SVMAPI_SUPPORTED 0x08000000
#define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x10000000
#define HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED 0x20000000
#define HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED 0x40000000
#define HSA_CAP_PER_QUEUE_RESET_SUPPORTED 0x80000000
#define HSA_CAP_RESERVED 0x000f8000
/* debug_prop bits in node properties */
#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_MASK 0x0000000f

View File

@ -192,11 +192,20 @@ struct kvm_xen_exit {
/* Flags that describe what fields in emulation_failure hold valid data. */
#define KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES (1ULL << 0)
/*
* struct kvm_run can be modified by userspace at any time, so KVM must be
* careful to avoid TOCTOU bugs. In order to protect KVM, HINT_UNSAFE_IN_KVM()
* renames fields in struct kvm_run from <symbol> to <symbol>__unsafe when
* compiled into the kernel, ensuring that any use within KVM is obvious and
* gets extra scrutiny.
*/
#define HINT_UNSAFE_IN_KVM(_symbol) _symbol
/* for KVM_RUN, returned by mmap(vcpu_fd, offset=0) */
struct kvm_run {
/* in */
__u8 request_interrupt_window;
__u8 immediate_exit;
__u8 HINT_UNSAFE_IN_KVM(immediate_exit);
__u8 padding1[6];
/* out */
@ -913,6 +922,9 @@ struct kvm_enable_cap {
#define KVM_CAP_MEMORY_ATTRIBUTES 233
#define KVM_CAP_GUEST_MEMFD 234
#define KVM_CAP_VM_TYPES 235
#define KVM_CAP_PRE_FAULT_MEMORY 236
#define KVM_CAP_X86_APIC_BUS_CYCLES_NS 237
#define KVM_CAP_X86_GUEST_MODE 238
struct kvm_irq_routing_irqchip {
__u32 irqchip;
@ -1138,7 +1150,15 @@ enum kvm_device_type {
#define KVM_DEV_TYPE_ARM_PV_TIME KVM_DEV_TYPE_ARM_PV_TIME
KVM_DEV_TYPE_RISCV_AIA,
#define KVM_DEV_TYPE_RISCV_AIA KVM_DEV_TYPE_RISCV_AIA
KVM_DEV_TYPE_LOONGARCH_IPI,
#define KVM_DEV_TYPE_LOONGARCH_IPI KVM_DEV_TYPE_LOONGARCH_IPI
KVM_DEV_TYPE_LOONGARCH_EIOINTC,
#define KVM_DEV_TYPE_LOONGARCH_EIOINTC KVM_DEV_TYPE_LOONGARCH_EIOINTC
KVM_DEV_TYPE_LOONGARCH_PCHPIC,
#define KVM_DEV_TYPE_LOONGARCH_PCHPIC KVM_DEV_TYPE_LOONGARCH_PCHPIC
KVM_DEV_TYPE_MAX,
};
struct kvm_vfio_spapr_tce {
@ -1544,4 +1564,13 @@ struct kvm_create_guest_memfd {
__u64 reserved[6];
};
#define KVM_PRE_FAULT_MEMORY _IOWR(KVMIO, 0xd5, struct kvm_pre_fault_memory)
struct kvm_pre_fault_memory {
__u64 gpa;
__u64 size;
__u64 flags;
__u64 padding[5];
};
#endif /* __LINUX_KVM_H */

View File

@ -12,31 +12,44 @@
#include <linux/types.h>
/**
* struct landlock_ruleset_attr - Ruleset definition
* struct landlock_ruleset_attr - Ruleset definition.
*
* Argument of sys_landlock_create_ruleset(). This structure can grow in
* future versions.
* Argument of sys_landlock_create_ruleset().
*
* This structure defines a set of *handled access rights*, a set of actions on
* different object types, which should be denied by default when the ruleset is
* enacted. Vice versa, access rights that are not specifically listed here are
* not going to be denied by this ruleset when it is enacted.
*
* For historical reasons, the %LANDLOCK_ACCESS_FS_REFER right is always denied
* by default, even when its bit is not set in @handled_access_fs. In order to
* add new rules with this access right, the bit must still be set explicitly
* (cf. `Filesystem flags`_).
*
* The explicit listing of *handled access rights* is required for backwards
* compatibility reasons. In most use cases, processes that use Landlock will
* *handle* a wide range or all access rights that they know about at build time
* (and that they have tested with a kernel that supported them all).
*
* This structure can grow in future Landlock versions.
*/
struct landlock_ruleset_attr {
/**
* @handled_access_fs: Bitmask of actions (cf. `Filesystem flags`_)
* that is handled by this ruleset and should then be forbidden if no
* rule explicitly allow them: it is a deny-by-default list that should
* contain as much Landlock access rights as possible. Indeed, all
* Landlock filesystem access rights that are not part of
* handled_access_fs are allowed. This is needed for backward
* compatibility reasons. One exception is the
* %LANDLOCK_ACCESS_FS_REFER access right, which is always implicitly
* handled, but must still be explicitly handled to add new rules with
* this access right.
* @handled_access_fs: Bitmask of handled filesystem actions
* (cf. `Filesystem flags`_).
*/
__u64 handled_access_fs;
/**
* @handled_access_net: Bitmask of actions (cf. `Network flags`_)
* that is handled by this ruleset and should then be forbidden if no
* rule explicitly allow them.
* @handled_access_net: Bitmask of handled network actions (cf. `Network
* flags`_).
*/
__u64 handled_access_net;
/**
* @scoped: Bitmask of scopes (cf. `Scope flags`_)
* restricting a Landlock domain from accessing outside
* resources (e.g. IPCs).
*/
__u64 scoped;
};
/*
@ -97,20 +110,21 @@ struct landlock_path_beneath_attr {
*/
struct landlock_net_port_attr {
/**
* @allowed_access: Bitmask of allowed access network for a port
* @allowed_access: Bitmask of allowed network actions for a port
* (cf. `Network flags`_).
*/
__u64 allowed_access;
/**
* @port: Network port in host endianness.
*
* It should be noted that port 0 passed to :manpage:`bind(2)` will
* bind to an available port from a specific port range. This can be
* configured thanks to the ``/proc/sys/net/ipv4/ip_local_port_range``
* sysctl (also used for IPv6). A Landlock rule with port 0 and the
* ``LANDLOCK_ACCESS_NET_BIND_TCP`` right means that requesting to bind
* on port 0 is allowed and it will automatically translate to binding
* on the related port range.
* It should be noted that port 0 passed to :manpage:`bind(2)` will bind
* to an available port from the ephemeral port range. This can be
* configured with the ``/proc/sys/net/ipv4/ip_local_port_range`` sysctl
* (also used for IPv6).
*
* A Landlock rule with port 0 and the ``LANDLOCK_ACCESS_NET_BIND_TCP``
* right means that requesting to bind on port 0 is allowed and it will
* automatically translate to binding on the related port range.
*/
__u64 port;
};
@ -131,10 +145,10 @@ struct landlock_net_port_attr {
* The following access rights apply only to files:
*
* - %LANDLOCK_ACCESS_FS_EXECUTE: Execute a file.
* - %LANDLOCK_ACCESS_FS_WRITE_FILE: Open a file with write access. Note that
* you might additionally need the %LANDLOCK_ACCESS_FS_TRUNCATE right in order
* to overwrite files with :manpage:`open(2)` using ``O_TRUNC`` or
* :manpage:`creat(2)`.
* - %LANDLOCK_ACCESS_FS_WRITE_FILE: Open a file with write access. When
* opening files for writing, you will often additionally need the
* %LANDLOCK_ACCESS_FS_TRUNCATE right. In many cases, these system calls
* truncate existing files when overwriting them (e.g., :manpage:`creat(2)`).
* - %LANDLOCK_ACCESS_FS_READ_FILE: Open a file with read access.
* - %LANDLOCK_ACCESS_FS_TRUNCATE: Truncate a file with :manpage:`truncate(2)`,
* :manpage:`ftruncate(2)`, :manpage:`creat(2)`, or :manpage:`open(2)` with
@ -256,7 +270,7 @@ struct landlock_net_port_attr {
* These flags enable to restrict a sandboxed process to a set of network
* actions. This is supported since the Landlock ABI version 4.
*
* TCP sockets with allowed actions:
* The following access rights apply to TCP port numbers:
*
* - %LANDLOCK_ACCESS_NET_BIND_TCP: Bind a TCP socket to a local port.
* - %LANDLOCK_ACCESS_NET_CONNECT_TCP: Connect an active TCP socket to
@ -266,4 +280,28 @@ struct landlock_net_port_attr {
#define LANDLOCK_ACCESS_NET_BIND_TCP (1ULL << 0)
#define LANDLOCK_ACCESS_NET_CONNECT_TCP (1ULL << 1)
/* clang-format on */
/**
* DOC: scope
*
* Scope flags
* ~~~~~~~~~~~
*
* These flags enable to isolate a sandboxed process from a set of IPC actions.
* Setting a flag for a ruleset will isolate the Landlock domain to forbid
* connections to resources outside the domain.
*
* Scopes:
*
* - %LANDLOCK_SCOPE_ABSTRACT_UNIX_SOCKET: Restrict a sandboxed process from
* connecting to an abstract UNIX socket created by a process outside the
* related Landlock domain (e.g. a parent domain or a non-sandboxed process).
* - %LANDLOCK_SCOPE_SIGNAL: Restrict a sandboxed process from sending a signal
* to another process outside the domain.
*/
/* clang-format off */
#define LANDLOCK_SCOPE_ABSTRACT_UNIX_SOCKET (1ULL << 0)
#define LANDLOCK_SCOPE_SIGNAL (1ULL << 1)
/* clang-format on*/
#endif /* _LINUX_LANDLOCK_H */

View File

@ -140,25 +140,6 @@
#endif /* _NETINET_IN_H */
/* Coordinate with glibc netipx/ipx.h header. */
#if defined(__NETIPX_IPX_H)
#define __UAPI_DEF_SOCKADDR_IPX 0
#define __UAPI_DEF_IPX_ROUTE_DEFINITION 0
#define __UAPI_DEF_IPX_INTERFACE_DEFINITION 0
#define __UAPI_DEF_IPX_CONFIG_DATA 0
#define __UAPI_DEF_IPX_ROUTE_DEF 0
#else /* defined(__NETIPX_IPX_H) */
#define __UAPI_DEF_SOCKADDR_IPX 1
#define __UAPI_DEF_IPX_ROUTE_DEFINITION 1
#define __UAPI_DEF_IPX_INTERFACE_DEFINITION 1
#define __UAPI_DEF_IPX_CONFIG_DATA 1
#define __UAPI_DEF_IPX_ROUTE_DEF 1
#endif /* defined(__NETIPX_IPX_H) */
/* Definitions for xattr.h */
#if defined(_SYS_XATTR_H)
#define __UAPI_DEF_XATTR 0
@ -240,23 +221,6 @@
#define __UAPI_DEF_IP6_MTUINFO 1
#endif
/* Definitions for ipx.h */
#ifndef __UAPI_DEF_SOCKADDR_IPX
#define __UAPI_DEF_SOCKADDR_IPX 1
#endif
#ifndef __UAPI_DEF_IPX_ROUTE_DEFINITION
#define __UAPI_DEF_IPX_ROUTE_DEFINITION 1
#endif
#ifndef __UAPI_DEF_IPX_INTERFACE_DEFINITION
#define __UAPI_DEF_IPX_INTERFACE_DEFINITION 1
#endif
#ifndef __UAPI_DEF_IPX_CONFIG_DATA
#define __UAPI_DEF_IPX_CONFIG_DATA 1
#endif
#ifndef __UAPI_DEF_IPX_ROUTE_DEF
#define __UAPI_DEF_IPX_ROUTE_DEF 1
#endif
/* Definitions for xattr.h */
#ifndef __UAPI_DEF_XATTR
#define __UAPI_DEF_XATTR 1

View File

@ -64,6 +64,7 @@ struct lsm_ctx {
#define LSM_ID_LANDLOCK 110
#define LSM_ID_IMA 111
#define LSM_ID_EVM 112
#define LSM_ID_IPE 113
/*
* LSM_ATTR_XXX definitions identify different LSM attributes

View File

@ -23,6 +23,7 @@
#define MDIO_MMD_DTEXS 5 /* DTE Extender Sublayer */
#define MDIO_MMD_TC 6 /* Transmission Convergence */
#define MDIO_MMD_AN 7 /* Auto-Negotiation */
#define MDIO_MMD_POWER_UNIT 13 /* PHY Power Unit */
#define MDIO_MMD_C22EXT 29 /* Clause 22 extension */
#define MDIO_MMD_VEND1 30 /* Vendor specific 1 */
#define MDIO_MMD_VEND2 31 /* Vendor specific 2 */

View File

@ -34,7 +34,7 @@
#define MEDIA_BUS_FMT_FIXED 0x0001
/* RGB - next is 0x1026 */
/* RGB - next is 0x1028 */
#define MEDIA_BUS_FMT_RGB444_1X12 0x1016
#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
@ -68,6 +68,8 @@
#define MEDIA_BUS_FMT_ARGB8888_1X32 0x100d
#define MEDIA_BUS_FMT_RGB888_1X32_PADHI 0x100f
#define MEDIA_BUS_FMT_RGB101010_1X30 0x1018
#define MEDIA_BUS_FMT_RGB101010_1X7X5_SPWG 0x1026
#define MEDIA_BUS_FMT_RGB101010_1X7X5_JEIDA 0x1027
#define MEDIA_BUS_FMT_RGB666_1X36_CPADLO 0x1020
#define MEDIA_BUS_FMT_RGB888_1X36_CPADLO 0x1021
#define MEDIA_BUS_FMT_RGB121212_1X36 0x1019

View File

@ -0,0 +1,968 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* PiSP Back End configuration definitions.
*
* Copyright (C) 2021 - Raspberry Pi Ltd
*
*/
#ifndef _PISP_BE_CONFIG_H_
#define _PISP_BE_CONFIG_H_
#include <linux/types.h>
#include "pisp_common.h"
/* byte alignment for inputs */
#define PISP_BACK_END_INPUT_ALIGN 4u
/* alignment for compressed inputs */
#define PISP_BACK_END_COMPRESSED_ALIGN 8u
/* minimum required byte alignment for outputs */
#define PISP_BACK_END_OUTPUT_MIN_ALIGN 16u
/* preferred byte alignment for outputs */
#define PISP_BACK_END_OUTPUT_MAX_ALIGN 64u
/* minimum allowed tile width anywhere in the pipeline */
#define PISP_BACK_END_MIN_TILE_WIDTH 16u
/* minimum allowed tile width anywhere in the pipeline */
#define PISP_BACK_END_MIN_TILE_HEIGHT 16u
#define PISP_BACK_END_NUM_OUTPUTS 2
#define PISP_BACK_END_HOG_OUTPUT 1
#define PISP_BACK_END_NUM_TILES 64
enum pisp_be_bayer_enable {
PISP_BE_BAYER_ENABLE_INPUT = 0x000001,
PISP_BE_BAYER_ENABLE_DECOMPRESS = 0x000002,
PISP_BE_BAYER_ENABLE_DPC = 0x000004,
PISP_BE_BAYER_ENABLE_GEQ = 0x000008,
PISP_BE_BAYER_ENABLE_TDN_INPUT = 0x000010,
PISP_BE_BAYER_ENABLE_TDN_DECOMPRESS = 0x000020,
PISP_BE_BAYER_ENABLE_TDN = 0x000040,
PISP_BE_BAYER_ENABLE_TDN_COMPRESS = 0x000080,
PISP_BE_BAYER_ENABLE_TDN_OUTPUT = 0x000100,
PISP_BE_BAYER_ENABLE_SDN = 0x000200,
PISP_BE_BAYER_ENABLE_BLC = 0x000400,
PISP_BE_BAYER_ENABLE_STITCH_INPUT = 0x000800,
PISP_BE_BAYER_ENABLE_STITCH_DECOMPRESS = 0x001000,
PISP_BE_BAYER_ENABLE_STITCH = 0x002000,
PISP_BE_BAYER_ENABLE_STITCH_COMPRESS = 0x004000,
PISP_BE_BAYER_ENABLE_STITCH_OUTPUT = 0x008000,
PISP_BE_BAYER_ENABLE_WBG = 0x010000,
PISP_BE_BAYER_ENABLE_CDN = 0x020000,
PISP_BE_BAYER_ENABLE_LSC = 0x040000,
PISP_BE_BAYER_ENABLE_TONEMAP = 0x080000,
PISP_BE_BAYER_ENABLE_CAC = 0x100000,
PISP_BE_BAYER_ENABLE_DEBIN = 0x200000,
PISP_BE_BAYER_ENABLE_DEMOSAIC = 0x400000,
};
enum pisp_be_rgb_enable {
PISP_BE_RGB_ENABLE_INPUT = 0x000001,
PISP_BE_RGB_ENABLE_CCM = 0x000002,
PISP_BE_RGB_ENABLE_SAT_CONTROL = 0x000004,
PISP_BE_RGB_ENABLE_YCBCR = 0x000008,
PISP_BE_RGB_ENABLE_FALSE_COLOUR = 0x000010,
PISP_BE_RGB_ENABLE_SHARPEN = 0x000020,
/* Preferred colours would occupy 0x000040 */
PISP_BE_RGB_ENABLE_YCBCR_INVERSE = 0x000080,
PISP_BE_RGB_ENABLE_GAMMA = 0x000100,
PISP_BE_RGB_ENABLE_CSC0 = 0x000200,
PISP_BE_RGB_ENABLE_CSC1 = 0x000400,
PISP_BE_RGB_ENABLE_DOWNSCALE0 = 0x001000,
PISP_BE_RGB_ENABLE_DOWNSCALE1 = 0x002000,
PISP_BE_RGB_ENABLE_RESAMPLE0 = 0x008000,
PISP_BE_RGB_ENABLE_RESAMPLE1 = 0x010000,
PISP_BE_RGB_ENABLE_OUTPUT0 = 0x040000,
PISP_BE_RGB_ENABLE_OUTPUT1 = 0x080000,
PISP_BE_RGB_ENABLE_HOG = 0x200000
};
#define PISP_BE_RGB_ENABLE_CSC(i) (PISP_BE_RGB_ENABLE_CSC0 << (i))
#define PISP_BE_RGB_ENABLE_DOWNSCALE(i) (PISP_BE_RGB_ENABLE_DOWNSCALE0 << (i))
#define PISP_BE_RGB_ENABLE_RESAMPLE(i) (PISP_BE_RGB_ENABLE_RESAMPLE0 << (i))
#define PISP_BE_RGB_ENABLE_OUTPUT(i) (PISP_BE_RGB_ENABLE_OUTPUT0 << (i))
/*
* We use the enable flags to show when blocks are "dirty", but we need some
* extra ones too.
*/
enum pisp_be_dirty {
PISP_BE_DIRTY_GLOBAL = 0x0001,
PISP_BE_DIRTY_SH_FC_COMBINE = 0x0002,
PISP_BE_DIRTY_CROP = 0x0004
};
/**
* struct pisp_be_global_config - PiSP global enable bitmaps
* @bayer_enables: Bayer input enable flags
* @rgb_enables: RGB output enable flags
* @bayer_order: Bayer input format ordering
* @pad: Padding bytes
*/
struct pisp_be_global_config {
__u32 bayer_enables;
__u32 rgb_enables;
__u8 bayer_order;
__u8 pad[3];
} __attribute__((packed));
/**
* struct pisp_be_input_buffer_config - PiSP Back End input buffer
* @addr: Input buffer address
*/
struct pisp_be_input_buffer_config {
/* low 32 bits followed by high 32 bits (for each of up to 3 planes) */
__u32 addr[3][2];
} __attribute__((packed));
/**
* struct pisp_be_dpc_config - PiSP Back End DPC config
*
* Defective Pixel Correction configuration
*
* @coeff_level: Coefficient for the darkest neighbouring pixel value
* @coeff_range: Coefficient for the range of pixels for this Bayer channel
* @pad: Padding byte
* @flags: DPC configuration flags
*/
struct pisp_be_dpc_config {
__u8 coeff_level;
__u8 coeff_range;
__u8 pad;
#define PISP_BE_DPC_FLAG_FOLDBACK 1
__u8 flags;
} __attribute__((packed));
/**
* struct pisp_be_geq_config - PiSP Back End GEQ config
*
* Green Equalisation configuration
*
* @offset: Offset value for threshold calculation
* @slope_sharper: Slope/Sharper configuration
* @min: Minimum value the threshold may have
* @max: Maximum value the threshold may have
*/
struct pisp_be_geq_config {
__u16 offset;
#define PISP_BE_GEQ_SHARPER (1U << 15)
#define PISP_BE_GEQ_SLOPE ((1 << 10) - 1)
/* top bit is the "sharper" flag, slope value is bottom 10 bits */
__u16 slope_sharper;
__u16 min;
__u16 max;
} __attribute__((packed));
/**
* struct pisp_be_tdn_input_buffer_config - PiSP Back End TDN input buffer
* @addr: TDN input buffer address
*/
struct pisp_be_tdn_input_buffer_config {
/* low 32 bits followed by high 32 bits */
__u32 addr[2];
} __attribute__((packed));
/**
* struct pisp_be_tdn_config - PiSP Back End TDN config
*
* Temporal Denoise configuration
*
* @black_level: Black level value subtracted from pixels
* @ratio: Multiplier for the LTA input frame
* @noise_constant: Constant offset value used in noise estimation
* @noise_slope: Noise estimation multiplier
* @threshold: Threshold for TDN operations
* @reset: Disable TDN operations
* @pad: Padding byte
*/
struct pisp_be_tdn_config {
__u16 black_level;
__u16 ratio;
__u16 noise_constant;
__u16 noise_slope;
__u16 threshold;
__u8 reset;
__u8 pad;
} __attribute__((packed));
/**
* struct pisp_be_tdn_output_buffer_config - PiSP Back End TDN output buffer
* @addr: TDN output buffer address
*/
struct pisp_be_tdn_output_buffer_config {
/* low 32 bits followed by high 32 bits */
__u32 addr[2];
} __attribute__((packed));
/**
* struct pisp_be_sdn_config - PiSP Back End SDN config
*
* Spatial Denoise configuration
*
* @black_level: Black level subtracted from pixel for noise estimation
* @leakage: Proportion of the original undenoised value to mix in
* denoised output
* @pad: Padding byte
* @noise_constant: Noise constant used for noise estimation
* @noise_slope: Noise slope value used for noise estimation
* @noise_constant2: Second noise constant used for noise estimation
* @noise_slope2: Second slope value used for noise estimation
*/
struct pisp_be_sdn_config {
__u16 black_level;
__u8 leakage;
__u8 pad;
__u16 noise_constant;
__u16 noise_slope;
__u16 noise_constant2;
__u16 noise_slope2;
} __attribute__((packed));
/**
* struct pisp_be_stitch_input_buffer_config - PiSP Back End Stitch input
* @addr: Stitch input buffer address
*/
struct pisp_be_stitch_input_buffer_config {
/* low 32 bits followed by high 32 bits */
__u32 addr[2];
} __attribute__((packed));
#define PISP_BE_STITCH_STREAMING_LONG 0x8000
#define PISP_BE_STITCH_EXPOSURE_RATIO_MASK 0x7fff
/**
* struct pisp_be_stitch_config - PiSP Back End Stitch config
*
* Stitch block configuration
*
* @threshold_lo: Low threshold value
* @threshold_diff_power: Low and high threshold difference
* @pad: Padding bytes
* @exposure_ratio: Multiplier to convert long exposure pixels into
* short exposure pixels
* @motion_threshold_256: Motion threshold above which short exposure
* pixels are used
* @motion_threshold_recip: Reciprocal of motion_threshold_256 value
*/
struct pisp_be_stitch_config {
__u16 threshold_lo;
__u8 threshold_diff_power;
__u8 pad;
/* top bit indicates whether streaming input is the long exposure */
__u16 exposure_ratio;
__u8 motion_threshold_256;
__u8 motion_threshold_recip;
} __attribute__((packed));
/**
* struct pisp_be_stitch_output_buffer_config - PiSP Back End Stitch output
* @addr: Stitch input buffer address
*/
struct pisp_be_stitch_output_buffer_config {
/* low 32 bits followed by high 32 bits */
__u32 addr[2];
} __attribute__((packed));
/**
* struct pisp_be_cdn_config - PiSP Back End CDN config
*
* Colour Denoise configuration
*
* @thresh: Constant for noise estimation
* @iir_strength: Relative strength of the IIR part of the filter
* @g_adjust: Proportion of the change assigned to the G channel
*/
struct pisp_be_cdn_config {
__u16 thresh;
__u8 iir_strength;
__u8 g_adjust;
} __attribute__((packed));
#define PISP_BE_LSC_LOG_GRID_SIZE 5
#define PISP_BE_LSC_GRID_SIZE (1 << PISP_BE_LSC_LOG_GRID_SIZE)
#define PISP_BE_LSC_STEP_PRECISION 18
/**
* struct pisp_be_lsc_config - PiSP Back End LSC config
*
* Lens Shading Correction configuration
*
* @grid_step_x: Reciprocal of cell size width
* @grid_step_y: Reciprocal of cell size height
* @lut_packed: Jointly-coded RGB gains for each LSC grid
*/
struct pisp_be_lsc_config {
/* (1<<18) / grid_cell_width */
__u16 grid_step_x;
/* (1<<18) / grid_cell_height */
__u16 grid_step_y;
/* RGB gains jointly encoded in 32 bits */
#define PISP_BE_LSC_LUT_SIZE (PISP_BE_LSC_GRID_SIZE + 1)
__u32 lut_packed[PISP_BE_LSC_LUT_SIZE][PISP_BE_LSC_LUT_SIZE];
} __attribute__((packed));
/**
* struct pisp_be_lsc_extra - PiSP Back End LSC Extra config
* @offset_x: Horizontal offset into the LSC table of this tile
* @offset_y: Vertical offset into the LSC table of this tile
*/
struct pisp_be_lsc_extra {
__u16 offset_x;
__u16 offset_y;
} __attribute__((packed));
#define PISP_BE_CAC_LOG_GRID_SIZE 3
#define PISP_BE_CAC_GRID_SIZE (1 << PISP_BE_CAC_LOG_GRID_SIZE)
#define PISP_BE_CAC_STEP_PRECISION 20
/**
* struct pisp_be_cac_config - PiSP Back End CAC config
*
* Chromatic Aberration Correction config
*
* @grid_step_x: Reciprocal of cell size width
* @grid_step_y: Reciprocal of cell size height
* @lut: Pixel shift for the CAC grid
*/
struct pisp_be_cac_config {
/* (1<<20) / grid_cell_width */
__u16 grid_step_x;
/* (1<<20) / grid_cell_height */
__u16 grid_step_y;
/* [gridy][gridx][rb][xy] */
#define PISP_BE_CAC_LUT_SIZE (PISP_BE_CAC_GRID_SIZE + 1)
__s8 lut[PISP_BE_CAC_LUT_SIZE][PISP_BE_CAC_LUT_SIZE][2][2];
} __attribute__((packed));
/**
* struct pisp_be_cac_extra - PiSP Back End CAC extra config
* @offset_x: Horizontal offset into the CAC table of this tile
* @offset_y: Horizontal offset into the CAC table of this tile
*/
struct pisp_be_cac_extra {
__u16 offset_x;
__u16 offset_y;
} __attribute__((packed));
#define PISP_BE_DEBIN_NUM_COEFFS 4
/**
* struct pisp_be_debin_config - PiSP Back End Debin config
*
* Debinning configuration
*
* @coeffs: Filter coefficients for debinning
* @h_enable: Horizontal debinning enable
* @v_enable: Vertical debinning enable
* @pad: Padding bytes
*/
struct pisp_be_debin_config {
__s8 coeffs[PISP_BE_DEBIN_NUM_COEFFS];
__s8 h_enable;
__s8 v_enable;
__s8 pad[2];
} __attribute__((packed));
#define PISP_BE_TONEMAP_LUT_SIZE 64
/**
* struct pisp_be_tonemap_config - PiSP Back End Tonemap config
*
* Tonemapping configuration
*
* @detail_constant: Constant value for threshold calculation
* @detail_slope: Slope value for threshold calculation
* @iir_strength: Relative strength of the IIR fiter
* @strength: Strength factor
* @lut: Look-up table for tonemap curve
*/
struct pisp_be_tonemap_config {
__u16 detail_constant;
__u16 detail_slope;
__u16 iir_strength;
__u16 strength;
__u32 lut[PISP_BE_TONEMAP_LUT_SIZE];
} __attribute__((packed));
/**
* struct pisp_be_demosaic_config - PiSP Back End Demosaic config
*
* Demosaic configuration
*
* @sharper: Use other Bayer channels to increase sharpness
* @fc_mode: Built-in false colour suppression mode
* @pad: Padding bytes
*/
struct pisp_be_demosaic_config {
__u8 sharper;
__u8 fc_mode;
__u8 pad[2];
} __attribute__((packed));
/**
* struct pisp_be_ccm_config - PiSP Back End CCM config
*
* Colour Correction Matrix configuration
*
* @coeffs: Matrix coefficients
* @pad: Padding bytes
* @offsets: Offsets triplet
*/
struct pisp_be_ccm_config {
__s16 coeffs[9];
__u8 pad[2];
__s32 offsets[3];
} __attribute__((packed));
/**
* struct pisp_be_sat_control_config - PiSP Back End SAT config
*
* Saturation Control configuration
*
* @shift_r: Left shift for Red colour channel
* @shift_g: Left shift for Green colour channel
* @shift_b: Left shift for Blue colour channel
* @pad: Padding byte
*/
struct pisp_be_sat_control_config {
__u8 shift_r;
__u8 shift_g;
__u8 shift_b;
__u8 pad;
} __attribute__((packed));
/**
* struct pisp_be_false_colour_config - PiSP Back End False Colour config
*
* False Colour configuration
*
* @distance: Distance of neighbouring pixels, either 1 or 2
* @pad: Padding bytes
*/
struct pisp_be_false_colour_config {
__u8 distance;
__u8 pad[3];
} __attribute__((packed));
#define PISP_BE_SHARPEN_SIZE 5
#define PISP_BE_SHARPEN_FUNC_NUM_POINTS 9
/**
* struct pisp_be_sharpen_config - PiSP Back End Sharpening config
*
* Sharpening configuration
*
* @kernel0: Coefficient for filter 0
* @pad0: Padding byte
* @kernel1: Coefficient for filter 1
* @pad1: Padding byte
* @kernel2: Coefficient for filter 2
* @pad2: Padding byte
* @kernel3: Coefficient for filter 3
* @pad3: Padding byte
* @kernel4: Coefficient for filter 4
* @pad4: Padding byte
* @threshold_offset0: Offset for filter 0 response calculation
* @threshold_slope0: Slope multiplier for the filter 0 response calculation
* @scale0: Scale factor for filter 0 response calculation
* @pad5: Padding byte
* @threshold_offset1: Offset for filter 0 response calculation
* @threshold_slope1: Slope multiplier for the filter 0 response calculation
* @scale1: Scale factor for filter 0 response calculation
* @pad6: Padding byte
* @threshold_offset2: Offset for filter 0 response calculation
* @threshold_slope2: Slope multiplier for the filter 0 response calculation
* @scale2: Scale factor for filter 0 response calculation
* @pad7: Padding byte
* @threshold_offset3: Offset for filter 0 response calculation
* @threshold_slope3: Slope multiplier for the filter 0 response calculation
* @scale3: Scale factor for filter 0 response calculation
* @pad8: Padding byte
* @threshold_offset4: Offset for filter 0 response calculation
* @threshold_slope4: Slope multiplier for the filter 0 response calculation
* @scale4: Scale factor for filter 0 response calculation
* @pad9: Padding byte
* @positive_strength: Factor to scale the positive sharpening strength
* @positive_pre_limit: Maximum allowed possible positive sharpening value
* @positive_func: Gain factor applied to positive sharpening response
* @positive_limit: Final gain factor applied to positive sharpening
* @negative_strength: Factor to scale the negative sharpening strength
* @negative_pre_limit: Maximum allowed possible negative sharpening value
* @negative_func: Gain factor applied to negative sharpening response
* @negative_limit: Final gain factor applied to negative sharpening
* @enables: Filter enable mask
* @white: White output pixel filter mask
* @black: Black output pixel filter mask
* @grey: Grey output pixel filter mask
*/
struct pisp_be_sharpen_config {
__s8 kernel0[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
__s8 pad0[3];
__s8 kernel1[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
__s8 pad1[3];
__s8 kernel2[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
__s8 pad2[3];
__s8 kernel3[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
__s8 pad3[3];
__s8 kernel4[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
__s8 pad4[3];
__u16 threshold_offset0;
__u16 threshold_slope0;
__u16 scale0;
__u16 pad5;
__u16 threshold_offset1;
__u16 threshold_slope1;
__u16 scale1;
__u16 pad6;
__u16 threshold_offset2;
__u16 threshold_slope2;
__u16 scale2;
__u16 pad7;
__u16 threshold_offset3;
__u16 threshold_slope3;
__u16 scale3;
__u16 pad8;
__u16 threshold_offset4;
__u16 threshold_slope4;
__u16 scale4;
__u16 pad9;
__u16 positive_strength;
__u16 positive_pre_limit;
__u16 positive_func[PISP_BE_SHARPEN_FUNC_NUM_POINTS];
__u16 positive_limit;
__u16 negative_strength;
__u16 negative_pre_limit;
__u16 negative_func[PISP_BE_SHARPEN_FUNC_NUM_POINTS];
__u16 negative_limit;
__u8 enables;
__u8 white;
__u8 black;
__u8 grey;
} __attribute__((packed));
/**
* struct pisp_be_sh_fc_combine_config - PiSP Back End Sharpening and
* False Colour config
*
* Sharpening and False Colour configuration
*
* @y_factor: Control amount of desaturation of pixels being darkened
* @c1_factor: Control amount of brightening of a pixel for the Cb
* channel
* @c2_factor: Control amount of brightening of a pixel for the Cr
* channel
* @pad: Padding byte
*/
struct pisp_be_sh_fc_combine_config {
__u8 y_factor;
__u8 c1_factor;
__u8 c2_factor;
__u8 pad;
} __attribute__((packed));
#define PISP_BE_GAMMA_LUT_SIZE 64
/**
* struct pisp_be_gamma_config - PiSP Back End Gamma configuration
* @lut: Gamma curve look-up table
*/
struct pisp_be_gamma_config {
__u32 lut[PISP_BE_GAMMA_LUT_SIZE];
} __attribute__((packed));
/**
* struct pisp_be_crop_config - PiSP Back End Crop config
*
* Crop configuration
*
* @offset_x: Number of pixels cropped from the left of the tile
* @offset_y: Number of pixels cropped from the top of the tile
* @width: Width of the cropped tile output
* @height: Height of the cropped tile output
*/
struct pisp_be_crop_config {
__u16 offset_x, offset_y;
__u16 width, height;
} __attribute__((packed));
#define PISP_BE_RESAMPLE_FILTER_SIZE 96
/**
* struct pisp_be_resample_config - PiSP Back End Resampling config
*
* Resample configuration
*
* @scale_factor_h: Horizontal scale factor
* @scale_factor_v: Vertical scale factor
* @coef: Resample coefficients
*/
struct pisp_be_resample_config {
__u16 scale_factor_h, scale_factor_v;
__s16 coef[PISP_BE_RESAMPLE_FILTER_SIZE];
} __attribute__((packed));
/**
* struct pisp_be_resample_extra - PiSP Back End Resample config
*
* Resample configuration
*
* @scaled_width: Width in pixels of the scaled output
* @scaled_height: Height in pixels of the scaled output
* @initial_phase_h: Initial horizontal phase
* @initial_phase_v: Initial vertical phase
*/
struct pisp_be_resample_extra {
__u16 scaled_width;
__u16 scaled_height;
__s16 initial_phase_h[3];
__s16 initial_phase_v[3];
} __attribute__((packed));
/**
* struct pisp_be_downscale_config - PiSP Back End Downscale config
*
* Downscale configuration
*
* @scale_factor_h: Horizontal scale factor
* @scale_factor_v: Vertical scale factor
* @scale_recip_h: Horizontal reciprocal factor
* @scale_recip_v: Vertical reciprocal factor
*/
struct pisp_be_downscale_config {
__u16 scale_factor_h;
__u16 scale_factor_v;
__u16 scale_recip_h;
__u16 scale_recip_v;
} __attribute__((packed));
/**
* struct pisp_be_downscale_extra - PiSP Back End Downscale Extra config
* @scaled_width: Scaled image width
* @scaled_height: Scaled image height
*/
struct pisp_be_downscale_extra {
__u16 scaled_width;
__u16 scaled_height;
} __attribute__((packed));
/**
* struct pisp_be_hog_config - PiSP Back End HOG config
*
* Histogram of Oriented Gradients configuration
*
* @compute_signed: Set 0 for unsigned gradients, 1 for signed
* @channel_mix: Channels proportions to use
* @stride: Stride in bytes between blocks directly below
*/
struct pisp_be_hog_config {
__u8 compute_signed;
__u8 channel_mix[3];
__u32 stride;
} __attribute__((packed));
struct pisp_be_axi_config {
__u8 r_qos; /* Read QoS */
__u8 r_cache_prot; /* Read { prot[2:0], cache[3:0] } */
__u8 w_qos; /* Write QoS */
__u8 w_cache_prot; /* Write { prot[2:0], cache[3:0] } */
} __attribute__((packed));
/**
* enum pisp_be_transform - PiSP Back End Transform flags
* @PISP_BE_TRANSFORM_NONE: No transform
* @PISP_BE_TRANSFORM_HFLIP: Horizontal flip
* @PISP_BE_TRANSFORM_VFLIP: Vertical flip
* @PISP_BE_TRANSFORM_ROT180: 180 degress rotation
*/
enum pisp_be_transform {
PISP_BE_TRANSFORM_NONE = 0x0,
PISP_BE_TRANSFORM_HFLIP = 0x1,
PISP_BE_TRANSFORM_VFLIP = 0x2,
PISP_BE_TRANSFORM_ROT180 =
(PISP_BE_TRANSFORM_HFLIP | PISP_BE_TRANSFORM_VFLIP)
};
struct pisp_be_output_format_config {
struct pisp_image_format_config image;
__u8 transform;
__u8 pad[3];
__u16 lo;
__u16 hi;
__u16 lo2;
__u16 hi2;
} __attribute__((packed));
/**
* struct pisp_be_output_buffer_config - PiSP Back End Output buffer
* @addr: Output buffer address
*/
struct pisp_be_output_buffer_config {
/* low 32 bits followed by high 32 bits (for each of 3 planes) */
__u32 addr[3][2];
} __attribute__((packed));
/**
* struct pisp_be_hog_buffer_config - PiSP Back End HOG buffer
* @addr: HOG buffer address
*/
struct pisp_be_hog_buffer_config {
/* low 32 bits followed by high 32 bits */
__u32 addr[2];
} __attribute__((packed));
/**
* struct pisp_be_config - RaspberryPi PiSP Back End Processing configuration
*
* @input_buffer: Input buffer addresses
* @tdn_input_buffer: TDN input buffer addresses
* @stitch_input_buffer: Stitch input buffer addresses
* @tdn_output_buffer: TDN output buffer addresses
* @stitch_output_buffer: Stitch output buffer addresses
* @output_buffer: Output buffers addresses
* @hog_buffer: HOG buffer addresses
* @global: Global PiSP configuration
* @input_format: Input image format
* @decompress: Decompress configuration
* @dpc: Defective Pixel Correction configuration
* @geq: Green Equalisation configuration
* @tdn_input_format: Temporal Denoise input format
* @tdn_decompress: Temporal Denoise decompress configuration
* @tdn: Temporal Denoise configuration
* @tdn_compress: Temporal Denoise compress configuration
* @tdn_output_format: Temporal Denoise output format
* @sdn: Spatial Denoise configuration
* @blc: Black Level Correction configuration
* @stitch_compress: Stitch compress configuration
* @stitch_output_format: Stitch output format
* @stitch_input_format: Stitch input format
* @stitch_decompress: Stitch decompress configuration
* @stitch: Stitch configuration
* @lsc: Lens Shading Correction configuration
* @wbg: White Balance Gain configuration
* @cdn: Colour Denoise configuration
* @cac: Colour Aberration Correction configuration
* @debin: Debinning configuration
* @tonemap: Tonemapping configuration
* @demosaic: Demosaicing configuration
* @ccm: Colour Correction Matrix configuration
* @sat_control: Saturation Control configuration
* @ycbcr: YCbCr colour correction configuration
* @sharpen: Sharpening configuration
* @false_colour: False colour correction
* @sh_fc_combine: Sharpening and False Colour correction
* @ycbcr_inverse: Inverse YCbCr colour correction
* @gamma: Gamma curve configuration
* @csc: Color Space Conversion configuration
* @downscale: Downscale configuration
* @resample: Resampling configuration
* @output_format: Output format configuration
* @hog: HOG configuration
* @axi: AXI bus configuration
* @lsc_extra: LSC extra info
* @cac_extra: CAC extra info
* @downscale_extra: Downscaler extra info
* @resample_extra: Resample extra info
* @crop: Crop configuration
* @hog_format: HOG format info
* @dirty_flags_bayer: Bayer enable dirty flags
* (:c:type:`pisp_be_bayer_enable`)
* @dirty_flags_rgb: RGB enable dirty flags
* (:c:type:`pisp_be_rgb_enable`)
* @dirty_flags_extra: Extra dirty flags
*/
struct pisp_be_config {
/* I/O configuration: */
struct pisp_be_input_buffer_config input_buffer;
struct pisp_be_tdn_input_buffer_config tdn_input_buffer;
struct pisp_be_stitch_input_buffer_config stitch_input_buffer;
struct pisp_be_tdn_output_buffer_config tdn_output_buffer;
struct pisp_be_stitch_output_buffer_config stitch_output_buffer;
struct pisp_be_output_buffer_config
output_buffer[PISP_BACK_END_NUM_OUTPUTS];
struct pisp_be_hog_buffer_config hog_buffer;
/* Processing configuration: */
struct pisp_be_global_config global;
struct pisp_image_format_config input_format;
struct pisp_decompress_config decompress;
struct pisp_be_dpc_config dpc;
struct pisp_be_geq_config geq;
struct pisp_image_format_config tdn_input_format;
struct pisp_decompress_config tdn_decompress;
struct pisp_be_tdn_config tdn;
struct pisp_compress_config tdn_compress;
struct pisp_image_format_config tdn_output_format;
struct pisp_be_sdn_config sdn;
struct pisp_bla_config blc;
struct pisp_compress_config stitch_compress;
struct pisp_image_format_config stitch_output_format;
struct pisp_image_format_config stitch_input_format;
struct pisp_decompress_config stitch_decompress;
struct pisp_be_stitch_config stitch;
struct pisp_be_lsc_config lsc;
struct pisp_wbg_config wbg;
struct pisp_be_cdn_config cdn;
struct pisp_be_cac_config cac;
struct pisp_be_debin_config debin;
struct pisp_be_tonemap_config tonemap;
struct pisp_be_demosaic_config demosaic;
struct pisp_be_ccm_config ccm;
struct pisp_be_sat_control_config sat_control;
struct pisp_be_ccm_config ycbcr;
struct pisp_be_sharpen_config sharpen;
struct pisp_be_false_colour_config false_colour;
struct pisp_be_sh_fc_combine_config sh_fc_combine;
struct pisp_be_ccm_config ycbcr_inverse;
struct pisp_be_gamma_config gamma;
struct pisp_be_ccm_config csc[PISP_BACK_END_NUM_OUTPUTS];
struct pisp_be_downscale_config downscale[PISP_BACK_END_NUM_OUTPUTS];
struct pisp_be_resample_config resample[PISP_BACK_END_NUM_OUTPUTS];
struct pisp_be_output_format_config
output_format[PISP_BACK_END_NUM_OUTPUTS];
struct pisp_be_hog_config hog;
struct pisp_be_axi_config axi;
/* Non-register fields: */
struct pisp_be_lsc_extra lsc_extra;
struct pisp_be_cac_extra cac_extra;
struct pisp_be_downscale_extra
downscale_extra[PISP_BACK_END_NUM_OUTPUTS];
struct pisp_be_resample_extra resample_extra[PISP_BACK_END_NUM_OUTPUTS];
struct pisp_be_crop_config crop;
struct pisp_image_format_config hog_format;
__u32 dirty_flags_bayer; /* these use pisp_be_bayer_enable */
__u32 dirty_flags_rgb; /* use pisp_be_rgb_enable */
__u32 dirty_flags_extra; /* these use pisp_be_dirty_t */
} __attribute__((packed));
/**
* enum pisp_tile_edge - PiSP Back End Tile position
* @PISP_LEFT_EDGE: Left edge tile
* @PISP_RIGHT_EDGE: Right edge tile
* @PISP_TOP_EDGE: Top edge tile
* @PISP_BOTTOM_EDGE: Bottom edge tile
*/
enum pisp_tile_edge {
PISP_LEFT_EDGE = (1 << 0),
PISP_RIGHT_EDGE = (1 << 1),
PISP_TOP_EDGE = (1 << 2),
PISP_BOTTOM_EDGE = (1 << 3)
};
/**
* struct pisp_tile - Raspberry Pi PiSP Back End tile configuration
*
* Tile parameters: each set of tile parameters is a 160-bytes block of data
* which contains the tile processing parameters.
*
* @edge: Edge tile flag
* @pad0: Padding bytes
* @input_addr_offset: Top-left pixel offset, in bytes
* @input_addr_offset2: Top-left pixel offset, in bytes for the second/
* third image planes
* @input_offset_x: Horizontal offset in pixels of this tile in the
* input image
* @input_offset_y: Vertical offset in pixels of this tile in the
* input image
* @input_width: Width in pixels of this tile
* @input_height: Height in pixels of the this tile
* @tdn_input_addr_offset: TDN input image offset, in bytes
* @tdn_output_addr_offset: TDN output image offset, in bytes
* @stitch_input_addr_offset: Stitch input image offset, in bytes
* @stitch_output_addr_offset: Stitch output image offset, in bytes
* @lsc_grid_offset_x: Horizontal offset in the LSC table for this tile
* @lsc_grid_offset_y: Vertical offset in the LSC table for this tile
* @cac_grid_offset_x: Horizontal offset in the CAC table for this tile
* @cac_grid_offset_y: Horizontal offset in the CAC table for this tile
* @crop_x_start: Number of pixels cropped from the left of the
* tile
* @crop_x_end: Number of pixels cropped from the right of the
* tile
* @crop_y_start: Number of pixels cropped from the top of the
* tile
* @crop_y_end: Number of pixels cropped from the bottom of the
* tile
* @downscale_phase_x: Initial horizontal phase in pixels
* @downscale_phase_y: Initial vertical phase in pixels
* @resample_in_width: Width in pixels of the tile entering the
* Resample block
* @resample_in_height: Height in pixels of the tile entering the
* Resample block
* @resample_phase_x: Initial horizontal phase for the Resample block
* @resample_phase_y: Initial vertical phase for the Resample block
* @output_offset_x: Horizontal offset in pixels where the tile will
* be written into the output image
* @output_offset_y: Vertical offset in pixels where the tile will be
* written into the output image
* @output_width: Width in pixels in the output image of this tile
* @output_height: Height in pixels in the output image of this tile
* @output_addr_offset: Offset in bytes into the output buffer
* @output_addr_offset2: Offset in bytes into the output buffer for the
* second and third plane
* @output_hog_addr_offset: Offset in bytes into the HOG buffer where
* results of this tile are to be written
*/
struct pisp_tile {
__u8 edge; /* enum pisp_tile_edge */
__u8 pad0[3];
/* 4 bytes */
__u32 input_addr_offset;
__u32 input_addr_offset2;
__u16 input_offset_x;
__u16 input_offset_y;
__u16 input_width;
__u16 input_height;
/* 20 bytes */
__u32 tdn_input_addr_offset;
__u32 tdn_output_addr_offset;
__u32 stitch_input_addr_offset;
__u32 stitch_output_addr_offset;
/* 36 bytes */
__u32 lsc_grid_offset_x;
__u32 lsc_grid_offset_y;
/* 44 bytes */
__u32 cac_grid_offset_x;
__u32 cac_grid_offset_y;
/* 52 bytes */
__u16 crop_x_start[PISP_BACK_END_NUM_OUTPUTS];
__u16 crop_x_end[PISP_BACK_END_NUM_OUTPUTS];
__u16 crop_y_start[PISP_BACK_END_NUM_OUTPUTS];
__u16 crop_y_end[PISP_BACK_END_NUM_OUTPUTS];
/* 68 bytes */
/* Ordering is planes then branches */
__u16 downscale_phase_x[3 * PISP_BACK_END_NUM_OUTPUTS];
__u16 downscale_phase_y[3 * PISP_BACK_END_NUM_OUTPUTS];
/* 92 bytes */
__u16 resample_in_width[PISP_BACK_END_NUM_OUTPUTS];
__u16 resample_in_height[PISP_BACK_END_NUM_OUTPUTS];
/* 100 bytes */
/* Ordering is planes then branches */
__u16 resample_phase_x[3 * PISP_BACK_END_NUM_OUTPUTS];
__u16 resample_phase_y[3 * PISP_BACK_END_NUM_OUTPUTS];
/* 124 bytes */
__u16 output_offset_x[PISP_BACK_END_NUM_OUTPUTS];
__u16 output_offset_y[PISP_BACK_END_NUM_OUTPUTS];
__u16 output_width[PISP_BACK_END_NUM_OUTPUTS];
__u16 output_height[PISP_BACK_END_NUM_OUTPUTS];
/* 140 bytes */
__u32 output_addr_offset[PISP_BACK_END_NUM_OUTPUTS];
__u32 output_addr_offset2[PISP_BACK_END_NUM_OUTPUTS];
/* 156 bytes */
__u32 output_hog_addr_offset;
/* 160 bytes */
} __attribute__((packed));
/**
* struct pisp_be_tiles_config - Raspberry Pi PiSP Back End configuration
* @tiles: Tile descriptors
* @num_tiles: Number of tiles
* @config: PiSP Back End configuration
*/
struct pisp_be_tiles_config {
struct pisp_be_config config;
struct pisp_tile tiles[PISP_BACK_END_NUM_TILES];
__u32 num_tiles;
} __attribute__((packed));
#endif /* _PISP_BE_CONFIG_H_ */

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@ -0,0 +1,202 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* RP1 PiSP common definitions.
*
* Copyright (C) 2021 - Raspberry Pi Ltd.
*
*/
#ifndef _PISP_COMMON_H_
#define _PISP_COMMON_H_
#include <linux/types.h>
struct pisp_image_format_config {
/* size in pixels */
__u16 width;
__u16 height;
/* must match struct pisp_image_format below */
__u32 format;
__s32 stride;
/* some planar image formats will need a second stride */
__s32 stride2;
} __attribute__((packed));
enum pisp_bayer_order {
/*
* Note how bayer_order&1 tells you if G is on the even pixels of the
* checkerboard or not, and bayer_order&2 tells you if R is on the even
* rows or is swapped with B. Note that if the top (of the 8) bits is
* set, this denotes a monochrome or greyscale image, and the lower bits
* should all be ignored.
*/
PISP_BAYER_ORDER_RGGB = 0,
PISP_BAYER_ORDER_GBRG = 1,
PISP_BAYER_ORDER_BGGR = 2,
PISP_BAYER_ORDER_GRBG = 3,
PISP_BAYER_ORDER_GREYSCALE = 128
};
enum pisp_image_format {
/*
* Precise values are mostly tbd. Generally these will be portmanteau
* values comprising bit fields and flags. This format must be shared
* throughout the PiSP.
*/
PISP_IMAGE_FORMAT_BPS_8 = 0x00000000,
PISP_IMAGE_FORMAT_BPS_10 = 0x00000001,
PISP_IMAGE_FORMAT_BPS_12 = 0x00000002,
PISP_IMAGE_FORMAT_BPS_16 = 0x00000003,
PISP_IMAGE_FORMAT_BPS_MASK = 0x00000003,
PISP_IMAGE_FORMAT_PLANARITY_INTERLEAVED = 0x00000000,
PISP_IMAGE_FORMAT_PLANARITY_SEMI_PLANAR = 0x00000010,
PISP_IMAGE_FORMAT_PLANARITY_PLANAR = 0x00000020,
PISP_IMAGE_FORMAT_PLANARITY_MASK = 0x00000030,
PISP_IMAGE_FORMAT_SAMPLING_444 = 0x00000000,
PISP_IMAGE_FORMAT_SAMPLING_422 = 0x00000100,
PISP_IMAGE_FORMAT_SAMPLING_420 = 0x00000200,
PISP_IMAGE_FORMAT_SAMPLING_MASK = 0x00000300,
PISP_IMAGE_FORMAT_ORDER_NORMAL = 0x00000000,
PISP_IMAGE_FORMAT_ORDER_SWAPPED = 0x00001000,
PISP_IMAGE_FORMAT_SHIFT_0 = 0x00000000,
PISP_IMAGE_FORMAT_SHIFT_1 = 0x00010000,
PISP_IMAGE_FORMAT_SHIFT_2 = 0x00020000,
PISP_IMAGE_FORMAT_SHIFT_3 = 0x00030000,
PISP_IMAGE_FORMAT_SHIFT_4 = 0x00040000,
PISP_IMAGE_FORMAT_SHIFT_5 = 0x00050000,
PISP_IMAGE_FORMAT_SHIFT_6 = 0x00060000,
PISP_IMAGE_FORMAT_SHIFT_7 = 0x00070000,
PISP_IMAGE_FORMAT_SHIFT_8 = 0x00080000,
PISP_IMAGE_FORMAT_SHIFT_MASK = 0x000f0000,
PISP_IMAGE_FORMAT_BPP_32 = 0x00100000,
PISP_IMAGE_FORMAT_UNCOMPRESSED = 0x00000000,
PISP_IMAGE_FORMAT_COMPRESSION_MODE_1 = 0x01000000,
PISP_IMAGE_FORMAT_COMPRESSION_MODE_2 = 0x02000000,
PISP_IMAGE_FORMAT_COMPRESSION_MODE_3 = 0x03000000,
PISP_IMAGE_FORMAT_COMPRESSION_MASK = 0x03000000,
PISP_IMAGE_FORMAT_HOG_SIGNED = 0x04000000,
PISP_IMAGE_FORMAT_HOG_UNSIGNED = 0x08000000,
PISP_IMAGE_FORMAT_INTEGRAL_IMAGE = 0x10000000,
PISP_IMAGE_FORMAT_WALLPAPER_ROLL = 0x20000000,
PISP_IMAGE_FORMAT_THREE_CHANNEL = 0x40000000,
/* Lastly a few specific instantiations of the above. */
PISP_IMAGE_FORMAT_SINGLE_16 = PISP_IMAGE_FORMAT_BPS_16,
PISP_IMAGE_FORMAT_THREE_16 = PISP_IMAGE_FORMAT_BPS_16 |
PISP_IMAGE_FORMAT_THREE_CHANNEL
};
#define PISP_IMAGE_FORMAT_BPS_8(fmt) \
(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) == PISP_IMAGE_FORMAT_BPS_8)
#define PISP_IMAGE_FORMAT_BPS_10(fmt) \
(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) == PISP_IMAGE_FORMAT_BPS_10)
#define PISP_IMAGE_FORMAT_BPS_12(fmt) \
(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) == PISP_IMAGE_FORMAT_BPS_12)
#define PISP_IMAGE_FORMAT_BPS_16(fmt) \
(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) == PISP_IMAGE_FORMAT_BPS_16)
#define PISP_IMAGE_FORMAT_BPS(fmt) \
(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) ? \
8 + (2 << (((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) - 1)) : 8)
#define PISP_IMAGE_FORMAT_SHIFT(fmt) \
(((fmt) & PISP_IMAGE_FORMAT_SHIFT_MASK) / PISP_IMAGE_FORMAT_SHIFT_1)
#define PISP_IMAGE_FORMAT_THREE_CHANNEL(fmt) \
((fmt) & PISP_IMAGE_FORMAT_THREE_CHANNEL)
#define PISP_IMAGE_FORMAT_SINGLE_CHANNEL(fmt) \
(!((fmt) & PISP_IMAGE_FORMAT_THREE_CHANNEL))
#define PISP_IMAGE_FORMAT_COMPRESSED(fmt) \
(((fmt) & PISP_IMAGE_FORMAT_COMPRESSION_MASK) != \
PISP_IMAGE_FORMAT_UNCOMPRESSED)
#define PISP_IMAGE_FORMAT_SAMPLING_444(fmt) \
(((fmt) & PISP_IMAGE_FORMAT_SAMPLING_MASK) == \
PISP_IMAGE_FORMAT_SAMPLING_444)
#define PISP_IMAGE_FORMAT_SAMPLING_422(fmt) \
(((fmt) & PISP_IMAGE_FORMAT_SAMPLING_MASK) == \
PISP_IMAGE_FORMAT_SAMPLING_422)
#define PISP_IMAGE_FORMAT_SAMPLING_420(fmt) \
(((fmt) & PISP_IMAGE_FORMAT_SAMPLING_MASK) == \
PISP_IMAGE_FORMAT_SAMPLING_420)
#define PISP_IMAGE_FORMAT_ORDER_NORMAL(fmt) \
(!((fmt) & PISP_IMAGE_FORMAT_ORDER_SWAPPED))
#define PISP_IMAGE_FORMAT_ORDER_SWAPPED(fmt) \
((fmt) & PISP_IMAGE_FORMAT_ORDER_SWAPPED)
#define PISP_IMAGE_FORMAT_INTERLEAVED(fmt) \
(((fmt) & PISP_IMAGE_FORMAT_PLANARITY_MASK) == \
PISP_IMAGE_FORMAT_PLANARITY_INTERLEAVED)
#define PISP_IMAGE_FORMAT_SEMIPLANAR(fmt) \
(((fmt) & PISP_IMAGE_FORMAT_PLANARITY_MASK) == \
PISP_IMAGE_FORMAT_PLANARITY_SEMI_PLANAR)
#define PISP_IMAGE_FORMAT_PLANAR(fmt) \
(((fmt) & PISP_IMAGE_FORMAT_PLANARITY_MASK) == \
PISP_IMAGE_FORMAT_PLANARITY_PLANAR)
#define PISP_IMAGE_FORMAT_WALLPAPER(fmt) \
((fmt) & PISP_IMAGE_FORMAT_WALLPAPER_ROLL)
#define PISP_IMAGE_FORMAT_BPP_32(fmt) ((fmt) & PISP_IMAGE_FORMAT_BPP_32)
#define PISP_IMAGE_FORMAT_HOG(fmt) \
((fmt) & \
(PISP_IMAGE_FORMAT_HOG_SIGNED | PISP_IMAGE_FORMAT_HOG_UNSIGNED))
#define PISP_WALLPAPER_WIDTH 128 /* in bytes */
struct pisp_bla_config {
__u16 black_level_r;
__u16 black_level_gr;
__u16 black_level_gb;
__u16 black_level_b;
__u16 output_black_level;
__u8 pad[2];
} __attribute__((packed));
struct pisp_wbg_config {
__u16 gain_r;
__u16 gain_g;
__u16 gain_b;
__u8 pad[2];
} __attribute__((packed));
struct pisp_compress_config {
/* value subtracted from incoming data */
__u16 offset;
__u8 pad;
/* 1 => Companding; 2 => Delta (recommended); 3 => Combined (for HDR) */
__u8 mode;
} __attribute__((packed));
struct pisp_decompress_config {
/* value added to reconstructed data */
__u16 offset;
__u8 pad;
/* 1 => Companding; 2 => Delta (recommended); 3 => Combined (for HDR) */
__u8 mode;
} __attribute__((packed));
enum pisp_axi_flags {
/*
* round down bursts to end at a 32-byte boundary, to align following
* bursts
*/
PISP_AXI_FLAG_ALIGN = 128,
/* for FE writer: force WSTRB high, to pad output to 16-byte boundary */
PISP_AXI_FLAG_PAD = 64,
/* for FE writer: Use Output FIFO level to trigger "panic" */
PISP_AXI_FLAG_PANIC = 32,
};
struct pisp_axi_config {
/*
* burst length minus one, which must be in the range 0:15; OR'd with
* flags
*/
__u8 maxlen_flags;
/* { prot[2:0], cache[3:0] } fields, echoed on AXI bus */
__u8 cache_prot;
/* QoS field(s) (4x4 bits for FE writer; 4 bits for other masters) */
__u16 qos;
} __attribute__((packed));
#endif /* _PISP_COMMON_H_ */

View File

@ -0,0 +1,273 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* RP1 PiSP Front End Driver Configuration structures
*
* Copyright (C) 2021 - Raspberry Pi Ltd.
*
*/
#ifndef _PISP_FE_CONFIG_
#define _PISP_FE_CONFIG_
#include <linux/types.h>
#include "pisp_common.h"
#include "pisp_fe_statistics.h"
#define PISP_FE_NUM_OUTPUTS 2
enum pisp_fe_enable {
PISP_FE_ENABLE_INPUT = 0x000001,
PISP_FE_ENABLE_DECOMPRESS = 0x000002,
PISP_FE_ENABLE_DECOMPAND = 0x000004,
PISP_FE_ENABLE_BLA = 0x000008,
PISP_FE_ENABLE_DPC = 0x000010,
PISP_FE_ENABLE_STATS_CROP = 0x000020,
PISP_FE_ENABLE_DECIMATE = 0x000040,
PISP_FE_ENABLE_BLC = 0x000080,
PISP_FE_ENABLE_CDAF_STATS = 0x000100,
PISP_FE_ENABLE_AWB_STATS = 0x000200,
PISP_FE_ENABLE_RGBY = 0x000400,
PISP_FE_ENABLE_LSC = 0x000800,
PISP_FE_ENABLE_AGC_STATS = 0x001000,
PISP_FE_ENABLE_CROP0 = 0x010000,
PISP_FE_ENABLE_DOWNSCALE0 = 0x020000,
PISP_FE_ENABLE_COMPRESS0 = 0x040000,
PISP_FE_ENABLE_OUTPUT0 = 0x080000,
PISP_FE_ENABLE_CROP1 = 0x100000,
PISP_FE_ENABLE_DOWNSCALE1 = 0x200000,
PISP_FE_ENABLE_COMPRESS1 = 0x400000,
PISP_FE_ENABLE_OUTPUT1 = 0x800000
};
#define PISP_FE_ENABLE_CROP(i) (PISP_FE_ENABLE_CROP0 << (4 * (i)))
#define PISP_FE_ENABLE_DOWNSCALE(i) (PISP_FE_ENABLE_DOWNSCALE0 << (4 * (i)))
#define PISP_FE_ENABLE_COMPRESS(i) (PISP_FE_ENABLE_COMPRESS0 << (4 * (i)))
#define PISP_FE_ENABLE_OUTPUT(i) (PISP_FE_ENABLE_OUTPUT0 << (4 * (i)))
/*
* We use the enable flags to show when blocks are "dirty", but we need some
* extra ones too.
*/
enum pisp_fe_dirty {
PISP_FE_DIRTY_GLOBAL = 0x0001,
PISP_FE_DIRTY_FLOATING = 0x0002,
PISP_FE_DIRTY_OUTPUT_AXI = 0x0004
};
struct pisp_fe_global_config {
__u32 enables;
__u8 bayer_order;
__u8 pad[3];
} __attribute__((packed));
struct pisp_fe_input_axi_config {
/* burst length minus one, in the range 0..15; OR'd with flags */
__u8 maxlen_flags;
/* { prot[2:0], cache[3:0] } fields */
__u8 cache_prot;
/* QoS (only 4 LS bits are used) */
__u16 qos;
} __attribute__((packed));
struct pisp_fe_output_axi_config {
/* burst length minus one, in the range 0..15; OR'd with flags */
__u8 maxlen_flags;
/* { prot[2:0], cache[3:0] } fields */
__u8 cache_prot;
/* QoS (4 bitfields of 4 bits each for different panic levels) */
__u16 qos;
/* For Panic mode: Output FIFO panic threshold */
__u16 thresh;
/* For Panic mode: Output FIFO statistics throttle threshold */
__u16 throttle;
} __attribute__((packed));
struct pisp_fe_input_config {
__u8 streaming;
__u8 pad[3];
struct pisp_image_format_config format;
struct pisp_fe_input_axi_config axi;
/* Extra cycles delay before issuing each burst request */
__u8 holdoff;
__u8 pad2[3];
} __attribute__((packed));
struct pisp_fe_output_config {
struct pisp_image_format_config format;
__u16 ilines;
__u8 pad[2];
} __attribute__((packed));
struct pisp_fe_input_buffer_config {
__u32 addr_lo;
__u32 addr_hi;
__u16 frame_id;
__u16 pad;
} __attribute__((packed));
#define PISP_FE_DECOMPAND_LUT_SIZE 65
struct pisp_fe_decompand_config {
__u16 lut[PISP_FE_DECOMPAND_LUT_SIZE];
__u16 pad;
} __attribute__((packed));
struct pisp_fe_dpc_config {
__u8 coeff_level;
__u8 coeff_range;
__u8 coeff_range2;
#define PISP_FE_DPC_FLAG_FOLDBACK 1
#define PISP_FE_DPC_FLAG_VFLAG 2
__u8 flags;
} __attribute__((packed));
#define PISP_FE_LSC_LUT_SIZE 16
struct pisp_fe_lsc_config {
__u8 shift;
__u8 pad0;
__u16 scale;
__u16 centre_x;
__u16 centre_y;
__u16 lut[PISP_FE_LSC_LUT_SIZE];
} __attribute__((packed));
struct pisp_fe_rgby_config {
__u16 gain_r;
__u16 gain_g;
__u16 gain_b;
__u8 maxflag;
__u8 pad;
} __attribute__((packed));
struct pisp_fe_agc_stats_config {
__u16 offset_x;
__u16 offset_y;
__u16 size_x;
__u16 size_y;
/* each weight only 4 bits */
__u8 weights[PISP_AGC_STATS_NUM_ZONES / 2];
__u16 row_offset_x;
__u16 row_offset_y;
__u16 row_size_x;
__u16 row_size_y;
__u8 row_shift;
__u8 float_shift;
__u8 pad1[2];
} __attribute__((packed));
struct pisp_fe_awb_stats_config {
__u16 offset_x;
__u16 offset_y;
__u16 size_x;
__u16 size_y;
__u8 shift;
__u8 pad[3];
__u16 r_lo;
__u16 r_hi;
__u16 g_lo;
__u16 g_hi;
__u16 b_lo;
__u16 b_hi;
} __attribute__((packed));
struct pisp_fe_floating_stats_region {
__u16 offset_x;
__u16 offset_y;
__u16 size_x;
__u16 size_y;
} __attribute__((packed));
struct pisp_fe_floating_stats_config {
struct pisp_fe_floating_stats_region
regions[PISP_FLOATING_STATS_NUM_ZONES];
} __attribute__((packed));
#define PISP_FE_CDAF_NUM_WEIGHTS 8
struct pisp_fe_cdaf_stats_config {
__u16 noise_constant;
__u16 noise_slope;
__u16 offset_x;
__u16 offset_y;
__u16 size_x;
__u16 size_y;
__u16 skip_x;
__u16 skip_y;
__u32 mode;
} __attribute__((packed));
struct pisp_fe_stats_buffer_config {
__u32 addr_lo;
__u32 addr_hi;
} __attribute__((packed));
struct pisp_fe_crop_config {
__u16 offset_x;
__u16 offset_y;
__u16 width;
__u16 height;
} __attribute__((packed));
enum pisp_fe_downscale_flags {
/* downscale the four Bayer components independently... */
DOWNSCALE_BAYER = 1,
/* ...without trying to preserve their spatial relationship */
DOWNSCALE_BIN = 2,
};
struct pisp_fe_downscale_config {
__u8 xin;
__u8 xout;
__u8 yin;
__u8 yout;
__u8 flags; /* enum pisp_fe_downscale_flags */
__u8 pad[3];
__u16 output_width;
__u16 output_height;
} __attribute__((packed));
struct pisp_fe_output_buffer_config {
__u32 addr_lo;
__u32 addr_hi;
} __attribute__((packed));
/* Each of the two output channels/branches: */
struct pisp_fe_output_branch_config {
struct pisp_fe_crop_config crop;
struct pisp_fe_downscale_config downscale;
struct pisp_compress_config compress;
struct pisp_fe_output_config output;
__u32 pad;
} __attribute__((packed));
/* And finally one to rule them all: */
struct pisp_fe_config {
/* I/O configuration: */
struct pisp_fe_stats_buffer_config stats_buffer;
struct pisp_fe_output_buffer_config output_buffer[PISP_FE_NUM_OUTPUTS];
struct pisp_fe_input_buffer_config input_buffer;
/* processing configuration: */
struct pisp_fe_global_config global;
struct pisp_fe_input_config input;
struct pisp_decompress_config decompress;
struct pisp_fe_decompand_config decompand;
struct pisp_bla_config bla;
struct pisp_fe_dpc_config dpc;
struct pisp_fe_crop_config stats_crop;
__u32 spare1; /* placeholder for future decimate configuration */
struct pisp_bla_config blc;
struct pisp_fe_rgby_config rgby;
struct pisp_fe_lsc_config lsc;
struct pisp_fe_agc_stats_config agc_stats;
struct pisp_fe_awb_stats_config awb_stats;
struct pisp_fe_cdaf_stats_config cdaf_stats;
struct pisp_fe_floating_stats_config floating_stats;
struct pisp_fe_output_axi_config output_axi;
struct pisp_fe_output_branch_config ch[PISP_FE_NUM_OUTPUTS];
/* non-register fields: */
__u32 dirty_flags; /* these use pisp_fe_enable */
__u32 dirty_flags_extra; /* these use pisp_fe_dirty */
} __attribute__((packed));
#endif /* _PISP_FE_CONFIG_ */

View File

@ -0,0 +1,64 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* RP1 PiSP Front End statistics definitions
*
* Copyright (C) 2021 - Raspberry Pi Ltd.
*
*/
#ifndef _PISP_FE_STATISTICS_H_
#define _PISP_FE_STATISTICS_H_
#include <linux/types.h>
#define PISP_FLOATING_STATS_NUM_ZONES 4
#define PISP_AGC_STATS_NUM_BINS 1024
#define PISP_AGC_STATS_SIZE 16
#define PISP_AGC_STATS_NUM_ZONES (PISP_AGC_STATS_SIZE * PISP_AGC_STATS_SIZE)
#define PISP_AGC_STATS_NUM_ROW_SUMS 512
struct pisp_agc_statistics_zone {
__u64 Y_sum;
__u32 counted;
__u32 pad;
} __attribute__((packed));
struct pisp_agc_statistics {
__u32 row_sums[PISP_AGC_STATS_NUM_ROW_SUMS];
/*
* 32-bits per bin means an image (just less than) 16384x16384 pixels
* in size can weight every pixel from 0 to 15.
*/
__u32 histogram[PISP_AGC_STATS_NUM_BINS];
struct pisp_agc_statistics_zone floating[PISP_FLOATING_STATS_NUM_ZONES];
} __attribute__((packed));
#define PISP_AWB_STATS_SIZE 32
#define PISP_AWB_STATS_NUM_ZONES (PISP_AWB_STATS_SIZE * PISP_AWB_STATS_SIZE)
struct pisp_awb_statistics_zone {
__u32 R_sum;
__u32 G_sum;
__u32 B_sum;
__u32 counted;
} __attribute__((packed));
struct pisp_awb_statistics {
struct pisp_awb_statistics_zone zones[PISP_AWB_STATS_NUM_ZONES];
struct pisp_awb_statistics_zone floating[PISP_FLOATING_STATS_NUM_ZONES];
} __attribute__((packed));
#define PISP_CDAF_STATS_SIZE 8
#define PISP_CDAF_STATS_NUM_FOMS (PISP_CDAF_STATS_SIZE * PISP_CDAF_STATS_SIZE)
struct pisp_cdaf_statistics {
__u64 foms[PISP_CDAF_STATS_NUM_FOMS];
__u64 floating[PISP_FLOATING_STATS_NUM_ZONES];
} __attribute__((packed));
struct pisp_statistics {
struct pisp_awb_statistics awb;
struct pisp_agc_statistics agc;
struct pisp_cdaf_statistics cdaf;
} __attribute__((packed));
#endif /* _PISP_FE_STATISTICS_H_ */

View File

@ -17,6 +17,7 @@
#define MAP_SHARED 0x01 /* Share changes */
#define MAP_PRIVATE 0x02 /* Changes are private */
#define MAP_SHARED_VALIDATE 0x03 /* share + validate extension flags */
#define MAP_DROPPABLE 0x08 /* Zero memory under memory pressure. */
/*
* Huge page size encoding when MAP_HUGETLB is specified, and a huge page

View File

@ -154,7 +154,7 @@ struct mount_attr {
*/
struct statmount {
__u32 size; /* Total size, including strings */
__u32 __spare1;
__u32 mnt_opts; /* [str] Options (comma separated, escaped) */
__u64 mask; /* What results were written */
__u32 sb_dev_major; /* Device ID */
__u32 sb_dev_minor;
@ -172,7 +172,14 @@ struct statmount {
__u64 propagate_from; /* Propagation from in current namespace */
__u32 mnt_root; /* [str] Root of mount relative to root of fs */
__u32 mnt_point; /* [str] Mountpoint relative to current root */
__u64 __spare2[50];
__u64 mnt_ns_id; /* ID of the mount namespace */
__u32 fs_subtype; /* [str] Subtype of fs_type (if any) */
__u32 sb_source; /* [str] Source string of the mount */
__u32 opt_num; /* Number of fs options */
__u32 opt_array; /* [str] Array of nul terminated fs options */
__u32 opt_sec_num; /* Number of security options */
__u32 opt_sec_array; /* [str] Array of nul terminated security options */
__u64 __spare2[46];
char str[]; /* Variable size part containing strings */
};
@ -188,10 +195,12 @@ struct mnt_id_req {
__u32 spare;
__u64 mnt_id;
__u64 param;
__u64 mnt_ns_id;
};
/* List of all mnt_id_req versions. */
#define MNT_ID_REQ_SIZE_VER0 24 /* sizeof first published struct */
#define MNT_ID_REQ_SIZE_VER1 32 /* sizeof second published struct */
/*
* @mask bits for statmount(2)
@ -202,10 +211,17 @@ struct mnt_id_req {
#define STATMOUNT_MNT_ROOT 0x00000008U /* Want/got mnt_root */
#define STATMOUNT_MNT_POINT 0x00000010U /* Want/got mnt_point */
#define STATMOUNT_FS_TYPE 0x00000020U /* Want/got fs_type */
#define STATMOUNT_MNT_NS_ID 0x00000040U /* Want/got mnt_ns_id */
#define STATMOUNT_MNT_OPTS 0x00000080U /* Want/got mnt_opts */
#define STATMOUNT_FS_SUBTYPE 0x00000100U /* Want/got fs_subtype */
#define STATMOUNT_SB_SOURCE 0x00000200U /* Want/got sb_source */
#define STATMOUNT_OPT_ARRAY 0x00000400U /* Want/got opt_... */
#define STATMOUNT_OPT_SEC_ARRAY 0x00000800U /* Want/got opt_sec... */
/*
* Special @mnt_id values that can be passed to listmount
*/
#define LSMT_ROOT 0xffffffffffffffff /* root mount */
#define LISTMOUNT_REVERSE (1 << 0) /* List later mounts first */
#endif /* _LINUX_MOUNT_H */

View File

@ -12,31 +12,33 @@
/**
* enum mptcp_event_type
* @MPTCP_EVENT_UNSPEC: unused event
* @MPTCP_EVENT_CREATED: token, family, saddr4 | saddr6, daddr4 | daddr6,
* sport, dport A new MPTCP connection has been created. It is the good time
* to allocate memory and send ADD_ADDR if needed. Depending on the
* @MPTCP_EVENT_CREATED: A new MPTCP connection has been created. It is the
* good time to allocate memory and send ADD_ADDR if needed. Depending on the
* traffic-patterns it can take a long time until the MPTCP_EVENT_ESTABLISHED
* is sent.
* @MPTCP_EVENT_ESTABLISHED: token, family, saddr4 | saddr6, daddr4 | daddr6,
* sport, dport A MPTCP connection is established (can start new subflows).
* @MPTCP_EVENT_CLOSED: token A MPTCP connection has stopped.
* @MPTCP_EVENT_ANNOUNCED: token, rem_id, family, daddr4 | daddr6 [, dport] A
* new address has been announced by the peer.
* @MPTCP_EVENT_REMOVED: token, rem_id An address has been lost by the peer.
* @MPTCP_EVENT_SUB_ESTABLISHED: token, family, loc_id, rem_id, saddr4 |
* saddr6, daddr4 | daddr6, sport, dport, backup, if_idx [, error] A new
* subflow has been established. 'error' should not be set.
* @MPTCP_EVENT_SUB_CLOSED: token, family, loc_id, rem_id, saddr4 | saddr6,
* daddr4 | daddr6, sport, dport, backup, if_idx [, error] A subflow has been
* closed. An error (copy of sk_err) could be set if an error has been
* detected for this subflow.
* @MPTCP_EVENT_SUB_PRIORITY: token, family, loc_id, rem_id, saddr4 | saddr6,
* daddr4 | daddr6, sport, dport, backup, if_idx [, error] The priority of a
* subflow has changed. 'error' should not be set.
* @MPTCP_EVENT_LISTENER_CREATED: family, sport, saddr4 | saddr6 A new PM
* listener is created.
* @MPTCP_EVENT_LISTENER_CLOSED: family, sport, saddr4 | saddr6 A PM listener
* is closed.
* is sent. Attributes: token, family, saddr4 | saddr6, daddr4 | daddr6,
* sport, dport, server-side.
* @MPTCP_EVENT_ESTABLISHED: A MPTCP connection is established (can start new
* subflows). Attributes: token, family, saddr4 | saddr6, daddr4 | daddr6,
* sport, dport, server-side.
* @MPTCP_EVENT_CLOSED: A MPTCP connection has stopped. Attribute: token.
* @MPTCP_EVENT_ANNOUNCED: A new address has been announced by the peer.
* Attributes: token, rem_id, family, daddr4 | daddr6 [, dport].
* @MPTCP_EVENT_REMOVED: An address has been lost by the peer. Attributes:
* token, rem_id.
* @MPTCP_EVENT_SUB_ESTABLISHED: A new subflow has been established. 'error'
* should not be set. Attributes: token, family, loc_id, rem_id, saddr4 |
* saddr6, daddr4 | daddr6, sport, dport, backup, if_idx [, error].
* @MPTCP_EVENT_SUB_CLOSED: A subflow has been closed. An error (copy of
* sk_err) could be set if an error has been detected for this subflow.
* Attributes: token, family, loc_id, rem_id, saddr4 | saddr6, daddr4 |
* daddr6, sport, dport, backup, if_idx [, error].
* @MPTCP_EVENT_SUB_PRIORITY: The priority of a subflow has changed. 'error'
* should not be set. Attributes: token, family, loc_id, rem_id, saddr4 |
* saddr6, daddr4 | daddr6, sport, dport, backup, if_idx [, error].
* @MPTCP_EVENT_LISTENER_CREATED: A new PM listener is created. Attributes:
* family, sport, saddr4 | saddr6.
* @MPTCP_EVENT_LISTENER_CLOSED: A PM listener is closed. Attributes: family,
* sport, saddr4 | saddr6.
*/
enum mptcp_event_type {
MPTCP_EVENT_UNSPEC,

View File

@ -42,8 +42,9 @@ enum {
NBD_CMD_WRITE = 1,
NBD_CMD_DISC = 2,
NBD_CMD_FLUSH = 3,
NBD_CMD_TRIM = 4
NBD_CMD_TRIM = 4,
/* userspace defines additional extension commands */
NBD_CMD_WRITE_ZEROES = 6,
};
/* values for flags field, these are server interaction specific. */
@ -51,12 +52,15 @@ enum {
#define NBD_FLAG_READ_ONLY (1 << 1) /* device is read-only */
#define NBD_FLAG_SEND_FLUSH (1 << 2) /* can flush writeback cache */
#define NBD_FLAG_SEND_FUA (1 << 3) /* send FUA (forced unit access) */
/* there is a gap here to match userspace */
#define NBD_FLAG_ROTATIONAL (1 << 4) /* device is rotational */
#define NBD_FLAG_SEND_TRIM (1 << 5) /* send trim/discard */
#define NBD_FLAG_SEND_WRITE_ZEROES (1 << 6) /* supports WRITE_ZEROES */
/* there is a gap here to match userspace */
#define NBD_FLAG_CAN_MULTI_CONN (1 << 8) /* Server supports multiple connections per export. */
/* values for cmd flags in the upper 16 bits of request type */
#define NBD_CMD_FLAG_FUA (1 << 16) /* FUA (forced unit access) op */
#define NBD_CMD_FLAG_NO_HOLE (1 << 17) /* Do not punch a hole for WRITE_ZEROES */
/* These are client behavior specific flags. */
#define NBD_CFLAG_DESTROY_ON_DISCONNECT (1 << 0) /* delete the nbd device on

View File

@ -0,0 +1,95 @@
/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/net_shaper.yaml */
/* YNL-GEN uapi header */
#ifndef _LINUX_NET_SHAPER_H
#define _LINUX_NET_SHAPER_H
#define NET_SHAPER_FAMILY_NAME "net-shaper"
#define NET_SHAPER_FAMILY_VERSION 1
/**
* enum net_shaper_scope - Defines the shaper @id interpretation.
* @NET_SHAPER_SCOPE_UNSPEC: The scope is not specified.
* @NET_SHAPER_SCOPE_NETDEV: The main shaper for the given network device.
* @NET_SHAPER_SCOPE_QUEUE: The shaper is attached to the given device queue,
* the @id represents the queue number.
* @NET_SHAPER_SCOPE_NODE: The shaper allows grouping of queues or other node
* shapers; can be nested in either @netdev shapers or other @node shapers,
* allowing placement in any location of the scheduling tree, except leaves
* and root.
*/
enum net_shaper_scope {
NET_SHAPER_SCOPE_UNSPEC,
NET_SHAPER_SCOPE_NETDEV,
NET_SHAPER_SCOPE_QUEUE,
NET_SHAPER_SCOPE_NODE,
/* private: */
__NET_SHAPER_SCOPE_MAX,
NET_SHAPER_SCOPE_MAX = (__NET_SHAPER_SCOPE_MAX - 1)
};
/**
* enum net_shaper_metric - Different metric supported by the shaper.
* @NET_SHAPER_METRIC_BPS: Shaper operates on a bits per second basis.
* @NET_SHAPER_METRIC_PPS: Shaper operates on a packets per second basis.
*/
enum net_shaper_metric {
NET_SHAPER_METRIC_BPS,
NET_SHAPER_METRIC_PPS,
};
enum {
NET_SHAPER_A_HANDLE = 1,
NET_SHAPER_A_METRIC,
NET_SHAPER_A_BW_MIN,
NET_SHAPER_A_BW_MAX,
NET_SHAPER_A_BURST,
NET_SHAPER_A_PRIORITY,
NET_SHAPER_A_WEIGHT,
NET_SHAPER_A_IFINDEX,
NET_SHAPER_A_PARENT,
NET_SHAPER_A_LEAVES,
__NET_SHAPER_A_MAX,
NET_SHAPER_A_MAX = (__NET_SHAPER_A_MAX - 1)
};
enum {
NET_SHAPER_A_HANDLE_SCOPE = 1,
NET_SHAPER_A_HANDLE_ID,
__NET_SHAPER_A_HANDLE_MAX,
NET_SHAPER_A_HANDLE_MAX = (__NET_SHAPER_A_HANDLE_MAX - 1)
};
enum {
NET_SHAPER_A_CAPS_IFINDEX = 1,
NET_SHAPER_A_CAPS_SCOPE,
NET_SHAPER_A_CAPS_SUPPORT_METRIC_BPS,
NET_SHAPER_A_CAPS_SUPPORT_METRIC_PPS,
NET_SHAPER_A_CAPS_SUPPORT_NESTING,
NET_SHAPER_A_CAPS_SUPPORT_BW_MIN,
NET_SHAPER_A_CAPS_SUPPORT_BW_MAX,
NET_SHAPER_A_CAPS_SUPPORT_BURST,
NET_SHAPER_A_CAPS_SUPPORT_PRIORITY,
NET_SHAPER_A_CAPS_SUPPORT_WEIGHT,
__NET_SHAPER_A_CAPS_MAX,
NET_SHAPER_A_CAPS_MAX = (__NET_SHAPER_A_CAPS_MAX - 1)
};
enum {
NET_SHAPER_CMD_GET = 1,
NET_SHAPER_CMD_SET,
NET_SHAPER_CMD_DELETE,
NET_SHAPER_CMD_GROUP,
NET_SHAPER_CMD_CAP_GET,
__NET_SHAPER_CMD_MAX,
NET_SHAPER_CMD_MAX = (__NET_SHAPER_CMD_MAX - 1)
};
#endif /* _LINUX_NET_SHAPER_H */

View File

@ -32,8 +32,9 @@ enum {
SOF_TIMESTAMPING_OPT_TX_SWHW = (1<<14),
SOF_TIMESTAMPING_BIND_PHC = (1 << 15),
SOF_TIMESTAMPING_OPT_ID_TCP = (1 << 16),
SOF_TIMESTAMPING_OPT_RX_FILTER = (1 << 17),
SOF_TIMESTAMPING_LAST = SOF_TIMESTAMPING_OPT_ID_TCP,
SOF_TIMESTAMPING_LAST = SOF_TIMESTAMPING_OPT_RX_FILTER,
SOF_TIMESTAMPING_MASK = (SOF_TIMESTAMPING_LAST - 1) |
SOF_TIMESTAMPING_LAST
};

View File

@ -93,6 +93,7 @@ enum {
NETDEV_A_PAGE_POOL_INFLIGHT,
NETDEV_A_PAGE_POOL_INFLIGHT_MEM,
NETDEV_A_PAGE_POOL_DETACH_TIME,
NETDEV_A_PAGE_POOL_DMABUF,
__NETDEV_A_PAGE_POOL_MAX,
NETDEV_A_PAGE_POOL_MAX = (__NETDEV_A_PAGE_POOL_MAX - 1)
@ -121,6 +122,9 @@ enum {
NETDEV_A_NAPI_ID,
NETDEV_A_NAPI_IRQ,
NETDEV_A_NAPI_PID,
NETDEV_A_NAPI_DEFER_HARD_IRQS,
NETDEV_A_NAPI_GRO_FLUSH_TIMEOUT,
NETDEV_A_NAPI_IRQ_SUSPEND_TIMEOUT,
__NETDEV_A_NAPI_MAX,
NETDEV_A_NAPI_MAX = (__NETDEV_A_NAPI_MAX - 1)
@ -131,6 +135,7 @@ enum {
NETDEV_A_QUEUE_IFINDEX,
NETDEV_A_QUEUE_TYPE,
NETDEV_A_QUEUE_NAPI_ID,
NETDEV_A_QUEUE_DMABUF,
__NETDEV_A_QUEUE_MAX,
NETDEV_A_QUEUE_MAX = (__NETDEV_A_QUEUE_MAX - 1)
@ -173,6 +178,16 @@ enum {
NETDEV_A_QSTATS_MAX = (__NETDEV_A_QSTATS_MAX - 1)
};
enum {
NETDEV_A_DMABUF_IFINDEX = 1,
NETDEV_A_DMABUF_QUEUES,
NETDEV_A_DMABUF_FD,
NETDEV_A_DMABUF_ID,
__NETDEV_A_DMABUF_MAX,
NETDEV_A_DMABUF_MAX = (__NETDEV_A_DMABUF_MAX - 1)
};
enum {
NETDEV_CMD_DEV_GET = 1,
NETDEV_CMD_DEV_ADD_NTF,
@ -186,6 +201,8 @@ enum {
NETDEV_CMD_QUEUE_GET,
NETDEV_CMD_NAPI_GET,
NETDEV_CMD_QSTATS_GET,
NETDEV_CMD_BIND_RX,
NETDEV_CMD_NAPI_SET,
__NETDEV_CMD_MAX,
NETDEV_CMD_MAX = (__NETDEV_CMD_MAX - 1)

View File

@ -436,7 +436,7 @@ enum nft_set_elem_flags {
* @NFTA_SET_ELEM_KEY: key value (NLA_NESTED: nft_data)
* @NFTA_SET_ELEM_DATA: data value of mapping (NLA_NESTED: nft_data_attributes)
* @NFTA_SET_ELEM_FLAGS: bitmask of nft_set_elem_flags (NLA_U32)
* @NFTA_SET_ELEM_TIMEOUT: timeout value (NLA_U64)
* @NFTA_SET_ELEM_TIMEOUT: timeout value, zero means never times out (NLA_U64)
* @NFTA_SET_ELEM_EXPIRATION: expiration time (NLA_U64)
* @NFTA_SET_ELEM_USERDATA: user data (NLA_BINARY)
* @NFTA_SET_ELEM_EXPR: expression (NLA_NESTED: nft_expr_attributes)
@ -564,16 +564,26 @@ enum nft_immediate_attributes {
/**
* enum nft_bitwise_ops - nf_tables bitwise operations
*
* @NFT_BITWISE_BOOL: mask-and-xor operation used to implement NOT, AND, OR and
* XOR boolean operations
* @NFT_BITWISE_MASK_XOR: mask-and-xor operation used to implement NOT, AND, OR
* and XOR boolean operations
* @NFT_BITWISE_LSHIFT: left-shift operation
* @NFT_BITWISE_RSHIFT: right-shift operation
* @NFT_BITWISE_AND: and operation
* @NFT_BITWISE_OR: or operation
* @NFT_BITWISE_XOR: xor operation
*/
enum nft_bitwise_ops {
NFT_BITWISE_BOOL,
NFT_BITWISE_MASK_XOR,
NFT_BITWISE_LSHIFT,
NFT_BITWISE_RSHIFT,
NFT_BITWISE_AND,
NFT_BITWISE_OR,
NFT_BITWISE_XOR,
};
/*
* Old name for NFT_BITWISE_MASK_XOR. Retained for backwards-compatibility.
*/
#define NFT_BITWISE_BOOL NFT_BITWISE_MASK_XOR
/**
* enum nft_bitwise_attributes - nf_tables bitwise expression netlink attributes
@ -586,6 +596,7 @@ enum nft_bitwise_ops {
* @NFTA_BITWISE_OP: type of operation (NLA_U32: nft_bitwise_ops)
* @NFTA_BITWISE_DATA: argument for non-boolean operations
* (NLA_NESTED: nft_data_attributes)
* @NFTA_BITWISE_SREG2: second source register (NLA_U32: nft_registers)
*
* The bitwise expression supports boolean and shift operations. It implements
* the boolean operations by performing the following operation:
@ -609,6 +620,7 @@ enum nft_bitwise_attributes {
NFTA_BITWISE_XOR,
NFTA_BITWISE_OP,
NFTA_BITWISE_DATA,
NFTA_BITWISE_SREG2,
__NFTA_BITWISE_MAX
};
#define NFTA_BITWISE_MAX (__NFTA_BITWISE_MAX - 1)
@ -1376,7 +1388,7 @@ enum nft_secmark_attributes {
#define NFTA_SECMARK_MAX (__NFTA_SECMARK_MAX - 1)
/* Max security context length */
#define NFT_SECMARK_CTX_MAXLEN 256
#define NFT_SECMARK_CTX_MAXLEN 4096
/**
* enum nft_reject_types - nf_tables reject expression reject types
@ -1694,7 +1706,7 @@ enum nft_flowtable_flags {
*
* @NFTA_FLOWTABLE_TABLE: name of the table containing the expression (NLA_STRING)
* @NFTA_FLOWTABLE_NAME: name of this flow table (NLA_STRING)
* @NFTA_FLOWTABLE_HOOK: netfilter hook configuration(NLA_U32)
* @NFTA_FLOWTABLE_HOOK: netfilter hook configuration (NLA_NESTED)
* @NFTA_FLOWTABLE_USE: number of references to this flow table (NLA_U32)
* @NFTA_FLOWTABLE_HANDLE: object handle (NLA_U64)
* @NFTA_FLOWTABLE_FLAGS: flags (NLA_U32)

View File

@ -16,10 +16,15 @@ struct nhmsg {
struct nexthop_grp {
__u32 id; /* nexthop id - must exist */
__u8 weight; /* weight of this nexthop */
__u8 resvd1;
__u8 weight_high; /* high order bits of weight */
__u16 resvd2;
};
static __inline__ __u16 nexthop_grp_weight(const struct nexthop_grp *entry)
{
return ((entry->weight_high << 8) | entry->weight) + 1;
}
enum {
NEXTHOP_GRP_TYPE_MPATH, /* hash-threshold nexthop group
* default type if not specified
@ -33,6 +38,9 @@ enum {
#define NHA_OP_FLAG_DUMP_STATS BIT(0)
#define NHA_OP_FLAG_DUMP_HW_STATS BIT(1)
/* Response OP_FLAGS. */
#define NHA_OP_FLAG_RESP_GRP_RESVD_0 BIT(31) /* Dump clears resvd fields. */
enum {
NHA_UNSPEC,
NHA_ID, /* u32; id for nexthop. id == 0 means auto-assign */

View File

@ -164,6 +164,7 @@ enum nfc_commands {
* @NFC_ATTR_VENDOR_SUBCMD: Vendor specific sub command
* @NFC_ATTR_VENDOR_DATA: Vendor specific data, to be optionally passed
* to a vendor specific command implementation
* @NFC_ATTR_TARGET_ATS: ISO 14443 type A target Answer To Select
*/
enum nfc_attrs {
NFC_ATTR_UNSPEC,
@ -198,6 +199,7 @@ enum nfc_attrs {
NFC_ATTR_VENDOR_ID,
NFC_ATTR_VENDOR_SUBCMD,
NFC_ATTR_VENDOR_DATA,
NFC_ATTR_TARGET_ATS,
/* private: internal use only */
__NFC_ATTR_AFTER_LAST
};
@ -225,6 +227,7 @@ enum nfc_sdp_attr {
#define NFC_GB_MAXSIZE 48
#define NFC_FIRMWARE_NAME_MAXSIZE 32
#define NFC_ISO15693_UID_MAXSIZE 8
#define NFC_ATS_MAXSIZE 20
/* NFC protocols */
#define NFC_PROTO_JEWEL 1

View File

@ -46,6 +46,7 @@
#define NFS4_OPEN_RESULT_CONFIRM 0x0002
#define NFS4_OPEN_RESULT_LOCKTYPE_POSIX 0x0004
#define NFS4_OPEN_RESULT_PRESERVE_UNLINKED 0x0008
#define NFS4_OPEN_RESULT_NO_OPEN_STATEID 0x0010
#define NFS4_OPEN_RESULT_MAY_NOTIFY_LOCK 0x0020
#define NFS4_SHARE_ACCESS_MASK 0x000F
@ -69,6 +70,9 @@
#define NFS4_SHARE_SIGNAL_DELEG_WHEN_RESRC_AVAIL 0x10000
#define NFS4_SHARE_PUSH_DELEG_WHEN_UNCONTENDED 0x20000
#define NFS4_SHARE_WANT_DELEG_TIMESTAMPS 0x100000
#define NFS4_SHARE_WANT_OPEN_XOR_DELEGATION 0x200000
#define NFS4_CDFC4_FORE 0x1
#define NFS4_CDFC4_BACK 0x2
#define NFS4_CDFC4_BOTH 0x3

View File

@ -70,6 +70,14 @@ enum {
NFSD_A_SERVER_SOCK_MAX = (__NFSD_A_SERVER_SOCK_MAX - 1)
};
enum {
NFSD_A_POOL_MODE_MODE = 1,
NFSD_A_POOL_MODE_NPOOLS,
__NFSD_A_POOL_MODE_MAX,
NFSD_A_POOL_MODE_MAX = (__NFSD_A_POOL_MODE_MAX - 1)
};
enum {
NFSD_CMD_RPC_STATUS_GET = 1,
NFSD_CMD_THREADS_SET,
@ -78,6 +86,8 @@ enum {
NFSD_CMD_VERSION_GET,
NFSD_CMD_LISTENER_SET,
NFSD_CMD_LISTENER_GET,
NFSD_CMD_POOL_MODE_SET,
NFSD_CMD_POOL_MODE_GET,
__NFSD_CMD_MAX,
NFSD_CMD_MAX = (__NFSD_CMD_MAX - 1)

View File

@ -2052,6 +2052,10 @@ enum nl80211_commands {
* @NL80211_ATTR_INTERFACE_COMBINATIONS: Nested attribute listing the supported
* interface combinations. In each nested item, it contains attributes
* defined in &enum nl80211_if_combination_attrs.
* If the wiphy uses multiple radios (@NL80211_ATTR_WIPHY_RADIOS is set),
* this attribute contains the interface combinations of the first radio.
* See @NL80211_ATTR_WIPHY_INTERFACE_COMBINATIONS for the global wiphy
* combinations for the sum of all radios.
* @NL80211_ATTR_SOFTWARE_IFTYPES: Nested attribute (just like
* %NL80211_ATTR_SUPPORTED_IFTYPES) containing the interface types that
* are managed in software: interfaces of these types aren't subject to
@ -2856,6 +2860,17 @@ enum nl80211_commands {
* %NL80211_CMD_ASSOCIATE indicating the SPP A-MSDUs
* are used on this connection
*
* @NL80211_ATTR_WIPHY_RADIOS: Nested attribute describing physical radios
* belonging to this wiphy. See &enum nl80211_wiphy_radio_attrs.
*
* @NL80211_ATTR_WIPHY_INTERFACE_COMBINATIONS: Nested attribute listing the
* supported interface combinations for all radios combined. In each
* nested item, it contains attributes defined in
* &enum nl80211_if_combination_attrs.
*
* @NL80211_ATTR_VIF_RADIO_MASK: Bitmask of allowed radios (u32).
* A value of 0 means all radios.
*
* @NUM_NL80211_ATTR: total number of nl80211_attrs available
* @NL80211_ATTR_MAX: highest attribute number currently defined
* @__NL80211_ATTR_AFTER_LAST: internal use
@ -3401,6 +3416,11 @@ enum nl80211_attrs {
NL80211_ATTR_ASSOC_SPP_AMSDU,
NL80211_ATTR_WIPHY_RADIOS,
NL80211_ATTR_WIPHY_INTERFACE_COMBINATIONS,
NL80211_ATTR_VIF_RADIO_MASK,
/* add attributes here, update the policy in nl80211.c */
__NL80211_ATTR_AFTER_LAST,
@ -4277,6 +4297,8 @@ enum nl80211_wmm_rule {
* @NL80211_FREQUENCY_ATTR_CAN_MONITOR: This channel can be used in monitor
* mode despite other (regulatory) restrictions, even if the channel is
* otherwise completely disabled.
* @NL80211_FREQUENCY_ATTR_ALLOW_6GHZ_VLP_AP: This channel can be used for a
* very low power (VLP) AP, despite being NO_IR.
* @NL80211_FREQUENCY_ATTR_MAX: highest frequency attribute number
* currently defined
* @__NL80211_FREQUENCY_ATTR_AFTER_LAST: internal use
@ -4320,6 +4342,7 @@ enum nl80211_frequency_attr {
NL80211_FREQUENCY_ATTR_NO_6GHZ_VLP_CLIENT,
NL80211_FREQUENCY_ATTR_NO_6GHZ_AFC_CLIENT,
NL80211_FREQUENCY_ATTR_CAN_MONITOR,
NL80211_FREQUENCY_ATTR_ALLOW_6GHZ_VLP_AP,
/* keep last */
__NL80211_FREQUENCY_ATTR_AFTER_LAST,
@ -4529,6 +4552,8 @@ enum nl80211_sched_scan_match_attr {
* Should be used together with %NL80211_RRF_DFS only.
* @NL80211_RRF_NO_6GHZ_VLP_CLIENT: Client connection to VLP AP not allowed
* @NL80211_RRF_NO_6GHZ_AFC_CLIENT: Client connection to AFC AP not allowed
* @NL80211_RRF_ALLOW_6GHZ_VLP_AP: Very low power (VLP) AP can be permitted
* despite NO_IR configuration.
*/
enum nl80211_reg_rule_flags {
NL80211_RRF_NO_OFDM = 1<<0,
@ -4553,6 +4578,7 @@ enum nl80211_reg_rule_flags {
NL80211_RRF_DFS_CONCURRENT = 1<<21,
NL80211_RRF_NO_6GHZ_VLP_CLIENT = 1<<22,
NL80211_RRF_NO_6GHZ_AFC_CLIENT = 1<<23,
NL80211_RRF_ALLOW_6GHZ_VLP_AP = 1<<24,
};
#define NL80211_RRF_PASSIVE_SCAN NL80211_RRF_NO_IR
@ -4677,6 +4703,7 @@ enum nl80211_survey_info {
* overrides all other flags.
* @NL80211_MNTR_FLAG_ACTIVE: use the configured MAC address
* and ACK incoming unicast packets.
* @NL80211_MNTR_FLAG_SKIP_TX: do not pass local tx packets
*
* @__NL80211_MNTR_FLAG_AFTER_LAST: internal use
* @NL80211_MNTR_FLAG_MAX: highest possible monitor flag
@ -4689,6 +4716,7 @@ enum nl80211_mntr_flags {
NL80211_MNTR_FLAG_OTHER_BSS,
NL80211_MNTR_FLAG_COOK_FRAMES,
NL80211_MNTR_FLAG_ACTIVE,
NL80211_MNTR_FLAG_SKIP_TX,
/* keep last */
__NL80211_MNTR_FLAG_AFTER_LAST,
@ -7999,4 +8027,57 @@ enum nl80211_ap_settings_flags {
NL80211_AP_SETTINGS_SA_QUERY_OFFLOAD_SUPPORT = 1 << 1,
};
/**
* enum nl80211_wiphy_radio_attrs - wiphy radio attributes
*
* @__NL80211_WIPHY_RADIO_ATTR_INVALID: Invalid
*
* @NL80211_WIPHY_RADIO_ATTR_INDEX: Index of this radio (u32)
* @NL80211_WIPHY_RADIO_ATTR_FREQ_RANGE: Frequency range supported by this
* radio. Attribute may be present multiple times.
* @NL80211_WIPHY_RADIO_ATTR_INTERFACE_COMBINATION: Supported interface
* combination for this radio. Attribute may be present multiple times
* and contains attributes defined in &enum nl80211_if_combination_attrs.
* @NL80211_WIPHY_RADIO_ATTR_ANTENNA_MASK: bitmask (u32) of antennas
* connected to this radio.
*
* @__NL80211_WIPHY_RADIO_ATTR_LAST: Internal
* @NL80211_WIPHY_RADIO_ATTR_MAX: Highest attribute
*/
enum nl80211_wiphy_radio_attrs {
__NL80211_WIPHY_RADIO_ATTR_INVALID,
NL80211_WIPHY_RADIO_ATTR_INDEX,
NL80211_WIPHY_RADIO_ATTR_FREQ_RANGE,
NL80211_WIPHY_RADIO_ATTR_INTERFACE_COMBINATION,
NL80211_WIPHY_RADIO_ATTR_ANTENNA_MASK,
/* keep last */
__NL80211_WIPHY_RADIO_ATTR_LAST,
NL80211_WIPHY_RADIO_ATTR_MAX = __NL80211_WIPHY_RADIO_ATTR_LAST - 1,
};
/**
* enum nl80211_wiphy_radio_freq_range - wiphy radio frequency range
*
* @__NL80211_WIPHY_RADIO_FREQ_ATTR_INVALID: Invalid
*
* @NL80211_WIPHY_RADIO_FREQ_ATTR_START: Frequency range start (u32).
* The unit is kHz.
* @NL80211_WIPHY_RADIO_FREQ_ATTR_END: Frequency range end (u32).
* The unit is kHz.
*
* @__NL80211_WIPHY_RADIO_FREQ_ATTR_LAST: Internal
* @NL80211_WIPHY_RADIO_FREQ_ATTR_MAX: Highest attribute
*/
enum nl80211_wiphy_radio_freq_range {
__NL80211_WIPHY_RADIO_FREQ_ATTR_INVALID,
NL80211_WIPHY_RADIO_FREQ_ATTR_START,
NL80211_WIPHY_RADIO_FREQ_ATTR_END,
__NL80211_WIPHY_RADIO_FREQ_ATTR_LAST,
NL80211_WIPHY_RADIO_FREQ_ATTR_MAX = __NL80211_WIPHY_RADIO_FREQ_ATTR_LAST - 1,
};
#endif /* __LINUX_NL80211_H */

View File

@ -3,6 +3,7 @@
#define __LINUX_NSFS_H
#include <linux/ioctl.h>
#include <linux/types.h>
#define NSIO 0xb7
@ -15,5 +16,30 @@
#define NS_GET_NSTYPE _IO(NSIO, 0x3)
/* Get owner UID (in the caller's user namespace) for a user namespace */
#define NS_GET_OWNER_UID _IO(NSIO, 0x4)
/* Get the id for a mount namespace */
#define NS_GET_MNTNS_ID _IOR(NSIO, 0x5, __u64)
/* Translate pid from target pid namespace into the caller's pid namespace. */
#define NS_GET_PID_FROM_PIDNS _IOR(NSIO, 0x6, int)
/* Return thread-group leader id of pid in the callers pid namespace. */
#define NS_GET_TGID_FROM_PIDNS _IOR(NSIO, 0x7, int)
/* Translate pid from caller's pid namespace into a target pid namespace. */
#define NS_GET_PID_IN_PIDNS _IOR(NSIO, 0x8, int)
/* Return thread-group leader id of pid in the target pid namespace. */
#define NS_GET_TGID_IN_PIDNS _IOR(NSIO, 0x9, int)
struct mnt_ns_info {
__u32 size;
__u32 nr_mounts;
__u64 mnt_ns_id;
};
#define MNT_NS_INFO_SIZE_VER0 16 /* size of first published struct */
/* Get information about namespace. */
#define NS_MNT_GET_INFO _IOR(NSIO, 10, struct mnt_ns_info)
/* Get next namespace. */
#define NS_MNT_GET_NEXT _IOR(NSIO, 11, struct mnt_ns_info)
/* Get previous namespace. */
#define NS_MNT_GET_PREV _IOR(NSIO, 12, struct mnt_ns_info)
#endif /* __LINUX_NSFS_H */

View File

@ -649,7 +649,8 @@ enum ovs_flow_attr {
* Actions are passed as nested attributes.
*
* Executes the specified actions with the given probability on a per-packet
* basis.
* basis. Nested actions will be able to access the probability value of the
* parent @OVS_ACTION_ATTR_SAMPLE.
*/
enum ovs_sample_attr {
OVS_SAMPLE_ATTR_UNSPEC,
@ -886,6 +887,31 @@ enum ovs_check_pkt_len_attr {
#define OVS_CHECK_PKT_LEN_ATTR_MAX (__OVS_CHECK_PKT_LEN_ATTR_MAX - 1)
#define OVS_PSAMPLE_COOKIE_MAX_SIZE 16
/**
* enum ovs_psample_attr - Attributes for %OVS_ACTION_ATTR_PSAMPLE
* action.
*
* @OVS_PSAMPLE_ATTR_GROUP: 32-bit number to identify the source of the
* sample.
* @OVS_PSAMPLE_ATTR_COOKIE: An optional variable-length binary cookie that
* contains user-defined metadata. The maximum length is
* OVS_PSAMPLE_COOKIE_MAX_SIZE bytes.
*
* Sends the packet to the psample multicast group with the specified group and
* cookie. It is possible to combine this action with the
* %OVS_ACTION_ATTR_TRUNC action to limit the size of the sample.
*/
enum ovs_psample_attr {
OVS_PSAMPLE_ATTR_GROUP = 1, /* u32 number. */
OVS_PSAMPLE_ATTR_COOKIE, /* Optional, user specified cookie. */
/* private: */
__OVS_PSAMPLE_ATTR_MAX
};
#define OVS_PSAMPLE_ATTR_MAX (__OVS_PSAMPLE_ATTR_MAX - 1)
/**
* enum ovs_action_attr - Action types.
*
@ -938,6 +964,8 @@ enum ovs_check_pkt_len_attr {
* of l3 tunnel flag in the tun_flags field of OVS_ACTION_ATTR_ADD_MPLS
* argument.
* @OVS_ACTION_ATTR_DROP: Explicit drop action.
* @OVS_ACTION_ATTR_PSAMPLE: Send a sample of the packet to external observers
* via psample.
*
* Only a single header can be set with a single %OVS_ACTION_ATTR_SET. Not all
* fields within a header are modifiable, e.g. the IPv4 protocol and fragment
@ -976,6 +1004,7 @@ enum ovs_action_attr {
OVS_ACTION_ATTR_ADD_MPLS, /* struct ovs_action_add_mpls. */
OVS_ACTION_ATTR_DEC_TTL, /* Nested OVS_DEC_TTL_ATTR_*. */
OVS_ACTION_ATTR_DROP, /* u32 error code. */
OVS_ACTION_ATTR_PSAMPLE, /* Nested OVS_PSAMPLE_ATTR_*. */
__OVS_ACTION_ATTR_MAX, /* Nothing past this will be accepted
* from userspace. */

View File

@ -340,7 +340,8 @@
#define PCI_MSIX_ENTRY_UPPER_ADDR 0x4 /* Message Upper Address */
#define PCI_MSIX_ENTRY_DATA 0x8 /* Message Data */
#define PCI_MSIX_ENTRY_VECTOR_CTRL 0xc /* Vector Control */
#define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001
#define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001 /* Mask Bit */
#define PCI_MSIX_ENTRY_CTRL_ST 0xffff0000 /* Steering Tag */
/* CompactPCI Hotswap Register */
@ -634,9 +635,11 @@
#define PCI_EXP_RTCTL_SENFEE 0x0002 /* System Error on Non-Fatal Error */
#define PCI_EXP_RTCTL_SEFEE 0x0004 /* System Error on Fatal Error */
#define PCI_EXP_RTCTL_PMEIE 0x0008 /* PME Interrupt Enable */
#define PCI_EXP_RTCTL_CRSSVE 0x0010 /* CRS Software Visibility Enable */
#define PCI_EXP_RTCTL_RRS_SVE 0x0010 /* Config RRS Software Visibility Enable */
#define PCI_EXP_RTCTL_CRSSVE PCI_EXP_RTCTL_RRS_SVE /* compatibility */
#define PCI_EXP_RTCAP 0x1e /* Root Capabilities */
#define PCI_EXP_RTCAP_CRSVIS 0x0001 /* CRS Software Visibility capability */
#define PCI_EXP_RTCAP_RRS_SV 0x0001 /* Config RRS Software Visibility */
#define PCI_EXP_RTCAP_CRSVIS PCI_EXP_RTCAP_RRS_SV /* compatibility */
#define PCI_EXP_RTSTA 0x20 /* Root Status */
#define PCI_EXP_RTSTA_PME_RQ_ID 0x0000ffff /* PME Requester ID */
#define PCI_EXP_RTSTA_PME 0x00010000 /* PME status */
@ -657,6 +660,7 @@
#define PCI_EXP_DEVCAP2_ATOMIC_COMP64 0x00000100 /* 64b AtomicOp completion */
#define PCI_EXP_DEVCAP2_ATOMIC_COMP128 0x00000200 /* 128b AtomicOp completion */
#define PCI_EXP_DEVCAP2_LTR 0x00000800 /* Latency tolerance reporting */
#define PCI_EXP_DEVCAP2_TPH_COMP_MASK 0x00003000 /* TPH completer support */
#define PCI_EXP_DEVCAP2_OBFF_MASK 0x000c0000 /* OBFF support mechanism */
#define PCI_EXP_DEVCAP2_OBFF_MSG 0x00040000 /* New message signaling */
#define PCI_EXP_DEVCAP2_OBFF_WAKE 0x00080000 /* Re-use WAKE# for OBFF */
@ -676,6 +680,7 @@
#define PCI_EXP_DEVSTA2 0x2a /* Device Status 2 */
#define PCI_CAP_EXP_RC_ENDPOINT_SIZEOF_V2 0x2c /* end of v2 EPs w/o link */
#define PCI_EXP_LNKCAP2 0x2c /* Link Capabilities 2 */
#define PCI_EXP_LNKCAP2_SLS 0x000000fe /* Supported Link Speeds Vector */
#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x00000002 /* Supported Speed 2.5GT/s */
#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x00000004 /* Supported Speed 5GT/s */
#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008 /* Supported Speed 8GT/s */
@ -740,6 +745,7 @@
#define PCI_EXT_CAP_ID_DVSEC 0x23 /* Designated Vendor-Specific */
#define PCI_EXT_CAP_ID_DLF 0x25 /* Data Link Feature */
#define PCI_EXT_CAP_ID_PL_16GT 0x26 /* Physical Layer 16.0 GT/s */
#define PCI_EXT_CAP_ID_NPEM 0x29 /* Native PCIe Enclosure Management */
#define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */
#define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DOE
@ -1020,15 +1026,34 @@
#define PCI_DPA_CAP_SUBSTATE_MASK 0x1F /* # substates - 1 */
#define PCI_DPA_BASE_SIZEOF 16 /* size with 0 substates */
/* TPH Completer Support */
#define PCI_EXP_DEVCAP2_TPH_COMP_NONE 0x0 /* None */
#define PCI_EXP_DEVCAP2_TPH_COMP_TPH_ONLY 0x1 /* TPH only */
#define PCI_EXP_DEVCAP2_TPH_COMP_EXT_TPH 0x3 /* TPH and Extended TPH */
/* TPH Requester */
#define PCI_TPH_CAP 4 /* capability register */
#define PCI_TPH_CAP_LOC_MASK 0x600 /* location mask */
#define PCI_TPH_LOC_NONE 0x000 /* no location */
#define PCI_TPH_LOC_CAP 0x200 /* in capability */
#define PCI_TPH_LOC_MSIX 0x400 /* in MSI-X */
#define PCI_TPH_CAP_ST_MASK 0x07FF0000 /* ST table mask */
#define PCI_TPH_CAP_ST_SHIFT 16 /* ST table shift */
#define PCI_TPH_BASE_SIZEOF 0xc /* size with no ST table */
#define PCI_TPH_CAP_ST_NS 0x00000001 /* No ST Mode Supported */
#define PCI_TPH_CAP_ST_IV 0x00000002 /* Interrupt Vector Mode Supported */
#define PCI_TPH_CAP_ST_DS 0x00000004 /* Device Specific Mode Supported */
#define PCI_TPH_CAP_EXT_TPH 0x00000100 /* Ext TPH Requester Supported */
#define PCI_TPH_CAP_LOC_MASK 0x00000600 /* ST Table Location */
#define PCI_TPH_LOC_NONE 0x00000000 /* Not present */
#define PCI_TPH_LOC_CAP 0x00000200 /* In capability */
#define PCI_TPH_LOC_MSIX 0x00000400 /* In MSI-X */
#define PCI_TPH_CAP_ST_MASK 0x07FF0000 /* ST Table Size */
#define PCI_TPH_CAP_ST_SHIFT 16 /* ST Table Size shift */
#define PCI_TPH_BASE_SIZEOF 0xc /* Size with no ST table */
#define PCI_TPH_CTRL 8 /* control register */
#define PCI_TPH_CTRL_MODE_SEL_MASK 0x00000007 /* ST Mode Select */
#define PCI_TPH_ST_NS_MODE 0x0 /* No ST Mode */
#define PCI_TPH_ST_IV_MODE 0x1 /* Interrupt Vector Mode */
#define PCI_TPH_ST_DS_MODE 0x2 /* Device Specific Mode */
#define PCI_TPH_CTRL_REQ_EN_MASK 0x00000300 /* TPH Requester Enable */
#define PCI_TPH_REQ_DISABLE 0x0 /* No TPH requests allowed */
#define PCI_TPH_REQ_TPH_ONLY 0x1 /* TPH only requests allowed */
#define PCI_TPH_REQ_EXT_TPH 0x3 /* Extended TPH requests allowed */
/* Downstream Port Containment */
#define PCI_EXP_DPC_CAP 0x04 /* DPC Capability */
@ -1121,6 +1146,40 @@
#define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK 0x000000F0
#define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT 4
/* Native PCIe Enclosure Management */
#define PCI_NPEM_CAP 0x04 /* NPEM capability register */
#define PCI_NPEM_CAP_CAPABLE 0x00000001 /* NPEM Capable */
#define PCI_NPEM_CTRL 0x08 /* NPEM control register */
#define PCI_NPEM_CTRL_ENABLE 0x00000001 /* NPEM Enable */
/*
* Native PCIe Enclosure Management indication bits and Reset command bit
* are corresponding for capability and control registers.
*/
#define PCI_NPEM_CMD_RESET 0x00000002 /* Reset Command */
#define PCI_NPEM_IND_OK 0x00000004 /* OK */
#define PCI_NPEM_IND_LOCATE 0x00000008 /* Locate */
#define PCI_NPEM_IND_FAIL 0x00000010 /* Fail */
#define PCI_NPEM_IND_REBUILD 0x00000020 /* Rebuild */
#define PCI_NPEM_IND_PFA 0x00000040 /* Predicted Failure Analysis */
#define PCI_NPEM_IND_HOTSPARE 0x00000080 /* Hot Spare */
#define PCI_NPEM_IND_ICA 0x00000100 /* In Critical Array */
#define PCI_NPEM_IND_IFA 0x00000200 /* In Failed Array */
#define PCI_NPEM_IND_IDT 0x00000400 /* Device Type */
#define PCI_NPEM_IND_DISABLED 0x00000800 /* Disabled */
#define PCI_NPEM_IND_SPEC_0 0x01000000
#define PCI_NPEM_IND_SPEC_1 0x02000000
#define PCI_NPEM_IND_SPEC_2 0x04000000
#define PCI_NPEM_IND_SPEC_3 0x08000000
#define PCI_NPEM_IND_SPEC_4 0x10000000
#define PCI_NPEM_IND_SPEC_5 0x20000000
#define PCI_NPEM_IND_SPEC_6 0x40000000
#define PCI_NPEM_IND_SPEC_7 0x80000000
#define PCI_NPEM_STATUS 0x0c /* NPEM status register */
#define PCI_NPEM_STATUS_CC 0x00000001 /* Command Completed */
/* Data Object Exchange */
#define PCI_DOE_CAP 0x04 /* DOE Capabilities Register */
#define PCI_DOE_CAP_INT_SUP 0x00000001 /* Interrupt Support */

View File

@ -511,7 +511,16 @@ struct perf_event_attr {
__u16 sample_max_stack;
__u16 __reserved_2;
__u32 aux_sample_size;
__u32 __reserved_3;
union {
__u32 aux_action;
struct {
__u32 aux_start_paused : 1, /* start AUX area tracing paused */
aux_pause : 1, /* on overflow, pause AUX area tracing */
aux_resume : 1, /* on overflow, resume AUX area tracing */
__reserved_3 : 29;
};
};
/*
* User provided data if sigtrap=1, passed back to user via
@ -1349,12 +1358,14 @@ union perf_mem_data_src {
#define PERF_MEM_LVLNUM_L2 0x02 /* L2 */
#define PERF_MEM_LVLNUM_L3 0x03 /* L3 */
#define PERF_MEM_LVLNUM_L4 0x04 /* L4 */
/* 5-0x7 available */
#define PERF_MEM_LVLNUM_L2_MHB 0x05 /* L2 Miss Handling Buffer */
#define PERF_MEM_LVLNUM_MSC 0x06 /* Memory-side Cache */
/* 0x7 available */
#define PERF_MEM_LVLNUM_UNC 0x08 /* Uncached */
#define PERF_MEM_LVLNUM_CXL 0x09 /* CXL */
#define PERF_MEM_LVLNUM_IO 0x0a /* I/O */
#define PERF_MEM_LVLNUM_ANY_CACHE 0x0b /* Any cache */
#define PERF_MEM_LVLNUM_LFB 0x0c /* LFB */
#define PERF_MEM_LVLNUM_LFB 0x0c /* LFB / L1 Miss Handling Buffer */
#define PERF_MEM_LVLNUM_RAM 0x0d /* RAM */
#define PERF_MEM_LVLNUM_PMEM 0x0e /* PMEM */
#define PERF_MEM_LVLNUM_NA 0x0f /* N/A */

View File

@ -5,6 +5,7 @@
#include <linux/types.h>
#include <linux/fcntl.h>
#include <linux/ioctl.h>
/* Flags for pidfd_open(). */
#define PIDFD_NONBLOCK O_NONBLOCK
@ -15,4 +16,67 @@
#define PIDFD_SIGNAL_THREAD_GROUP (1UL << 1)
#define PIDFD_SIGNAL_PROCESS_GROUP (1UL << 2)
/* Flags for pidfd_info. */
#define PIDFD_INFO_PID (1UL << 0) /* Always returned, even if not requested */
#define PIDFD_INFO_CREDS (1UL << 1) /* Always returned, even if not requested */
#define PIDFD_INFO_CGROUPID (1UL << 2) /* Always returned if available, even if not requested */
#define PIDFD_INFO_SIZE_VER0 64 /* sizeof first published struct */
struct pidfd_info {
/*
* This mask is similar to the request_mask in statx(2).
*
* Userspace indicates what extensions or expensive-to-calculate fields
* they want by setting the corresponding bits in mask. The kernel
* will ignore bits that it does not know about.
*
* When filling the structure, the kernel will only set bits
* corresponding to the fields that were actually filled by the kernel.
* This also includes any future extensions that might be automatically
* filled. If the structure size is too small to contain a field
* (requested or not), to avoid confusion the mask will not
* contain a bit for that field.
*
* As such, userspace MUST verify that mask contains the
* corresponding flags after the ioctl(2) returns to ensure that it is
* using valid data.
*/
__u64 mask;
/*
* The information contained in the following fields might be stale at the
* time it is received, as the target process might have exited as soon as
* the IOCTL was processed, and there is no way to avoid that. However, it
* is guaranteed that if the call was successful, then the information was
* correct and referred to the intended process at the time the work was
* performed. */
__u64 cgroupid;
__u32 pid;
__u32 tgid;
__u32 ppid;
__u32 ruid;
__u32 rgid;
__u32 euid;
__u32 egid;
__u32 suid;
__u32 sgid;
__u32 fsuid;
__u32 fsgid;
__u32 spare0[1];
};
#define PIDFS_IOCTL_MAGIC 0xFF
#define PIDFD_GET_CGROUP_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 1)
#define PIDFD_GET_IPC_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 2)
#define PIDFD_GET_MNT_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 3)
#define PIDFD_GET_NET_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 4)
#define PIDFD_GET_PID_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 5)
#define PIDFD_GET_PID_FOR_CHILDREN_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 6)
#define PIDFD_GET_TIME_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 7)
#define PIDFD_GET_TIME_FOR_CHILDREN_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 8)
#define PIDFD_GET_USER_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 9)
#define PIDFD_GET_UTS_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 10)
#define PIDFD_GET_INFO _IOWR(PIDFS_IOCTL_MAGIC, 11, struct pidfd_info)
#endif /* _LINUX_PIDFD_H */

View File

@ -246,16 +246,19 @@ struct tc_u32_key {
};
struct tc_u32_sel {
unsigned char flags;
unsigned char offshift;
unsigned char nkeys;
/* New members MUST be added within the __struct_group() macro below. */
__struct_group(tc_u32_sel_hdr, hdr, /* no attrs */,
unsigned char flags;
unsigned char offshift;
unsigned char nkeys;
__be16 offmask;
__u16 off;
short offoff;
__be16 offmask;
__u16 off;
short offoff;
short hoff;
__be32 hmask;
short hoff;
__be32 hmask;
);
struct tc_u32_key keys[];
};
@ -554,6 +557,9 @@ enum {
TCA_FLOWER_KEY_SPI, /* be32 */
TCA_FLOWER_KEY_SPI_MASK, /* be32 */
TCA_FLOWER_KEY_ENC_FLAGS, /* be32 */
TCA_FLOWER_KEY_ENC_FLAGS_MASK, /* be32 */
__TCA_FLOWER_MAX,
};
@ -674,8 +680,15 @@ enum {
enum {
TCA_FLOWER_KEY_FLAGS_IS_FRAGMENT = (1 << 0),
TCA_FLOWER_KEY_FLAGS_FRAG_IS_FIRST = (1 << 1),
TCA_FLOWER_KEY_FLAGS_TUNNEL_CSUM = (1 << 2),
TCA_FLOWER_KEY_FLAGS_TUNNEL_DONT_FRAGMENT = (1 << 3),
TCA_FLOWER_KEY_FLAGS_TUNNEL_OAM = (1 << 4),
TCA_FLOWER_KEY_FLAGS_TUNNEL_CRIT_OPT = (1 << 5),
__TCA_FLOWER_KEY_FLAGS_MAX,
};
#define TCA_FLOWER_KEY_FLAGS_MAX (__TCA_FLOWER_KEY_FLAGS_MAX - 1)
enum {
TCA_FLOWER_KEY_CFM_OPT_UNSPEC,
TCA_FLOWER_KEY_CFM_MD_LEVEL,

View File

@ -836,6 +836,8 @@ enum {
TCA_FQ_WEIGHTS, /* Weights for each band */
TCA_FQ_OFFLOAD_HORIZON, /* dequeue paced packets within this horizon immediately (us units) */
__TCA_FQ_MAX
};

View File

@ -230,7 +230,7 @@ struct prctl_mm_map {
# define PR_PAC_APDBKEY (1UL << 3)
# define PR_PAC_APGAKEY (1UL << 4)
/* Tagged user address controls for arm64 */
/* Tagged user address controls for arm64 and RISC-V */
#define PR_SET_TAGGED_ADDR_CTRL 55
#define PR_GET_TAGGED_ADDR_CTRL 56
# define PR_TAGGED_ADDR_ENABLE (1UL << 0)
@ -244,6 +244,9 @@ struct prctl_mm_map {
# define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT)
/* Unused; kept only for source compatibility */
# define PR_MTE_TCF_SHIFT 1
/* RISC-V pointer masking tag length */
# define PR_PMLEN_SHIFT 24
# define PR_PMLEN_MASK (0x7fUL << PR_PMLEN_SHIFT)
/* Control reclaim behavior when allocating memory */
#define PR_SET_IO_FLUSHER 57
@ -328,4 +331,26 @@ struct prctl_mm_map {
# define PR_PPC_DEXCR_CTRL_CLEAR_ONEXEC 0x10 /* Clear the aspect on exec */
# define PR_PPC_DEXCR_CTRL_MASK 0x1f
/*
* Get the current shadow stack configuration for the current thread,
* this will be the value configured via PR_SET_SHADOW_STACK_STATUS.
*/
#define PR_GET_SHADOW_STACK_STATUS 74
/*
* Set the current shadow stack configuration. Enabling the shadow
* stack will cause a shadow stack to be allocated for the thread.
*/
#define PR_SET_SHADOW_STACK_STATUS 75
# define PR_SHADOW_STACK_ENABLE (1UL << 0)
# define PR_SHADOW_STACK_WRITE (1UL << 1)
# define PR_SHADOW_STACK_PUSH (1UL << 2)
/*
* Prevent further changes to the specified shadow stack
* configuration. All bits may be locked via this call, including
* undefined bits.
*/
#define PR_LOCK_SHADOW_STACK_STATUS 76
#endif /* _LINUX_PRCTL_H */

View File

@ -8,7 +8,11 @@ enum {
PSAMPLE_ATTR_ORIGSIZE,
PSAMPLE_ATTR_SAMPLE_GROUP,
PSAMPLE_ATTR_GROUP_SEQ,
PSAMPLE_ATTR_SAMPLE_RATE,
PSAMPLE_ATTR_SAMPLE_RATE, /* u32, ratio between observed and
* sampled packets or scaled probability
* if PSAMPLE_ATTR_SAMPLE_PROBABILITY
* is set.
*/
PSAMPLE_ATTR_DATA,
PSAMPLE_ATTR_GROUP_REFCOUNT,
PSAMPLE_ATTR_TUNNEL,
@ -19,6 +23,11 @@ enum {
PSAMPLE_ATTR_LATENCY, /* u64, nanoseconds */
PSAMPLE_ATTR_TIMESTAMP, /* u64, nanoseconds */
PSAMPLE_ATTR_PROTO, /* u16 */
PSAMPLE_ATTR_USER_COOKIE, /* binary, user provided data */
PSAMPLE_ATTR_SAMPLE_PROBABILITY,/* no argument, interpret rate in
* PSAMPLE_ATTR_SAMPLE_RATE as a
* probability scaled 0 - U32_MAX.
*/
__PSAMPLE_ATTR_MAX
};

View File

@ -59,6 +59,7 @@
#define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18)
#define PSCI_1_1_FN_MEM_PROTECT PSCI_0_2_FN(19)
#define PSCI_1_1_FN_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN(20)
#define PSCI_1_3_FN_SYSTEM_OFF2 PSCI_0_2_FN(21)
#define PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND PSCI_0_2_FN64(12)
#define PSCI_1_0_FN64_NODE_HW_STATE PSCI_0_2_FN64(13)
@ -68,6 +69,7 @@
#define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18)
#define PSCI_1_1_FN64_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN64(20)
#define PSCI_1_3_FN64_SYSTEM_OFF2 PSCI_0_2_FN64(21)
/* PSCI v0.2 power state encoding for CPU_SUSPEND function */
#define PSCI_0_2_POWER_STATE_ID_MASK 0xffff
@ -100,6 +102,9 @@
#define PSCI_1_1_RESET_TYPE_SYSTEM_WARM_RESET 0
#define PSCI_1_1_RESET_TYPE_VENDOR_START 0x80000000U
/* PSCI v1.3 hibernate type for SYSTEM_OFF2 */
#define PSCI_1_3_OFF_TYPE_HIBERNATE_OFF BIT(0)
/* PSCI version decoding (independent of PSCI version) */
#define PSCI_VERSION_MAJOR_SHIFT 16
#define PSCI_VERSION_MINOR_MASK \

View File

@ -31,6 +31,7 @@ enum {
SNP_PLATFORM_STATUS,
SNP_COMMIT,
SNP_SET_CONFIG,
SNP_VLEK_LOAD,
SEV_MAX,
};
@ -50,6 +51,7 @@ typedef enum {
SEV_RET_INVALID_PLATFORM_STATE,
SEV_RET_INVALID_GUEST_STATE,
SEV_RET_INAVLID_CONFIG,
SEV_RET_INVALID_CONFIG = SEV_RET_INAVLID_CONFIG,
SEV_RET_INVALID_LEN,
SEV_RET_ALREADY_OWNED,
SEV_RET_INVALID_CERTIFICATE,
@ -214,6 +216,32 @@ struct sev_user_data_snp_config {
__u8 rsvd1[52];
} __attribute__((packed));
/**
* struct sev_data_snp_vlek_load - SNP_VLEK_LOAD structure
*
* @len: length of the command buffer read by the PSP
* @vlek_wrapped_version: version of wrapped VLEK hashstick (Must be 0h)
* @rsvd: reserved
* @vlek_wrapped_address: address of a wrapped VLEK hashstick
* (struct sev_user_data_snp_wrapped_vlek_hashstick)
*/
struct sev_user_data_snp_vlek_load {
__u32 len; /* In */
__u8 vlek_wrapped_version; /* In */
__u8 rsvd[3]; /* In */
__u64 vlek_wrapped_address; /* In */
} __attribute__((packed));
/**
* struct sev_user_data_snp_vlek_wrapped_vlek_hashstick - Wrapped VLEK data
*
* @data: Opaque data provided by AMD KDS (as described in SEV-SNP Firmware ABI
* 1.54, SNP_VLEK_LOAD)
*/
struct sev_user_data_snp_wrapped_vlek_hashstick {
__u8 data[432]; /* In */
} __attribute__((packed));
/**
* struct sev_issue_cmd - SEV ioctl parameters
*

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