From 2de7d0b10c29442f556654b61d0c5c4a53047a09 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Thu, 20 Feb 2020 18:50:20 -0500 Subject: [PATCH] fix zig build, ABI ABI, and update tests to new Target layout --- lib/std/build.zig | 36 +++++++++++++----------------------- src-self-hosted/stage2.zig | 4 ++-- test/compile_errors.zig | 3 +-- test/translate_c.zig | 24 ++++++++---------------- 4 files changed, 24 insertions(+), 43 deletions(-) diff --git a/lib/std/build.zig b/lib/std/build.zig index f6e8474701..beb89ab7ce 100644 --- a/lib/std/build.zig +++ b/lib/std/build.zig @@ -1909,43 +1909,33 @@ pub const LibExeObjStep = struct { try zig_args.append(self.target.zigTriple(builder.allocator) catch unreachable); const all_features = self.target.getArch().allFeaturesList(); - var populated_cpu_features = cross.cpu_features.cpu.features; - if (self.target.getArch().subArchFeature()) |sub_arch_index| { - populated_cpu_features.addFeature(sub_arch_index); - } + var populated_cpu_features = cross.cpu.model.features; populated_cpu_features.populateDependencies(all_features); - if (populated_cpu_features.eql(cross.cpu_features.features)) { + if (populated_cpu_features.eql(cross.cpu.features)) { // The CPU name alone is sufficient. // If it is the baseline CPU, no command line args are required. - if (cross.cpu_features.cpu != self.target.getArch().getBaselineCpuFeatures().cpu) { - try zig_args.append("-target-cpu"); - try zig_args.append(cross.cpu_features.cpu.name); + if (cross.cpu.model != Target.Cpu.baseline(self.target.getArch()).model) { + try zig_args.append("-mcpu"); + try zig_args.append(cross.cpu.model.name); } } else { - try zig_args.append("-target-cpu"); - try zig_args.append(cross.cpu_features.cpu.name); + var mcpu_buffer = try std.Buffer.init(builder.allocator, "-mcpu="); + try zig_args.append(cross.cpu.model.name); - try zig_args.append("-target-feature"); - var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0); for (all_features) |feature, i_usize| { const i = @intCast(Target.Cpu.Feature.Set.Index, i_usize); const in_cpu_set = populated_cpu_features.isEnabled(i); - const in_actual_set = cross.cpu_features.features.isEnabled(i); + const in_actual_set = cross.cpu.features.isEnabled(i); if (in_cpu_set and !in_actual_set) { - try feature_str_buffer.appendByte('-'); - try feature_str_buffer.append(feature.name); - try feature_str_buffer.appendByte(','); + try mcpu_buffer.appendByte('-'); + try mcpu_buffer.append(feature.name); } else if (!in_cpu_set and in_actual_set) { - try feature_str_buffer.appendByte('+'); - try feature_str_buffer.append(feature.name); - try feature_str_buffer.appendByte(','); + try mcpu_buffer.appendByte('+'); + try mcpu_buffer.append(feature.name); } } - if (mem.endsWith(u8, feature_str_buffer.toSliceConst(), ",")) { - feature_str_buffer.shrink(feature_str_buffer.len() - 1); - } - try zig_args.append(feature_str_buffer.toSliceConst()); + try zig_args.append(mcpu_buffer.toSliceConst()); } }, } diff --git a/src-self-hosted/stage2.zig b/src-self-hosted/stage2.zig index f7c4306cd5..683e698010 100644 --- a/src-self-hosted/stage2.zig +++ b/src-self-hosted/stage2.zig @@ -930,7 +930,7 @@ const Stage2Target = extern struct { const in_arch = in_target.arch - 1; // skip over ZigLLVM_UnknownArch const in_sub_arch = in_target.sub_arch - 1; // skip over ZigLLVM_NoSubArch const in_os = in_target.os; - const in_abi = in_target.abi - 1; // skip over ZigLLVM_UnknownEnvironment + const in_abi = in_target.abi; return .{ .Cross = .{ @@ -956,7 +956,7 @@ const Stage2Target = extern struct { self.sub_arch = 0; self.vendor = 0; self.os = @enumToInt(target.getOs()); - self.abi = @enumToInt(target.getAbi()) + 1; // skip over ZigLLVM_UnknownEnvironment + self.abi = @enumToInt(target.getAbi()); try initStage1TargetCpuFeatures(self, cpu); } }; diff --git a/test/compile_errors.zig b/test/compile_errors.zig index a204273313..56dde8dd8f 100644 --- a/test/compile_errors.zig +++ b/test/compile_errors.zig @@ -763,8 +763,7 @@ pub fn addCases(cases: *tests.CompileErrorContext) void { }); tc.target = Target{ .Cross = .{ - .arch = .x86_64, - .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), + .cpu = Target.Cpu.baseline(.x86_64), .os = .linux, .abi = .gnu, }, diff --git a/test/translate_c.zig b/test/translate_c.zig index 2351a6c94f..e3c68a6d53 100644 --- a/test/translate_c.zig +++ b/test/translate_c.zig @@ -1113,14 +1113,10 @@ pub fn addCases(cases: *tests.TranslateCContext) void { \\pub fn foo5(a: [*c]f32) callconv(.Thiscall) void; }); - cases.addWithTarget("Calling convention", tests.Target{ - .Cross = .{ - .os = .linux, - .arch = .{ .arm = .v8_5a }, - .abi = .none, - .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(), - }, - }, + cases.addWithTarget("Calling convention", Target.parse(.{ + .arch_os_abi = "arm-linux-none", + .cpu_features = "generic+v8_5a", + }) catch unreachable, \\void __attribute__((pcs("aapcs"))) foo1(float *a); \\void __attribute__((pcs("aapcs-vfp"))) foo2(float *a); , &[_][]const u8{ @@ -1128,14 +1124,10 @@ pub fn addCases(cases: *tests.TranslateCContext) void { \\pub fn foo2(a: [*c]f32) callconv(.AAPCSVFP) void; }); - cases.addWithTarget("Calling convention", tests.Target{ - .Cross = .{ - .os = .linux, - .arch = .{ .aarch64 = .v8_5a }, - .abi = .none, - .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(), - }, - }, + cases.addWithTarget("Calling convention", Target.parse(.{ + .arch_os_abi = "aarch64-linux-none", + .cpu_features = "generic+v8_5a", + }) catch unreachable, \\void __attribute__((aarch64_vector_pcs)) foo1(float *a); , &[_][]const u8{ \\pub fn foo1(a: [*c]f32) callconv(.Vectorcall) void;