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test: Disable some vector behavior tests on aarch64_be.
See: https://github.com/ziglang/zig/issues/21893
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@ -402,6 +402,7 @@ test "bitcast vector to integer and back" {
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if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
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if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
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const arr: [16]bool = [_]bool{ true, false } ++ [_]bool{true} ** 14;
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var x: @Vector(16, bool) = @splat(true);
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@ -1060,6 +1060,7 @@ test "@addWithOverflow" {
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
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if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
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const S = struct {
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fn doTheTest() !void {
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@ -1108,6 +1109,7 @@ test "@subWithOverflow" {
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
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if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
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const S = struct {
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fn doTheTest() !void {
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@ -1140,6 +1142,7 @@ test "@mulWithOverflow" {
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
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if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
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const S = struct {
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fn doTheTest() !void {
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@ -1162,6 +1165,7 @@ test "@shlWithOverflow" {
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
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if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
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const S = struct {
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fn doTheTest() !void {
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@ -1245,6 +1249,7 @@ test "byte vector initialized in inline function" {
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
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if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
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if (comptime builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and
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builtin.cpu.features.isEnabled(@intFromEnum(std.Target.x86.Feature.avx512f)))
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@ -1370,6 +1375,7 @@ test "store packed vector element" {
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if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
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if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
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var v = @Vector(4, u1){ 1, 1, 1, 1 };
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try expectEqual(@Vector(4, u1){ 1, 1, 1, 1 }, v);
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@ -1406,6 +1412,7 @@ test "store vector with memset" {
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if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
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if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
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var a: [5]@Vector(2, i1) = undefined;
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var b: [5]@Vector(2, u2) = undefined;
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