From 280195038a8f3a364ff95adb5d3799f586e5b695 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Sat, 27 Feb 2021 02:51:35 -0700
Subject: [PATCH] std.Target: add powerpcle

---
 lib/std/target.zig   | 16 ++++++++++------
 src/codegen/llvm.zig |  1 +
 src/target.zig       |  1 +
 3 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index 79d3b71464..e5bd87d048 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -722,6 +722,7 @@ pub const Target = struct {
             mips64el,
             msp430,
             powerpc,
+            powerpcle,
             powerpc64,
             powerpc64le,
             r600,
@@ -832,7 +833,7 @@ pub const Target = struct {
                     .le32 => ._NONE,
                     .mips => ._MIPS,
                     .mipsel => ._MIPS_RS3_LE,
-                    .powerpc => ._PPC,
+                    .powerpc, .powerpcle => ._PPC,
                     .r600 => ._NONE,
                     .riscv32 => ._RISCV,
                     .sparc => ._SPARC,
@@ -892,7 +893,7 @@ pub const Target = struct {
                     .le32 => .Unknown,
                     .mips => .Unknown,
                     .mipsel => .Unknown,
-                    .powerpc => .POWERPC,
+                    .powerpc, .powerpcle => .POWERPC,
                     .r600 => .Unknown,
                     .riscv32 => .RISCV32,
                     .sparc => .Unknown,
@@ -965,6 +966,7 @@ pub const Target = struct {
                     .nvptx64,
                     .sparcel,
                     .tcele,
+                    .powerpcle,
                     .powerpc64le,
                     .r600,
                     .riscv32,
@@ -1021,6 +1023,7 @@ pub const Target = struct {
                     .mips,
                     .mipsel,
                     .powerpc,
+                    .powerpcle,
                     .r600,
                     .riscv32,
                     .sparc,
@@ -1077,7 +1080,7 @@ pub const Target = struct {
                     .aarch64, .aarch64_be, .aarch64_32 => "aarch64",
                     .bpfel, .bpfeb => "bpf",
                     .mips, .mipsel, .mips64, .mips64el => "mips",
-                    .powerpc, .powerpc64, .powerpc64le => "powerpc",
+                    .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",
                     .amdgcn => "amdgpu",
                     .riscv32, .riscv64 => "riscv",
                     .sparc, .sparcv9, .sparcel => "sparc",
@@ -1100,7 +1103,7 @@ pub const Target = struct {
                     .hexagon => &hexagon.all_features,
                     .mips, .mipsel, .mips64, .mips64el => &mips.all_features,
                     .msp430 => &msp430.all_features,
-                    .powerpc, .powerpc64, .powerpc64le => &powerpc.all_features,
+                    .powerpc, .powerpcle, .powerpc64, .powerpc64le => &powerpc.all_features,
                     .amdgcn => &amdgpu.all_features,
                     .riscv32, .riscv64 => &riscv.all_features,
                     .sparc, .sparcv9, .sparcel => &sparc.all_features,
@@ -1124,7 +1127,7 @@ pub const Target = struct {
                     .hexagon => comptime allCpusFromDecls(hexagon.cpu),
                     .mips, .mipsel, .mips64, .mips64el => comptime allCpusFromDecls(mips.cpu),
                     .msp430 => comptime allCpusFromDecls(msp430.cpu),
-                    .powerpc, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu),
+                    .powerpc, .powerpcle, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu),
                     .amdgcn => comptime allCpusFromDecls(amdgpu.cpu),
                     .riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu),
                     .sparc, .sparcv9, .sparcel => comptime allCpusFromDecls(sparc.cpu),
@@ -1181,6 +1184,7 @@ pub const Target = struct {
                     .mips64, .mips64el => &mips.cpu.mips64,
                     .msp430 => &msp430.cpu.generic,
                     .powerpc => &powerpc.cpu.ppc32,
+                    .powerpcle => &powerpc.cpu.ppc32,
                     .powerpc64 => &powerpc.cpu.ppc64,
                     .powerpc64le => &powerpc.cpu.ppc64le,
                     .amdgcn => &amdgpu.cpu.generic,
@@ -1496,7 +1500,7 @@ pub const Target = struct {
                     return print(&result, "/lib{s}/{s}", .{ lib_suffix, loader });
                 },
 
-                .powerpc => return copy(&result, "/lib/ld.so.1"),
+                .powerpc, .powerpcle => return copy(&result, "/lib/ld.so.1"),
                 .powerpc64, .powerpc64le => return copy(&result, "/lib64/ld64.so.2"),
                 .s390x => return copy(&result, "/lib64/ld64.so.1"),
                 .sparcv9 => return copy(&result, "/lib64/ld-linux.so.2"),
diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
index 3caa95d466..217377ff94 100644
--- a/src/codegen/llvm.zig
+++ b/src/codegen/llvm.zig
@@ -34,6 +34,7 @@ pub fn targetTriple(allocator: *Allocator, target: std.Target) ![:0]u8 {
         .mips64el => "mips64el",
         .msp430 => "msp430",
         .powerpc => "powerpc",
+        .powerpcle => "powerpcle",
         .powerpc64 => "powerpc64",
         .powerpc64le => "powerpc64le",
         .r600 => "r600",
diff --git a/src/target.zig b/src/target.zig
index c1f8dd6247..2610acf862 100644
--- a/src/target.zig
+++ b/src/target.zig
@@ -246,6 +246,7 @@ pub fn archToLLVM(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
         .mips64el => .mips64el,
         .msp430 => .msp430,
         .powerpc => .ppc,
+        .powerpcle => .ppcle,
         .powerpc64 => .ppc64,
         .powerpc64le => .ppc64le,
         .r600 => .r600,