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zig.h: Introduce architecture macros to simplify checks throughout.
This commit is contained in:
Alex Rønne Petersen
parent
ba66814185
commit
24b57f4d30
137
lib/zig.h
137
lib/zig.h
@ -13,6 +13,61 @@
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#define zig_slimcc
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#endif
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#if defined(__aarch64__) || (defined(zig_msvc) && defined(_M_ARM64))
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#define zig_aarch64
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#elif defined(__thumb__) || (defined(zig_msvc) && defined(_M_ARM))
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#define zig_thumb
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#define zig_arm
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#elif defined(__arm__)
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#define zig_arm
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#elif defined(__hexagon__)
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#define zig_hexagon
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#elif defined(__loongarch32)
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#define zig_loongarch32
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#define zig_loongarch
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#elif defined(__loongarch64)
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#define zig_loongarch64
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#define zig_loongarch
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#elif defined(__mips64)
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#define zig_mips64
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#define zig_mips
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#elif defined(__mips__)
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#define zig_mips32
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#define zig_mips
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#elif defined(__powerpc64__)
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#define zig_powerpc64
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#define zig_powerpc
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#elif defined(__powerpc__)
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#define zig_powerpc32
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#define zig_powerpc
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#elif defined(__riscv) && __riscv_xlen == 32
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#define zig_riscv32
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#define zig_riscv
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#elif defined(__riscv) && __riscv_xlen == 64
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#define zig_riscv64
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#define zig_riscv
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#elif defined(__s390x__)
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#define zig_s390x
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#elif defined(__sparc__) && defined(__arch64__)
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#define zig_sparc64
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#define zig_sparc
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#elif defined(__sparc__)
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#define zig_sparc32
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#define zig_sparc
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#elif defined(__wasm32__)
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#define zig_wasm32
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#define zig_wasm
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#elif defined(__wasm64__)
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#define zig_wasm64
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#define zig_wasm
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#elif defined(__i386__) || (defined(zig_msvc) && defined(_M_IX86))
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#define zig_x86_32
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#define zig_x86
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#elif defined (__x86_64__) || (defined(zig_msvc) && defined(_M_X64))
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#define zig_x86_64
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#define zig_x86
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#endif
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#ifndef __STDC_WANT_IEC_60559_TYPES_EXT__
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#define __STDC_WANT_IEC_60559_TYPES_EXT__
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#endif
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@ -24,7 +79,7 @@
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#if defined(zig_msvc)
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#include <intrin.h>
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#elif defined(__i386__) || defined(__x86_64__)
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#elif defined(zig_x86)
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#include <cpuid.h>
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#endif
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@ -74,7 +129,7 @@ typedef char bool;
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#define zig_threadlocal zig_threadlocal_unavailable
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#endif
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#if !defined(zig_clang) && defined(zig_gnuc) && (defined(__i386__) || defined(__x86_64__))
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#if !defined(zig_clang) && defined(zig_gnuc) && defined(zig_x86)
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#define zig_f128_has_miscompilations 1
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#else
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#define zig_f128_has_miscompilations 0
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@ -195,11 +250,11 @@ typedef char bool;
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#endif
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#if defined(zig_msvc)
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#if _M_X64
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#if defined(zig_x86_64)
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#define zig_mangle_c(symbol) symbol
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#else /*_M_X64 */
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#else /* zig_x86_64 */
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#define zig_mangle_c(symbol) "_" symbol
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#endif /*_M_X64 */
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#endif /* zig_x86_64 */
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#else /* zig_msvc */
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#if __APPLE__
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#define zig_mangle_c(symbol) "_" symbol
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@ -259,27 +314,27 @@ typedef char bool;
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#if zig_has_builtin(trap)
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#define zig_trap() __builtin_trap()
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#elif defined(zig_msvc) && (defined(_M_IX86) || defined(_M_X64))
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#elif defined(zig_msvc) && defined(zig_x86)
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#define zig_trap() __ud2()
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#elif defined(zig_msvc)
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#define zig_trap() __fastfail(7)
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#elif defined(__thumb__)
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#elif defined(zig_thumb)
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#define zig_trap() __asm__ volatile("udf #0xfe")
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#elif defined(__arm__) || defined(__aarch64__)
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#elif defined(zig_arm) || defined(zig_aarch64)
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#define zig_trap() __asm__ volatile("udf #0xfdee")
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#elif defined(__hexagon__)
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#elif defined(zig_hexagon)
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#define zig_trap() __asm__ volatile("r27:26 = memd(#0xbadc0fee)")
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#elif defined(__loongarch__) || defined(__powerpc__)
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#elif defined(zig_loongarch) || defined(zig_powerpc)
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#define zig_trap() __asm__ volatile(".word 0x0")
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#elif defined(__mips__)
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#elif defined(zig_mips)
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#define zig_trap() __asm__ volatile(".word 0x3d")
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#elif defined(__riscv)
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#elif defined(zig_riscv)
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#define zig_trap() __asm__ volatile("unimp")
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#elif defined(__s390__)
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#elif defined(zig_s390x)
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#define zig_trap() __asm__ volatile("j 0x2")
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#elif defined(__sparc__)
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#elif defined(zig_sparc)
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#define zig_trap() __asm__ volatile("illtrap")
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#elif defined(__i386__) || defined(__x86_64__)
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#elif defined(zig_x86)
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#define zig_trap() __asm__ volatile("ud2")
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#else
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#define zig_trap() zig_trap_unavailable
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@ -289,25 +344,25 @@ typedef char bool;
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#define zig_breakpoint() __builtin_debugtrap()
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#elif defined(zig_msvc)
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#define zig_breakpoint() __debugbreak()
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#elif defined(__arm__)
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#elif defined(zig_arm)
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#define zig_breakpoint() __asm__ volatile("bkpt #0x0")
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#elif defined(__aarch64__)
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#elif defined(zig_aarch64)
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#define zig_breakpoint() __asm__ volatile("brk #0xf000")
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#elif defined(__hexagon__)
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#elif defined(zig_hexagon)
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#define zig_breakpoint() __asm__ volatile("brkpt")
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#elif defined(__loongarch__)
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#elif defined(zig_loongarch)
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#define zig_breakpoint() __asm__ volatile("break 0x0")
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#elif defined(__mips__)
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#elif defined(zig_mips)
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#define zig_breakpoint() __asm__ volatile("break")
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#elif defined(__powerpc__)
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#elif defined(zig_powerpc)
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#define zig_breakpoint() __asm__ volatile("trap")
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#elif defined(__riscv)
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#elif defined(zig_riscv)
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#define zig_breakpoint() __asm__ volatile("ebreak")
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#elif defined(__s390__)
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#elif defined(zig_s390x)
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#define zig_breakpoint() __asm__ volatile("j 0x6")
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#elif defined(__sparc__)
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#elif defined(zig_sparc)
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#define zig_breakpoint() __asm__ volatile("ta 0x1")
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#elif defined(__i386__) || defined(__x86_64__)
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#elif defined(zig_x86)
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#define zig_breakpoint() __asm__ volatile("int $0x3")
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#else
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#define zig_breakpoint() zig_breakpoint_unavailable
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@ -3095,7 +3150,7 @@ typedef uint16_t zig_f16;
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#undef zig_init_special_f16
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#define zig_init_special_f16(sign, name, arg, repr) repr
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#endif
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#if __APPLE__ && (defined(__i386__) || defined(__x86_64__))
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#if defined(__APPLE__) && defined(zig_x86)
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typedef uint16_t zig_compiler_rt_f16;
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#else
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typedef zig_f16 zig_compiler_rt_f16;
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@ -3228,7 +3283,7 @@ typedef __float128 zig_f128;
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#define zig_has_f128 0
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#undef zig_make_special_f128
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#undef zig_init_special_f128
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#if __APPLE__ || defined(__aarch64__)
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#if __APPLE__ || defined(zig_aarch64)
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typedef __attribute__((__vector_size__(2 * sizeof(uint64_t)))) uint64_t zig_v2u64;
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zig_basic_operator(zig_v2u64, xor_v2u64, ^)
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#define zig_repr_f128 v2u64
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@ -3650,7 +3705,7 @@ typedef int zig_memory_order;
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#define zig_atomic_load(res, obj, order, Type, ReprType) __atomic_load (obj, &(res), order)
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#undef zig_atomicrmw_xchg_float
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#define zig_atomicrmw_xchg_float zig_atomicrmw_xchg
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#elif defined(zig_msvc) && (_M_IX86 || _M_X64)
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#elif defined(zig_msvc) && defined(zig_x86)
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#define zig_memory_order_relaxed 0
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#define zig_memory_order_acquire 2
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#define zig_memory_order_release 3
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@ -3670,7 +3725,7 @@ typedef int zig_memory_order;
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#define zig_atomicrmw_max(res, obj, arg, order, Type, ReprType) res = zig_msvc_atomicrmw_max_ ##Type(obj, arg)
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#define zig_atomic_store( obj, arg, order, Type, ReprType) zig_msvc_atomic_store_ ##Type(obj, arg)
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#define zig_atomic_load(res, obj, order, Type, ReprType) res = zig_msvc_atomic_load_ ##order##_##Type(obj)
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/* TODO: zig_msvc && (_M_ARM || _M_ARM64) */
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/* TODO: zig_msvc && (zig_thumb || zig_aarch64) */
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#else
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#define zig_memory_order_relaxed 0
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#define zig_memory_order_acquire 2
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@ -3693,7 +3748,7 @@ typedef int zig_memory_order;
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#define zig_atomic_load(res, obj, order, Type, ReprType) zig_atomics_unavailable
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#endif
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#if defined(zig_msvc) && (_M_IX86 || _M_X64)
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#if defined(zig_msvc) && defined(zig_x86)
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/* TODO: zig_msvc_atomic_load should load 32 bit without interlocked on x86, and load 64 bit without interlocked on x64 */
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@ -3790,7 +3845,7 @@ zig_msvc_atomics(i16, int16_t, short, 16, 16)
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zig_msvc_atomics(u32, uint32_t, long, , 32)
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zig_msvc_atomics(i32, int32_t, long, , 32)
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#if _M_X64
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#if defined(zig_x86_64)
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zig_msvc_atomics(u64, uint64_t, __int64, 64, 64)
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zig_msvc_atomics(i64, int64_t, __int64, 64, 64)
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#endif
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@ -3835,11 +3890,11 @@ zig_msvc_atomics(i64, int64_t, __int64, 64, 64)
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}
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zig_msvc_flt_atomics(f32, long, , 32)
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#if _M_X64
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#if defined(zig_x86_64)
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zig_msvc_flt_atomics(f64, int64_t, 64, 64)
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#endif
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#if _M_IX86
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#if defined(zig_x86_32)
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static inline void zig_msvc_atomic_barrier() {
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int32_t barrier;
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__asm {
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@ -3876,7 +3931,7 @@ static inline bool zig_msvc_cmpxchg_p32(void volatile* obj, void* expected, void
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if (!success) *(void**)expected = initial;
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return success;
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}
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#else /* _M_IX86 */
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#else /* zig_x86_32 */
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static inline void* zig_msvc_atomicrmw_xchg_p64(void volatile* obj, void* arg) {
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return _InterlockedExchangePointer(obj, arg);
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}
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@ -3937,13 +3992,13 @@ static inline void zig_msvc_atomic_store_i128(zig_i128 volatile* obj, zig_i128 a
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while (!zig_cmpxchg_weak(obj, expected, arg, zig_memory_order_seq_cst, zig_memory_order_seq_cst, i128, zig_i128));
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}
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#endif /* _M_IX86 */
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#endif /* zig_x86_32 */
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#endif /* zig_msvc && (_M_IX86 || _M_X64) */
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#endif /* zig_msvc && zig_x86 */
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/* ======================== Special Case Intrinsics ========================= */
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#if defined(_M_ARM) || defined(__thumb__)
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#if defined(zig_thumb)
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static inline void* zig_thumb_windows_teb(void) {
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void* teb = 0;
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@ -3955,7 +4010,7 @@ static inline void* zig_thumb_windows_teb(void) {
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return teb;
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}
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#elif defined(_M_ARM64) || defined(__arch64__)
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#elif defined(zig_aarch64)
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static inline void* zig_aarch64_windows_teb(void) {
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void* teb = 0;
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@ -3967,7 +4022,7 @@ static inline void* zig_aarch64_windows_teb(void) {
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return teb;
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}
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#elif defined(_M_IX86) || defined(__i386__)
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#elif defined(zig_x86_32)
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static inline void* zig_x86_windows_teb(void) {
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void* teb = 0;
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@ -3979,7 +4034,7 @@ static inline void* zig_x86_windows_teb(void) {
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return teb;
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}
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#elif defined(_M_X64) || defined(__x86_64__)
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#elif defined(zig_x86_64)
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static inline void* zig_x86_64_windows_teb(void) {
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void* teb = 0;
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@ -3993,7 +4048,7 @@ static inline void* zig_x86_64_windows_teb(void) {
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#endif
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#if (defined(zig_msvc) && (_M_IX86 || _M_X64)) || defined(__i386__) || defined(__x86_64__)
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#if defined(zig_x86)
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static inline void zig_x86_cpuid(uint32_t leaf_id, uint32_t subid, uint32_t* eax, uint32_t* ebx, uint32_t* ecx, uint32_t* edx) {
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#if defined(zig_msvc)
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