diff --git a/lib/compiler/aro/aro/target.zig b/lib/compiler/aro/aro/target.zig
index 82dc3af430..ed729c1456 100644
--- a/lib/compiler/aro/aro/target.zig
+++ b/lib/compiler/aro/aro/target.zig
@@ -482,7 +482,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
         .nvptx,
         .spir,
         .kalimba,
-        .shave,
         .lanai,
         .wasm32,
         .aarch64_32,
@@ -522,7 +521,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
         .lanai,
         .m68k,
         .msp430,
-        .shave,
         .sparcel,
         .spu_2,
         .tce,
@@ -628,7 +626,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
         .spirv32 => "spirv32",
         .spirv64 => "spirv64",
         .kalimba => "kalimba",
-        .shave => "shave",
         .lanai => "lanai",
         .wasm32 => "wasm32",
         .wasm64 => "wasm64",
diff --git a/lib/std/Target.zig b/lib/std/Target.zig
index c69a730b2e..a545f0d038 100644
--- a/lib/std/Target.zig
+++ b/lib/std/Target.zig
@@ -1017,7 +1017,6 @@ pub const Cpu = struct {
         spirv32,
         spirv64,
         kalimba,
-        shave,
         lanai,
         wasm32,
         wasm64,
@@ -1154,7 +1153,6 @@ pub const Cpu = struct {
                 .nvptx => .NONE,
                 .spir => .NONE,
                 .kalimba => .CSR_KALIMBA,
-                .shave => .NONE,
                 .lanai => .LANAI,
                 .wasm32 => .NONE,
                 .aarch64_32 => .AARCH64,
@@ -1211,7 +1209,6 @@ pub const Cpu = struct {
                 .nvptx => .Unknown,
                 .spir => .Unknown,
                 .kalimba => .Unknown,
-                .shave => .Unknown,
                 .lanai => .Unknown,
                 .wasm32 => .Unknown,
                 .aarch64_32 => .ARM64,
@@ -1273,7 +1270,6 @@ pub const Cpu = struct {
                 .thumb,
                 .spir,
                 .spir64,
-                .shave,
                 .ve,
                 .spu_2,
                 // GPU bitness is opaque. For now, assume little endian.
@@ -1759,7 +1755,6 @@ pub const DynamicLinker = struct {
                 .spir,
                 .spir64,
                 .kalimba,
-                .shave,
                 .lanai,
                 .ve,
                 .dxil,
@@ -1860,7 +1855,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
         .nvptx,
         .spir,
         .kalimba,
-        .shave,
         .lanai,
         .wasm32,
         .aarch64_32,
@@ -2381,7 +2375,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
             .spir,
             .spirv32,
             .kalimba,
-            .shave,
             .ve,
             .spu_2,
             .xtensa,
@@ -2493,7 +2486,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
             .spir,
             .spirv32,
             .kalimba,
-            .shave,
             .ve,
             .spu_2,
             .xtensa,
diff --git a/src/Type.zig b/src/Type.zig
index 411e242628..1428d6c15f 100644
--- a/src/Type.zig
+++ b/src/Type.zig
@@ -1654,7 +1654,6 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
         .kalimba,
         .spirv,
         .spirv32,
-        .shave,
         .spir64,
         .ve,
         .spirv64,
diff --git a/src/Zcu.zig b/src/Zcu.zig
index 8d1d2a5130..825da89b14 100644
--- a/src/Zcu.zig
+++ b/src/Zcu.zig
@@ -3258,7 +3258,6 @@ pub fn atomicPtrAlignment(
         .spir,
         .kalimba,
         .lanai,
-        .shave,
         .wasm32,
         .csky,
         .spirv32,
diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
index 90a5d4bf62..802141892a 100644
--- a/src/codegen/llvm.zig
+++ b/src/codegen/llvm.zig
@@ -88,7 +88,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
         .spirv32 => "spirv32",
         .spirv64 => "spirv64",
         .kalimba => "kalimba",
-        .shave => "shave",
         .lanai => "lanai",
         .wasm32 => "wasm32",
         .wasm64 => "wasm64",
@@ -305,7 +304,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
         .spirv32 => .spirv32,
         .spirv64 => .spirv64,
         .kalimba => .kalimba,
-        .shave => .shave,
         .lanai => .lanai,
         .wasm32 => .wasm32,
         .wasm64 => .wasm64,
@@ -12080,7 +12078,6 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
         // LLVM backends that have no initialization functions.
         .tce,
         .tcele,
-        .shave,
         .spir,
         .spir64,
         .spirv,
diff --git a/src/target.zig b/src/target.zig
index dce8cab7b4..89e6069e21 100644
--- a/src/target.zig
+++ b/src/target.zig
@@ -158,7 +158,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
         .spirv32,
         .spirv64,
         .kalimba,
-        .shave,
         .lanai,
         .wasm32,
         .wasm64,