diff --git a/src/stage1/analyze.cpp b/src/stage1/analyze.cpp
index 04c064efe3..d5f57aee81 100644
--- a/src/stage1/analyze.cpp
+++ b/src/stage1/analyze.cpp
@@ -1016,6 +1016,7 @@ bool want_first_arg_sret(CodeGen *g, FnTypeId *fn_type_id) {
         target_is_arm(g->zig_target) ||
         target_is_riscv(g->zig_target) ||
         target_is_wasm(g->zig_target) ||
+        target_is_sparc(g->zig_target) ||
         target_is_ppc(g->zig_target))
     {
         X64CABIClass abi_class = type_c_abi_x86_64_class(g, fn_type_id->return_type);
@@ -1988,7 +1989,7 @@ static ZigType *analyze_fn_type(CodeGen *g, AstNode *proto_node, Scope *child_sc
             // behaviour when checking expected alignment with `@ptrToInt(fn_ptr)`
             // or similar. This commit proposes to make `align` expressions a
             // compile error when compiled to Wasm architecture.
-            // 
+            //
             // Some references:
             // [1] [Mozilla: WebAssembly Tables](https://developer.mozilla.org/en-US/docs/WebAssembly/Understanding_the_text_format#WebAssembly_tables)
             // [2] [Sunfishcode's Wasm Ref Manual](https://github.com/sunfishcode/wasm-reference-manual/blob/master/WebAssembly.md#indirect-call)
@@ -9044,7 +9045,7 @@ static void resolve_llvm_types_optional(CodeGen *g, ZigType *type, ResolveStatus
                 8 * child_type->abi_align,
                 val_offset_in_bits,
                 ZigLLVM_DIFlags_Zero, child_llvm_di_type);
-    di_element_types[maybe_null_index] = 
+    di_element_types[maybe_null_index] =
         ZigLLVMCreateDebugMemberType(g->dbuilder, ZigLLVMTypeToScope(type->llvm_di_type),
                 "maybe", di_file, line,
                 8*g->builtin_types.entry_bool->abi_size,
diff --git a/src/stage1/target.cpp b/src/stage1/target.cpp
index 433c988a01..f10e95d04c 100644
--- a/src/stage1/target.cpp
+++ b/src/stage1/target.cpp
@@ -1196,6 +1196,10 @@ bool target_is_riscv(const ZigTarget *target) {
     return target->arch == ZigLLVM_riscv32 || target->arch == ZigLLVM_riscv64;
 }
 
+bool target_is_sparc(const ZigTarget *target) {
+    return target->arch == ZigLLVM_sparc || target->arch == ZigLLVM_sparcv9;
+}
+
 bool target_is_mips(const ZigTarget *target) {
     return target->arch == ZigLLVM_mips || target->arch == ZigLLVM_mipsel ||
         target->arch == ZigLLVM_mips64 || target->arch == ZigLLVM_mips64el;
diff --git a/src/stage1/target.hpp b/src/stage1/target.hpp
index d34c2aeae5..099c3c1e78 100644
--- a/src/stage1/target.hpp
+++ b/src/stage1/target.hpp
@@ -86,6 +86,7 @@ bool target_is_glibc(const ZigTarget *target);
 bool target_is_musl(const ZigTarget *target);
 bool target_is_wasm(const ZigTarget *target);
 bool target_is_riscv(const ZigTarget *target);
+bool target_is_sparc(const ZigTarget *target);
 bool target_is_android(const ZigTarget *target);
 bool target_has_debug_info(const ZigTarget *target);
 const char *target_arch_musl_name(ZigLLVM_ArchType arch);