From 1fd41af356da74e35a9facf8f3c5d665887f8a1e Mon Sep 17 00:00:00 2001 From: joachimschmidt557 Date: Sat, 29 Jan 2022 13:03:53 +0100 Subject: [PATCH] stage2 RISCV64: Move to new regalloc freeze API --- src/arch/riscv64/CodeGen.zig | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/src/arch/riscv64/CodeGen.zig b/src/arch/riscv64/CodeGen.zig index eb99d479c2..330e821d4b 100644 --- a/src/arch/riscv64/CodeGen.zig +++ b/src/arch/riscv64/CodeGen.zig @@ -1208,14 +1208,16 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo .register => { return self.fail("TODO implement loading from MCValue.register", .{}); }, - .memory => |addr| { + .memory, + .stack_offset, + => { const reg = try self.register_manager.allocReg(null, &.{}); - try self.genSetReg(ptr_ty, reg, .{ .memory = addr }); + self.register_manager.freezeRegs(&.{reg}); + defer self.register_manager.unfreezeRegs(&.{reg}); + + try self.genSetReg(ptr_ty, reg, ptr); try self.load(dst_mcv, .{ .register = reg }, ptr_ty); }, - .stack_offset => { - return self.fail("TODO implement loading from MCValue.stack_offset", .{}); - }, } }