From 1f95c50d9a0c4c057780d387d57ac2ac40df1720 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Fri, 30 Jul 2021 17:48:24 -0700 Subject: [PATCH] codegen: cmp lowering treats bools the same as unsigned int fixes a crash when lowering `a == b` and they are of type bool. I'm not worried about floats; I think we will probably add separate AIR instructions for floats. --- src/codegen.zig | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/src/codegen.zig b/src/codegen.zig index bc3ff6257c..77672e82b0 100644 --- a/src/codegen.zig +++ b/src/codegen.zig @@ -2889,10 +2889,9 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { const src_mcv = try self.limitImmediateType(bin_op.rhs, i32); try self.genX8664BinMathCode(Type.initTag(.bool), dst_mcv, src_mcv, 7, 0x38); - const info = ty.intInfo(self.target.*); - break :result switch (info.signedness) { - .signed => MCValue{ .compare_flags_signed = op }, - .unsigned => MCValue{ .compare_flags_unsigned = op }, + break :result switch (ty.isSignedInt()) { + true => MCValue{ .compare_flags_signed = op }, + false => MCValue{ .compare_flags_unsigned = op }, }; }, .arm, .armeb => result: { @@ -2934,10 +2933,9 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { // The destination register is not present in the cmp instruction try self.genArmBinOpCode(undefined, lhs_mcv, rhs_mcv, false, .cmp_eq); - const info = ty.intInfo(self.target.*); - break :result switch (info.signedness) { - .signed => MCValue{ .compare_flags_signed = op }, - .unsigned => MCValue{ .compare_flags_unsigned = op }, + break :result switch (ty.isSignedInt()) { + true => MCValue{ .compare_flags_signed = op }, + false => MCValue{ .compare_flags_unsigned = op }, }; }, else => return self.fail("TODO implement cmp for {}", .{self.target.cpu.arch}),