From 1f2e3b39ae8ddd4ae7a969daa8c56949de81295e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= <alex@alexrp.com>
Date: Mon, 30 Jun 2025 07:04:35 +0200
Subject: [PATCH] test: Disable vector division operators on RISC-V with vector
 support

https://github.com/ziglang/zig/issues/24301
---
 test/behavior/vector.zig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/test/behavior/vector.zig b/test/behavior/vector.zig
index f2e5807267..ee8d6711e4 100644
--- a/test/behavior/vector.zig
+++ b/test/behavior/vector.zig
@@ -560,6 +560,7 @@ test "vector division operators" {
     if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
+    if (comptime builtin.cpu.has(.riscv, .v) and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/24301
 
     const S = struct {
         fn doTheTestDiv(comptime T: type, x: @Vector(4, T), y: @Vector(4, T)) !void {