From 01577a3af480cff02c5f78864f8056487b3d3b44 Mon Sep 17 00:00:00 2001 From: Shawn Landden Date: Sun, 21 Jul 2019 10:41:43 -0500 Subject: [PATCH 1/3] `@splat` --- src/all_types.hpp | 9 ++++ src/codegen.cpp | 17 +++++++ src/ir.cpp | 82 +++++++++++++++++++++++++++++++++ src/ir_print.cpp | 13 ++++++ test/compile_errors.zig | 10 ++++ test/stage1/behavior/vector.zig | 36 +++++++++++---- 6 files changed, 157 insertions(+), 10 deletions(-) diff --git a/src/all_types.hpp b/src/all_types.hpp index 7887c06158..464a1d6ba4 100644 --- a/src/all_types.hpp +++ b/src/all_types.hpp @@ -1612,6 +1612,7 @@ enum BuiltinFnId { BuiltinFnIdIntType, BuiltinFnIdVectorType, BuiltinFnIdShuffle, + BuiltinFnIdSplat, BuiltinFnIdSetCold, BuiltinFnIdSetRuntimeSafety, BuiltinFnIdSetFloatMode, @@ -2431,6 +2432,7 @@ enum IrInstructionId { IrInstructionIdIntType, IrInstructionIdVectorType, IrInstructionIdShuffleVector, + IrInstructionIdSplat, IrInstructionIdBoolNot, IrInstructionIdMemset, IrInstructionIdMemcpy, @@ -3681,6 +3683,13 @@ struct IrInstructionShuffleVector { IrInstruction *mask; // This is in zig-format, not llvm format }; +struct IrInstructionSplat { + IrInstruction base; + + IrInstruction *len; + IrInstruction *scalar; +}; + struct IrInstructionAssertZero { IrInstruction base; diff --git a/src/codegen.cpp b/src/codegen.cpp index 54c02b288a..49681c20c1 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -4619,6 +4619,20 @@ static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executabl llvm_mask_value, ""); } +static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInstructionSplat *instruction) { + uint64_t len = bigint_as_u64(&instruction->len->value.data.x_bigint); + LLVMValueRef wrapped_scalar_undef = LLVMGetUndef(instruction->base.value.type->llvm_type); + LLVMValueRef wrapped_scalar = LLVMBuildInsertElement(g->builder, wrapped_scalar_undef, + ir_llvm_value(g, instruction->scalar), + LLVMConstInt(LLVMInt32Type(), 0, false), + ""); + return LLVMBuildShuffleVector(g->builder, + wrapped_scalar, + wrapped_scalar_undef, + LLVMConstNull(LLVMVectorType(g->builtin_types.entry_u32->llvm_type, (uint32_t)len)), + ""); +} + static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutable *executable, IrInstructionPopCount *instruction) { ZigType *int_type = instruction->op->value.type; LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdPopCount); @@ -6146,6 +6160,8 @@ static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable, return ir_render_spill_end(g, executable, (IrInstructionSpillEnd *)instruction); case IrInstructionIdShuffleVector: return ir_render_shuffle_vector(g, executable, (IrInstructionShuffleVector *) instruction); + case IrInstructionIdSplat: + return ir_render_splat(g, executable, (IrInstructionSplat *) instruction); } zig_unreachable(); } @@ -7837,6 +7853,7 @@ static void define_builtin_fns(CodeGen *g) { create_builtin_fn(g, BuiltinFnIdIntType, "IntType", 2); // TODO rename to Int create_builtin_fn(g, BuiltinFnIdVectorType, "Vector", 2); create_builtin_fn(g, BuiltinFnIdShuffle, "shuffle", 4); + create_builtin_fn(g, BuiltinFnIdSplat, "splat", 2); create_builtin_fn(g, BuiltinFnIdSetCold, "setCold", 1); create_builtin_fn(g, BuiltinFnIdSetRuntimeSafety, "setRuntimeSafety", 1); create_builtin_fn(g, BuiltinFnIdSetFloatMode, "setFloatMode", 1); diff --git a/src/ir.cpp b/src/ir.cpp index 1eba53ef45..8fca50c6f7 100644 --- a/src/ir.cpp +++ b/src/ir.cpp @@ -721,6 +721,10 @@ static constexpr IrInstructionId ir_instruction_id(IrInstructionShuffleVector *) return IrInstructionIdShuffleVector; } +static constexpr IrInstructionId ir_instruction_id(IrInstructionSplat *) { + return IrInstructionIdSplat; +} + static constexpr IrInstructionId ir_instruction_id(IrInstructionBoolNot *) { return IrInstructionIdBoolNot; } @@ -2300,6 +2304,19 @@ static IrInstruction *ir_build_shuffle_vector(IrBuilder *irb, Scope *scope, AstN return &instruction->base; } +static IrInstruction *ir_build_splat(IrBuilder *irb, Scope *scope, AstNode *source_node, + IrInstruction *len, IrInstruction *scalar) +{ + IrInstructionSplat *instruction = ir_build_instruction(irb, scope, source_node); + instruction->len = len; + instruction->scalar = scalar; + + ir_ref_instruction(len, irb->current_basic_block); + ir_ref_instruction(scalar, irb->current_basic_block); + + return &instruction->base; +} + static IrInstruction *ir_build_bool_not(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) { IrInstructionBoolNot *instruction = ir_build_instruction(irb, scope, source_node); instruction->value = value; @@ -4985,6 +5002,22 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo arg0_value, arg1_value, arg2_value, arg3_value); return ir_lval_wrap(irb, scope, shuffle_vector, lval, result_loc); } + case BuiltinFnIdSplat: + { + AstNode *arg0_node = node->data.fn_call_expr.params.at(0); + IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope); + if (arg0_value == irb->codegen->invalid_instruction) + return arg0_value; + + AstNode *arg1_node = node->data.fn_call_expr.params.at(1); + IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope); + if (arg1_value == irb->codegen->invalid_instruction) + return arg1_value; + + IrInstruction *splat = ir_build_splat(irb, scope, node, + arg0_value, arg1_value); + return ir_lval_wrap(irb, scope, splat, lval, result_loc); + } case BuiltinFnIdMemcpy: { AstNode *arg0_node = node->data.fn_call_expr.params.at(0); @@ -22324,6 +22357,52 @@ static IrInstruction *ir_analyze_instruction_shuffle_vector(IrAnalyze *ira, IrIn return ir_analyze_shuffle_vector(ira, &instruction->base, scalar_type, a, b, mask); } +static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstructionSplat *instruction) { + IrInstruction *len = instruction->len->child; + if (type_is_invalid(len->value.type)) + return ira->codegen->invalid_instruction; + + IrInstruction *scalar = instruction->scalar->child; + if (type_is_invalid(scalar->value.type)) + return ira->codegen->invalid_instruction; + + uint64_t len_int; + if (!ir_resolve_unsigned(ira, len, ira->codegen->builtin_types.entry_u32, &len_int)) { + ir_add_error(ira, len, + buf_sprintf("splat length must be comptime")); + return ira->codegen->invalid_instruction; + } + + if (!is_valid_vector_elem_type(scalar->value.type)) { + ir_add_error(ira, len, + buf_sprintf("vector element type must be integer, float, bool, or pointer; '%s' is invalid", + buf_ptr(&scalar->value.type->name))); + return ira->codegen->invalid_instruction; + } + + ZigType *return_type = get_vector_type(ira->codegen, len_int, scalar->value.type); + + if (instr_is_comptime(scalar)) { + IrInstruction *result = ir_const_undef(ira, scalar, return_type); + result->value.data.x_array.data.s_none.elements = + allocate(len_int); + for (uint32_t i = 0; i < len_int; i++) { + result->value.data.x_array.data.s_none.elements[i] = + scalar->value; + } + result->value.type = return_type; + result->value.special = ConstValSpecialStatic; + return result; + } + + IrInstruction *result = ir_build_splat(&ira->new_irb, + instruction->base.scope, instruction->base.source_node, + instruction->len->child, instruction->scalar->child); + result->value.type = return_type; + result->value.special = ConstValSpecialRuntime; + return result; +} + static IrInstruction *ir_analyze_instruction_bool_not(IrAnalyze *ira, IrInstructionBoolNot *instruction) { IrInstruction *value = instruction->value->child; if (type_is_invalid(value->value.type)) @@ -25908,6 +25987,8 @@ static IrInstruction *ir_analyze_instruction_base(IrAnalyze *ira, IrInstruction return ir_analyze_instruction_vector_type(ira, (IrInstructionVectorType *)instruction); case IrInstructionIdShuffleVector: return ir_analyze_instruction_shuffle_vector(ira, (IrInstructionShuffleVector *)instruction); + case IrInstructionIdSplat: + return ir_analyze_instruction_splat(ira, (IrInstructionSplat *)instruction); case IrInstructionIdBoolNot: return ir_analyze_instruction_bool_not(ira, (IrInstructionBoolNot *)instruction); case IrInstructionIdMemset: @@ -26244,6 +26325,7 @@ bool ir_has_side_effects(IrInstruction *instruction) { case IrInstructionIdIntType: case IrInstructionIdVectorType: case IrInstructionIdShuffleVector: + case IrInstructionIdSplat: case IrInstructionIdBoolNot: case IrInstructionIdSliceSrc: case IrInstructionIdMemberCount: diff --git a/src/ir_print.cpp b/src/ir_print.cpp index 8561ed4508..0dee7d342a 100644 --- a/src/ir_print.cpp +++ b/src/ir_print.cpp @@ -44,6 +44,8 @@ static const char* ir_instruction_type_str(IrInstruction* instruction) { return "Invalid"; case IrInstructionIdShuffleVector: return "Shuffle"; + case IrInstructionIdSplat: + return "Splat"; case IrInstructionIdDeclVarSrc: return "DeclVarSrc"; case IrInstructionIdDeclVarGen: @@ -1222,6 +1224,14 @@ static void ir_print_shuffle_vector(IrPrint *irp, IrInstructionShuffleVector *in fprintf(irp->f, ")"); } +static void ir_print_splat(IrPrint *irp, IrInstructionSplat *instruction) { + fprintf(irp->f, "@splat("); + ir_print_other_instruction(irp, instruction->len); + fprintf(irp->f, ", "); + ir_print_other_instruction(irp, instruction->scalar); + fprintf(irp->f, ")"); +} + static void ir_print_bool_not(IrPrint *irp, IrInstructionBoolNot *instruction) { fprintf(irp->f, "! "); ir_print_other_instruction(irp, instruction->value); @@ -2160,6 +2170,9 @@ static void ir_print_instruction(IrPrint *irp, IrInstruction *instruction, bool case IrInstructionIdShuffleVector: ir_print_shuffle_vector(irp, (IrInstructionShuffleVector *)instruction); break; + case IrInstructionIdSplat: + ir_print_splat(irp, (IrInstructionSplat *)instruction); + break; case IrInstructionIdBoolNot: ir_print_bool_not(irp, (IrInstructionBoolNot *)instruction); break; diff --git a/test/compile_errors.zig b/test/compile_errors.zig index 1fe3fc58ab..2909bffc3b 100644 --- a/test/compile_errors.zig +++ b/test/compile_errors.zig @@ -6507,6 +6507,16 @@ pub fn addCases(cases: *tests.CompileErrorContext) void { "tmp.zig:2:26: error: vector element type must be integer, float, bool, or pointer; '@Vector(4, u8)' is invalid", ); + cases.addTest( + "bad @splat type", + \\export fn entry() void { + \\ const c = 4; + \\ var v = @splat(4, c); + \\} + , + "tmp.zig:3:20: error: vector element type must be integer, float, bool, or pointer; 'comptime_int' is invalid", + ); + cases.add("compileLog of tagged enum doesn't crash the compiler", \\const Bar = union(enum(u32)) { \\ X: i32 = 1 diff --git a/test/stage1/behavior/vector.zig b/test/stage1/behavior/vector.zig index 27277b5e52..88a332d87b 100644 --- a/test/stage1/behavior/vector.zig +++ b/test/stage1/behavior/vector.zig @@ -35,12 +35,12 @@ test "vector bin compares with mem.eql" { fn doTheTest() void { var v: @Vector(4, i32) = [4]i32{ 2147483647, -2, 30, 40 }; var x: @Vector(4, i32) = [4]i32{ 1, 2147483647, 30, 4 }; - expect(mem.eql(bool, ([4]bool)(v == x), [4]bool{ false, false, true, false})); - expect(mem.eql(bool, ([4]bool)(v != x), [4]bool{ true, true, false, true})); - expect(mem.eql(bool, ([4]bool)(v < x), [4]bool{ false, true, false, false})); - expect(mem.eql(bool, ([4]bool)(v > x), [4]bool{ true, false, false, true})); - expect(mem.eql(bool, ([4]bool)(v <= x), [4]bool{ false, true, true, false})); - expect(mem.eql(bool, ([4]bool)(v >= x), [4]bool{ true, false, true, true})); + expect(mem.eql(bool, ([4]bool)(v == x), [4]bool{ false, false, true, false })); + expect(mem.eql(bool, ([4]bool)(v != x), [4]bool{ true, true, false, true })); + expect(mem.eql(bool, ([4]bool)(v < x), [4]bool{ false, true, false, false })); + expect(mem.eql(bool, ([4]bool)(v > x), [4]bool{ true, false, false, true })); + expect(mem.eql(bool, ([4]bool)(v <= x), [4]bool{ false, true, true, false })); + expect(mem.eql(bool, ([4]bool)(v >= x), [4]bool{ true, false, true, true })); } }; S.doTheTest(); @@ -114,22 +114,22 @@ test "vector casts of sizes not divisable by 8" { const S = struct { fn doTheTest() void { { - var v: @Vector(4, u3) = [4]u3{ 5, 2, 3, 0}; + var v: @Vector(4, u3) = [4]u3{ 5, 2, 3, 0 }; var x: [4]u3 = v; expect(mem.eql(u3, x, ([4]u3)(v))); } { - var v: @Vector(4, u2) = [4]u2{ 1, 2, 3, 0}; + var v: @Vector(4, u2) = [4]u2{ 1, 2, 3, 0 }; var x: [4]u2 = v; expect(mem.eql(u2, x, ([4]u2)(v))); } { - var v: @Vector(4, u1) = [4]u1{ 1, 0, 1, 0}; + var v: @Vector(4, u1) = [4]u1{ 1, 0, 1, 0 }; var x: [4]u1 = v; expect(mem.eql(u1, x, ([4]u1)(v))); } { - var v: @Vector(4, bool) = [4]bool{ false, false, true, false}; + var v: @Vector(4, bool) = [4]bool{ false, false, true, false }; var x: [4]bool = v; expect(mem.eql(bool, x, ([4]bool)(v))); } @@ -138,3 +138,19 @@ test "vector casts of sizes not divisable by 8" { S.doTheTest(); comptime S.doTheTest(); } + +test "vector @splat" { + const S = struct { + fn doTheTest() void { + var v: u32 = 5; + var x = @splat(4, v); + expect(@typeOf(x) == @Vector(4, u32)); + expect(x[0] == 5); + expect(x[1] == 5); + expect(x[2] == 5); + expect(x[3] == 5); + } + }; + S.doTheTest(); + comptime S.doTheTest(); +} From 005a54a853a77b9c28551490fc08dc37cd7d7715 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Thu, 19 Sep 2019 10:48:04 -0400 Subject: [PATCH 2/3] fixups for `@splat` * Fix codegen for splat - instead of giving vectors of length N to shufflevector for both of the operands, it gives vectors of length 1. The mask vector is the only one that needs N elements. * Separate Splat into SplatSrc and SplatGen; the `len` is not needed once it gets to codegen since it is redundant with the result type. * Refactor compile error for wrong vector element type so that the compile error message is not duplicated in zig source code * Improve implementation to correctly handle comptime values such as undefined and lazy values. * Improve compile error for bad vector element type to point to the correct place. * Delete dead code. * Modify behavior test to use an array cast instead of vector element indexing since I'm merging this splat commit out-of-order from Shawn's patch set. --- src/all_types.hpp | 11 +++- src/codegen.cpp | 27 +++++----- src/ir.cpp | 95 ++++++++++++++++++++------------- src/ir_print.cpp | 21 ++++++-- test/compile_errors.zig | 2 +- test/stage1/behavior/vector.zig | 9 ++-- 6 files changed, 101 insertions(+), 64 deletions(-) diff --git a/src/all_types.hpp b/src/all_types.hpp index 464a1d6ba4..695f22ac90 100644 --- a/src/all_types.hpp +++ b/src/all_types.hpp @@ -2432,7 +2432,8 @@ enum IrInstructionId { IrInstructionIdIntType, IrInstructionIdVectorType, IrInstructionIdShuffleVector, - IrInstructionIdSplat, + IrInstructionIdSplatSrc, + IrInstructionIdSplatGen, IrInstructionIdBoolNot, IrInstructionIdMemset, IrInstructionIdMemcpy, @@ -3683,13 +3684,19 @@ struct IrInstructionShuffleVector { IrInstruction *mask; // This is in zig-format, not llvm format }; -struct IrInstructionSplat { +struct IrInstructionSplatSrc { IrInstruction base; IrInstruction *len; IrInstruction *scalar; }; +struct IrInstructionSplatGen { + IrInstruction base; + + IrInstruction *scalar; +}; + struct IrInstructionAssertZero { IrInstruction base; diff --git a/src/codegen.cpp b/src/codegen.cpp index 49681c20c1..b0817e8eb8 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -4619,18 +4619,16 @@ static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executabl llvm_mask_value, ""); } -static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInstructionSplat *instruction) { - uint64_t len = bigint_as_u64(&instruction->len->value.data.x_bigint); - LLVMValueRef wrapped_scalar_undef = LLVMGetUndef(instruction->base.value.type->llvm_type); - LLVMValueRef wrapped_scalar = LLVMBuildInsertElement(g->builder, wrapped_scalar_undef, - ir_llvm_value(g, instruction->scalar), - LLVMConstInt(LLVMInt32Type(), 0, false), - ""); - return LLVMBuildShuffleVector(g->builder, - wrapped_scalar, - wrapped_scalar_undef, - LLVMConstNull(LLVMVectorType(g->builtin_types.entry_u32->llvm_type, (uint32_t)len)), - ""); +static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInstructionSplatGen *instruction) { + ZigType *result_type = instruction->base.value.type; + src_assert(result_type->id == ZigTypeIdVector, instruction->base.source_node); + uint32_t len = result_type->data.vector.len; + LLVMTypeRef op_llvm_type = LLVMVectorType(get_llvm_type(g, instruction->scalar->value.type), 1); + LLVMTypeRef mask_llvm_type = LLVMVectorType(LLVMInt32Type(), len); + LLVMValueRef undef_vector = LLVMGetUndef(op_llvm_type); + LLVMValueRef op_vector = LLVMBuildInsertElement(g->builder, undef_vector, + ir_llvm_value(g, instruction->scalar), LLVMConstInt(LLVMInt32Type(), 0, false), ""); + return LLVMBuildShuffleVector(g->builder, op_vector, undef_vector, LLVMConstNull(mask_llvm_type), ""); } static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutable *executable, IrInstructionPopCount *instruction) { @@ -6000,6 +5998,7 @@ static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable, case IrInstructionIdFrameSizeSrc: case IrInstructionIdAllocaGen: case IrInstructionIdAwaitSrc: + case IrInstructionIdSplatSrc: zig_unreachable(); case IrInstructionIdDeclVarGen: @@ -6160,8 +6159,8 @@ static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable, return ir_render_spill_end(g, executable, (IrInstructionSpillEnd *)instruction); case IrInstructionIdShuffleVector: return ir_render_shuffle_vector(g, executable, (IrInstructionShuffleVector *) instruction); - case IrInstructionIdSplat: - return ir_render_splat(g, executable, (IrInstructionSplat *) instruction); + case IrInstructionIdSplatGen: + return ir_render_splat(g, executable, (IrInstructionSplatGen *) instruction); } zig_unreachable(); } diff --git a/src/ir.cpp b/src/ir.cpp index 8fca50c6f7..0c48a2f982 100644 --- a/src/ir.cpp +++ b/src/ir.cpp @@ -721,8 +721,12 @@ static constexpr IrInstructionId ir_instruction_id(IrInstructionShuffleVector *) return IrInstructionIdShuffleVector; } -static constexpr IrInstructionId ir_instruction_id(IrInstructionSplat *) { - return IrInstructionIdSplat; +static constexpr IrInstructionId ir_instruction_id(IrInstructionSplatSrc *) { + return IrInstructionIdSplatSrc; +} + +static constexpr IrInstructionId ir_instruction_id(IrInstructionSplatGen *) { + return IrInstructionIdSplatGen; } static constexpr IrInstructionId ir_instruction_id(IrInstructionBoolNot *) { @@ -2304,10 +2308,10 @@ static IrInstruction *ir_build_shuffle_vector(IrBuilder *irb, Scope *scope, AstN return &instruction->base; } -static IrInstruction *ir_build_splat(IrBuilder *irb, Scope *scope, AstNode *source_node, +static IrInstruction *ir_build_splat_src(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *len, IrInstruction *scalar) { - IrInstructionSplat *instruction = ir_build_instruction(irb, scope, source_node); + IrInstructionSplatSrc *instruction = ir_build_instruction(irb, scope, source_node); instruction->len = len; instruction->scalar = scalar; @@ -2373,6 +2377,19 @@ static IrInstruction *ir_build_slice_src(IrBuilder *irb, Scope *scope, AstNode * return &instruction->base; } +static IrInstruction *ir_build_splat_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type, + IrInstruction *scalar) +{ + IrInstructionSplatGen *instruction = ir_build_instruction( + &ira->new_irb, source_instruction->scope, source_instruction->source_node); + instruction->base.value.type = result_type; + instruction->scalar = scalar; + + ir_ref_instruction(scalar, ira->new_irb.current_basic_block); + + return &instruction->base; +} + static IrInstruction *ir_build_slice_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *slice_type, IrInstruction *ptr, IrInstruction *start, IrInstruction *end, bool safety_check_on, IrInstruction *result_loc) { @@ -5014,7 +5031,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo if (arg1_value == irb->codegen->invalid_instruction) return arg1_value; - IrInstruction *splat = ir_build_splat(irb, scope, node, + IrInstruction *splat = ir_build_splat_src(irb, scope, node, arg0_value, arg1_value); return ir_lval_wrap(irb, scope, splat, lval, result_loc); } @@ -11082,16 +11099,23 @@ static ZigType *ir_resolve_type(IrAnalyze *ira, IrInstruction *type_value) { return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, type_value->source_node, val); } +static Error ir_validate_vector_elem_type(IrAnalyze *ira, IrInstruction *source_instr, ZigType *elem_type) { + if (!is_valid_vector_elem_type(elem_type)) { + ir_add_error(ira, source_instr, + buf_sprintf("vector element type must be integer, float, bool, or pointer; '%s' is invalid", + buf_ptr(&elem_type->name))); + return ErrorSemanticAnalyzeFail; + } + return ErrorNone; +} + static ZigType *ir_resolve_vector_elem_type(IrAnalyze *ira, IrInstruction *elem_type_value) { + Error err; ZigType *elem_type = ir_resolve_type(ira, elem_type_value); if (type_is_invalid(elem_type)) return ira->codegen->builtin_types.entry_invalid; - if (!is_valid_vector_elem_type(elem_type)) { - ir_add_error(ira, elem_type_value, - buf_sprintf("vector element type must be integer, float, bool, or pointer; '%s' is invalid", - buf_ptr(&elem_type->name))); + if ((err = ir_validate_vector_elem_type(ira, elem_type_value, elem_type))) return ira->codegen->builtin_types.entry_invalid; - } return elem_type; } @@ -22357,7 +22381,9 @@ static IrInstruction *ir_analyze_instruction_shuffle_vector(IrAnalyze *ira, IrIn return ir_analyze_shuffle_vector(ira, &instruction->base, scalar_type, a, b, mask); } -static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstructionSplat *instruction) { +static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstructionSplatSrc *instruction) { + Error err; + IrInstruction *len = instruction->len->child; if (type_is_invalid(len->value.type)) return ira->codegen->invalid_instruction; @@ -22366,41 +22392,32 @@ static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstruction if (type_is_invalid(scalar->value.type)) return ira->codegen->invalid_instruction; - uint64_t len_int; - if (!ir_resolve_unsigned(ira, len, ira->codegen->builtin_types.entry_u32, &len_int)) { - ir_add_error(ira, len, - buf_sprintf("splat length must be comptime")); + uint64_t len_u64; + if (!ir_resolve_unsigned(ira, len, ira->codegen->builtin_types.entry_u32, &len_u64)) return ira->codegen->invalid_instruction; - } + uint32_t len_int = len_u64; - if (!is_valid_vector_elem_type(scalar->value.type)) { - ir_add_error(ira, len, - buf_sprintf("vector element type must be integer, float, bool, or pointer; '%s' is invalid", - buf_ptr(&scalar->value.type->name))); + if ((err = ir_validate_vector_elem_type(ira, scalar, scalar->value.type))) return ira->codegen->invalid_instruction; - } ZigType *return_type = get_vector_type(ira->codegen, len_int, scalar->value.type); if (instr_is_comptime(scalar)) { - IrInstruction *result = ir_const_undef(ira, scalar, return_type); - result->value.data.x_array.data.s_none.elements = - allocate(len_int); - for (uint32_t i = 0; i < len_int; i++) { - result->value.data.x_array.data.s_none.elements[i] = - scalar->value; + ConstExprValue *scalar_val = ir_resolve_const(ira, scalar, UndefOk); + if (scalar_val == nullptr) + return ira->codegen->invalid_instruction; + if (scalar_val->special == ConstValSpecialUndef) + return ir_const_undef(ira, &instruction->base, return_type); + + IrInstruction *result = ir_const(ira, &instruction->base, return_type); + result->value.data.x_array.data.s_none.elements = create_const_vals(len_int); + for (uint32_t i = 0; i < len_int; i += 1) { + copy_const_val(&result->value.data.x_array.data.s_none.elements[i], scalar_val, false); } - result->value.type = return_type; - result->value.special = ConstValSpecialStatic; return result; } - IrInstruction *result = ir_build_splat(&ira->new_irb, - instruction->base.scope, instruction->base.source_node, - instruction->len->child, instruction->scalar->child); - result->value.type = return_type; - result->value.special = ConstValSpecialRuntime; - return result; + return ir_build_splat_gen(ira, &instruction->base, return_type, scalar); } static IrInstruction *ir_analyze_instruction_bool_not(IrAnalyze *ira, IrInstructionBoolNot *instruction) { @@ -25857,6 +25874,7 @@ static IrInstruction *ir_analyze_instruction_base(IrAnalyze *ira, IrInstruction case IrInstructionIdTestErrGen: case IrInstructionIdFrameSizeGen: case IrInstructionIdAwaitGen: + case IrInstructionIdSplatGen: zig_unreachable(); case IrInstructionIdReturn: @@ -25987,8 +26005,8 @@ static IrInstruction *ir_analyze_instruction_base(IrAnalyze *ira, IrInstruction return ir_analyze_instruction_vector_type(ira, (IrInstructionVectorType *)instruction); case IrInstructionIdShuffleVector: return ir_analyze_instruction_shuffle_vector(ira, (IrInstructionShuffleVector *)instruction); - case IrInstructionIdSplat: - return ir_analyze_instruction_splat(ira, (IrInstructionSplat *)instruction); + case IrInstructionIdSplatSrc: + return ir_analyze_instruction_splat(ira, (IrInstructionSplatSrc *)instruction); case IrInstructionIdBoolNot: return ir_analyze_instruction_bool_not(ira, (IrInstructionBoolNot *)instruction); case IrInstructionIdMemset: @@ -26325,7 +26343,8 @@ bool ir_has_side_effects(IrInstruction *instruction) { case IrInstructionIdIntType: case IrInstructionIdVectorType: case IrInstructionIdShuffleVector: - case IrInstructionIdSplat: + case IrInstructionIdSplatSrc: + case IrInstructionIdSplatGen: case IrInstructionIdBoolNot: case IrInstructionIdSliceSrc: case IrInstructionIdMemberCount: diff --git a/src/ir_print.cpp b/src/ir_print.cpp index 0dee7d342a..aae65d50a9 100644 --- a/src/ir_print.cpp +++ b/src/ir_print.cpp @@ -44,8 +44,10 @@ static const char* ir_instruction_type_str(IrInstruction* instruction) { return "Invalid"; case IrInstructionIdShuffleVector: return "Shuffle"; - case IrInstructionIdSplat: - return "Splat"; + case IrInstructionIdSplatSrc: + return "SplatSrc"; + case IrInstructionIdSplatGen: + return "SplatGen"; case IrInstructionIdDeclVarSrc: return "DeclVarSrc"; case IrInstructionIdDeclVarGen: @@ -1224,7 +1226,7 @@ static void ir_print_shuffle_vector(IrPrint *irp, IrInstructionShuffleVector *in fprintf(irp->f, ")"); } -static void ir_print_splat(IrPrint *irp, IrInstructionSplat *instruction) { +static void ir_print_splat_src(IrPrint *irp, IrInstructionSplatSrc *instruction) { fprintf(irp->f, "@splat("); ir_print_other_instruction(irp, instruction->len); fprintf(irp->f, ", "); @@ -1232,6 +1234,12 @@ static void ir_print_splat(IrPrint *irp, IrInstructionSplat *instruction) { fprintf(irp->f, ")"); } +static void ir_print_splat_gen(IrPrint *irp, IrInstructionSplatGen *instruction) { + fprintf(irp->f, "@splat("); + ir_print_other_instruction(irp, instruction->scalar); + fprintf(irp->f, ")"); +} + static void ir_print_bool_not(IrPrint *irp, IrInstructionBoolNot *instruction) { fprintf(irp->f, "! "); ir_print_other_instruction(irp, instruction->value); @@ -2170,8 +2178,11 @@ static void ir_print_instruction(IrPrint *irp, IrInstruction *instruction, bool case IrInstructionIdShuffleVector: ir_print_shuffle_vector(irp, (IrInstructionShuffleVector *)instruction); break; - case IrInstructionIdSplat: - ir_print_splat(irp, (IrInstructionSplat *)instruction); + case IrInstructionIdSplatSrc: + ir_print_splat_src(irp, (IrInstructionSplatSrc *)instruction); + break; + case IrInstructionIdSplatGen: + ir_print_splat_gen(irp, (IrInstructionSplatGen *)instruction); break; case IrInstructionIdBoolNot: ir_print_bool_not(irp, (IrInstructionBoolNot *)instruction); diff --git a/test/compile_errors.zig b/test/compile_errors.zig index 2909bffc3b..034800fd4c 100644 --- a/test/compile_errors.zig +++ b/test/compile_errors.zig @@ -6514,7 +6514,7 @@ pub fn addCases(cases: *tests.CompileErrorContext) void { \\ var v = @splat(4, c); \\} , - "tmp.zig:3:20: error: vector element type must be integer, float, bool, or pointer; 'comptime_int' is invalid", + "tmp.zig:3:23: error: vector element type must be integer, float, bool, or pointer; 'comptime_int' is invalid", ); cases.add("compileLog of tagged enum doesn't crash the compiler", diff --git a/test/stage1/behavior/vector.zig b/test/stage1/behavior/vector.zig index 88a332d87b..d3a771fca8 100644 --- a/test/stage1/behavior/vector.zig +++ b/test/stage1/behavior/vector.zig @@ -145,10 +145,11 @@ test "vector @splat" { var v: u32 = 5; var x = @splat(4, v); expect(@typeOf(x) == @Vector(4, u32)); - expect(x[0] == 5); - expect(x[1] == 5); - expect(x[2] == 5); - expect(x[3] == 5); + var array_x: [4]u32 = x; + expect(array_x[0] == 5); + expect(array_x[1] == 5); + expect(array_x[2] == 5); + expect(array_x[3] == 5); } }; S.doTheTest(); From 28c7fe60b6de6e3c32e082a0abfb5a7bac8fc45a Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Thu, 19 Sep 2019 11:14:42 -0400 Subject: [PATCH 3/3] add docs for `@splat` --- doc/langref.html.in | 36 ++++++++++++++++++++++++++++++------ 1 file changed, 30 insertions(+), 6 deletions(-) diff --git a/doc/langref.html.in b/doc/langref.html.in index 61fc06fd02..1158135dab 100644 --- a/doc/langref.html.in +++ b/doc/langref.html.in @@ -5864,7 +5864,7 @@ volatile ( : [number] "{rax}" (number), [arg1] "{rdi}" (arg1) // Next is the list of clobbers. These declare a set of registers whose -// values will not be preserved by the execution of this assembly code. +// values will not be preserved by the execution of this assembly code. // These do not include output or input registers. The special clobber // value of "memory" means that the assembly writes to arbitrary undeclared // memory locations - not only the memory pointed to by a declared indirect @@ -5885,7 +5885,7 @@ volatile (

{#header_open|Output Constraints#}

- Output constraints are still considered to be unstable in Zig, and + Output constraints are still considered to be unstable in Zig, and so LLVM documentation and @@ -5900,7 +5900,7 @@ volatile ( {#header_open|Input Constraints#}

- Input constraints are still considered to be unstable in Zig, and + Input constraints are still considered to be unstable in Zig, and so LLVM documentation and @@ -5919,7 +5919,7 @@ volatile ( the assembly code. These do not include output or input registers. The special clobber value of {#syntax#}"memory"{#endsyntax#} means that the assembly causes writes to arbitrary undeclared memory locations - not only the memory pointed to by a declared - indirect output. + indirect output.

Failure to declare the full set of clobbers for a given inline assembly @@ -7746,6 +7746,30 @@ test "@setRuntimeSafety" {

{#header_close#} + {#header_open|@splat#} + 
{#syntax#}@splat(comptime len: u32, scalar: var) @Vector(len, @typeOf(scalar)){#endsyntax#}
+

+ Produces a vector of length {#syntax#}len{#endsyntax#} where each element is the value + {#syntax#}scalar{#endsyntax#}: +

+ {#code_begin|test#} +const std = @import("std"); +const assert = std.debug.assert; + +test "vector @splat" { + const scalar: u32 = 5; + const result = @splat(4, scalar); + comptime assert(@typeOf(result) == @Vector(4, u32)); + assert(std.mem.eql(u32, ([4]u32)(result), [_]u32{ 5, 5, 5, 5 })); +} + {#code_end#} +

+ {#syntax#}scalar{#endsyntax#} must be an {#link|integer|Integers#}, {#link|bool|Primitive Types#}, + {#link|float|Floats#}, or {#link|pointer|Pointers#}. +

+ {#see_also|Vectors|@shuffle#} + {#header_close#} + {#header_open|@sqrt#} 
{#syntax#}@sqrt(comptime T: type, value: T) T{#endsyntax#}

@@ -9456,8 +9480,8 @@ const c = @cImport({

  • Does not support Zig-only pointer attributes such as alignment. Use normal {#link|Pointers#} please!
    • -

    When a C pointer is pointing to a single struct (not an array), deference the C pointer to - access to the struct's fields or member data. That syntax looks like +

    When a C pointer is pointing to a single struct (not an array), deference the C pointer to + access to the struct's fields or member data. That syntax looks like this:

    {#syntax#}ptr_to_struct.*.struct_member{#endsyntax#}

    This is comparable to doing {#syntax#}->{#endsyntax#} in C.