diff --git a/src/codegen/spirv.zig b/src/codegen/spirv.zig index f2337b604f..a74a92280d 100644 --- a/src/codegen/spirv.zig +++ b/src/codegen/spirv.zig @@ -4,9 +4,6 @@ const Target = std.Target; const log = std.log.scoped(.codegen); const assert = std.debug.assert; -const spec = @import("spirv/spec.zig"); -const Opcode = spec.Opcode; - const Module = @import("../Module.zig"); const Decl = Module.Decl; const Type = @import("../type.zig").Type; @@ -15,180 +12,75 @@ const LazySrcLoc = Module.LazySrcLoc; const Air = @import("../Air.zig"); const Liveness = @import("../Liveness.zig"); -pub const Word = u32; -pub const ResultId = u32; +const spec = @import("spirv/spec.zig"); +const Opcode = spec.Opcode; +const Word = spec.Word; +const IdRef = spec.IdRef; +const IdResult = spec.IdResult; +const IdResultType = spec.IdResultType; -pub const TypeMap = std.HashMap(Type, u32, Type.HashContext64, std.hash_map.default_max_load_percentage); -pub const InstMap = std.AutoHashMap(Air.Inst.Index, ResultId); +const SpvModule = @import("spirv/Module.zig"); +const SpvSection = @import("spirv/Section.zig"); + +const TypeCache = std.HashMapUnmanaged(Type, IdResultType, Type.HashContext64, std.hash_map.default_max_load_percentage); +const InstMap = std.AutoHashMapUnmanaged(Air.Inst.Index, IdRef); const IncomingBlock = struct { - src_label_id: ResultId, - break_value_id: ResultId, + src_label_id: IdRef, + break_value_id: IdRef, }; -pub const BlockMap = std.AutoHashMap(Air.Inst.Index, struct { - label_id: ResultId, +pub const BlockMap = std.AutoHashMapUnmanaged(Air.Inst.Index, struct { + label_id: IdRef, incoming_blocks: *std.ArrayListUnmanaged(IncomingBlock), }); -pub fn writeOpcode(code: *std.ArrayList(Word), opcode: Opcode, arg_count: u16) !void { - const word_count: Word = arg_count + 1; - try code.append((word_count << 16) | @enumToInt(opcode)); -} - -pub fn writeInstruction(code: *std.ArrayList(Word), opcode: Opcode, args: []const Word) !void { - try writeOpcode(code, opcode, @intCast(u16, args.len)); - try code.appendSlice(args); -} - -pub fn writeInstructionWithString(code: *std.ArrayList(Word), opcode: Opcode, args: []const Word, str: []const u8) !void { - // Str needs to be written zero-terminated, so we need to add one to the length. - const zero_terminated_len = str.len + 1; - const str_words = (zero_terminated_len + @sizeOf(Word) - 1) / @sizeOf(Word); - - try writeOpcode(code, opcode, @intCast(u16, args.len + str_words)); - try code.ensureUnusedCapacity(args.len + str_words); - code.appendSliceAssumeCapacity(args); - - // TODO: Not actually sure whether this is correct for big-endian. - // See https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#Literal - var i: usize = 0; - while (i < zero_terminated_len) : (i += @sizeOf(Word)) { - var word: Word = 0; - - var j: usize = 0; - while (j < @sizeOf(Word) and i + j < str.len) : (j += 1) { - word |= @as(Word, str[i + j]) << @intCast(std.math.Log2Int(Word), j * std.meta.bitCount(u8)); - } - - code.appendAssumeCapacity(word); - } -} - -/// This structure represents a SPIR-V (binary) module being compiled, and keeps track of all relevant information. -/// That includes the actual instructions, the current result-id bound, and data structures for querying result-id's -/// of data which needs to be persistent over different calls to Decl code generation. -pub const SPIRVModule = struct { - /// A general-purpose allocator which may be used to allocate temporary resources required for compilation. - gpa: Allocator, - - /// The parent module. - module: *Module, - - /// SPIR-V instructions return result-ids. This variable holds the module-wide counter for these. - next_result_id: ResultId, - - /// Code of the actual SPIR-V binary, divided into the relevant logical sections. - /// Note: To save some bytes, these could also be unmanaged, but since there is only one instance of SPIRVModule - /// and this removes some clutter in the rest of the backend, it's fine like this. - binary: struct { - /// OpCapability and OpExtension instructions (in that order). - capabilities_and_extensions: std.ArrayList(Word), - - /// OpString, OpSourceExtension, OpSource, OpSourceContinued. - debug_strings: std.ArrayList(Word), - - /// Type declaration instructions, constant instructions, global variable declarations, OpUndef instructions. - types_globals_constants: std.ArrayList(Word), - - /// Regular functions. - fn_decls: std.ArrayList(Word), - }, - - /// Global type cache to reduce the amount of generated types. - types: TypeMap, - - /// Cache for results of OpString instructions for module file names fed to OpSource. - /// Since OpString is pretty much only used for those, we don't need to keep track of all strings, - /// just the ones for OpLine. Note that OpLine needs the result of OpString, and not that of OpSource. - file_names: std.StringHashMap(ResultId), - - pub fn init(gpa: Allocator, module: *Module) SPIRVModule { - return .{ - .gpa = gpa, - .module = module, - .next_result_id = 1, // 0 is an invalid SPIR-V result ID. - .binary = .{ - .capabilities_and_extensions = std.ArrayList(Word).init(gpa), - .debug_strings = std.ArrayList(Word).init(gpa), - .types_globals_constants = std.ArrayList(Word).init(gpa), - .fn_decls = std.ArrayList(Word).init(gpa), - }, - .types = TypeMap.init(gpa), - .file_names = std.StringHashMap(ResultId).init(gpa), - }; - } - - pub fn deinit(self: *SPIRVModule) void { - self.file_names.deinit(); - self.types.deinit(); - - self.binary.fn_decls.deinit(); - self.binary.types_globals_constants.deinit(); - self.binary.debug_strings.deinit(); - self.binary.capabilities_and_extensions.deinit(); - } - - pub fn allocResultId(self: *SPIRVModule) Word { - defer self.next_result_id += 1; - return self.next_result_id; - } - - pub fn resultIdBound(self: *SPIRVModule) Word { - return self.next_result_id; - } - - fn resolveSourceFileName(self: *SPIRVModule, decl: *Decl) !ResultId { - const path = decl.getFileScope().sub_file_path; - const result = try self.file_names.getOrPut(path); - if (!result.found_existing) { - result.value_ptr.* = self.allocResultId(); - try writeInstructionWithString(&self.binary.debug_strings, .OpString, &[_]Word{result.value_ptr.*}, path); - try writeInstruction(&self.binary.debug_strings, .OpSource, &[_]Word{ - @enumToInt(spec.SourceLanguage.Unknown), // TODO: Register Zig source language. - 0, // TODO: Zig version as u32? - result.value_ptr.*, - }); - } - - return result.value_ptr.*; - } -}; - /// This structure is used to compile a declaration, and contains all relevant meta-information to deal with that. pub const DeclGen = struct { - /// The SPIR-V module code should be put in. - spv: *SPIRVModule, + /// The Zig module that we are generating decls for. + module: *Module, + /// The SPIR-V module code should be put in. + spv: *SpvModule, + + /// The decl we are currently generating code for. + decl: *Decl, + + /// The intermediate code of the declaration we are currently generating. Note: If + /// the declaration is not a function, this value will be undefined! air: Air, + + /// The liveness analysis of the intermediate code for the declaration we are currently generating. + /// Note: If the declaration is not a function, this value will be undefined! liveness: Liveness, /// An array of function argument result-ids. Each index corresponds with the /// function argument of the same index. - args: std.ArrayList(ResultId), + args: std.ArrayListUnmanaged(IdRef) = .{}, /// A counter to keep track of how many `arg` instructions we've seen yet. next_arg_index: u32, + /// A cache for zig types to prevent having to re-process a particular type. This structure is kept around + /// after a call to `gen` so that they don't have to be re-resolved for different decls. + type_cache: TypeCache = .{}, + /// A map keeping track of which instruction generated which result-id. - inst_results: InstMap, + inst_results: InstMap = .{}, /// We need to keep track of result ids for block labels, as well as the 'incoming' /// blocks for a block. - blocks: BlockMap, + blocks: BlockMap = .{}, /// The label of the SPIR-V block we are currently generating. - current_block_label_id: ResultId, + current_block_label_id: IdRef, /// The actual instructions for this function. We need to declare all locals in /// the first block, and because we don't know which locals there are going to be, /// we're just going to generate everything after the locals-section in this array. /// Note: It will not contain OpFunction, OpFunctionParameter, OpVariable and the - /// initial OpLabel. These will be generated into spv.binary.fn_decls directly. - code: std.ArrayList(Word), - - /// The decl we are currently generating code for. - decl: *Decl, + /// initial OpLabel. These will be generated into spv.sections.functions directly. + code: SpvSection = .{}, /// If `gen` returned `Error.CodegenFail`, this contains an explanatory message. /// Memory is owned by `module.gpa`. @@ -244,18 +136,15 @@ pub const DeclGen = struct { /// Initialize the common resources of a DeclGen. Some fields are left uninitialized, /// only set when `gen` is called. - pub fn init(spv: *SPIRVModule) DeclGen { + pub fn init(module: *Module, spv: *SpvModule) DeclGen { return .{ + .module = module, .spv = spv, + .decl = undefined, .air = undefined, .liveness = undefined, - .args = std.ArrayList(ResultId).init(spv.gpa), .next_arg_index = undefined, - .inst_results = InstMap.init(spv.gpa), - .blocks = BlockMap.init(spv.gpa), .current_block_label_id = undefined, - .code = std.ArrayList(Word).init(spv.gpa), - .decl = undefined, .error_msg = undefined, }; } @@ -265,15 +154,16 @@ pub const DeclGen = struct { /// returns such a reportable error, it is valid to be called again for a different decl. pub fn gen(self: *DeclGen, decl: *Decl, air: Air, liveness: Liveness) !?*Module.ErrorMsg { // Reset internal resources, we don't want to re-allocate these. + self.decl = decl; self.air = air; self.liveness = liveness; self.args.items.len = 0; self.next_arg_index = 0; + // Note: don't clear type_cache. self.inst_results.clearRetainingCapacity(); self.blocks.clearRetainingCapacity(); self.current_block_label_id = undefined; - self.code.items.len = 0; - self.decl = decl; + self.code.reset(); self.error_msg = null; self.genDecl() catch |err| switch (err) { @@ -286,25 +176,38 @@ pub const DeclGen = struct { /// Free resources owned by the DeclGen. pub fn deinit(self: *DeclGen) void { - self.args.deinit(); - self.inst_results.deinit(); - self.blocks.deinit(); - self.code.deinit(); + self.args.deinit(self.spv.gpa); + self.type_cache.deinit(self.spv.gpa); + self.inst_results.deinit(self.spv.gpa); + self.blocks.deinit(self.spv.gpa); + self.code.deinit(self.spv.gpa); } + /// Return the target which we are currently compiling for. fn getTarget(self: *DeclGen) std.Target { - return self.spv.module.getTarget(); + return self.module.getTarget(); } fn fail(self: *DeclGen, comptime format: []const u8, args: anytype) Error { @setCold(true); const src: LazySrcLoc = .{ .node_offset = 0 }; const src_loc = src.toSrcLoc(self.decl); - self.error_msg = try Module.ErrorMsg.create(self.spv.module.gpa, src_loc, format, args); + assert(self.error_msg == null); + self.error_msg = try Module.ErrorMsg.create(self.module.gpa, src_loc, format, args); return error.CodegenFail; } - fn resolve(self: *DeclGen, inst: Air.Inst.Ref) !ResultId { + fn todo(self: *DeclGen, comptime format: []const u8, args: anytype) Error { + @setCold(true); + const src: LazySrcLoc = .{ .node_offset = 0 }; + const src_loc = src.toSrcLoc(self.decl); + assert(self.error_msg == null); + self.error_msg = try Module.ErrorMsg.create(self.module.gpa, src_loc, "TODO (SPIR-V): " ++ format, args); + return error.CodegenFail; + } + + /// Fetch the result-id for a previously generated instruction or constant. + fn resolve(self: *DeclGen, inst: Air.Inst.Ref) !IdRef { if (self.air.value(inst)) |val| { return self.genConstant(self.air.typeOf(inst), val); } @@ -312,9 +215,13 @@ pub const DeclGen = struct { return self.inst_results.get(index).?; // Assertion means instruction does not dominate usage. } - fn beginSPIRVBlock(self: *DeclGen, label_id: ResultId) !void { - try writeInstruction(&self.code, .OpLabel, &[_]Word{label_id}); - self.current_block_label_id = label_id; + /// Start a new SPIR-V block, Emits the label of the new block, and stores which + /// block we are currently generating. + /// Note that there is no such thing as nested blocks like in ZIR or AIR, so we don't need to + /// keep track of the previous block. + fn beginSpvBlock(self: *DeclGen, label_id: IdResult) !void { + try self.code.emit(self.spv.gpa, .OpLabel, .{.id_result = label_id}); + self.current_block_label_id = label_id.toRef(); } /// SPIR-V requires enabling specific integer sizes through capabilities, and so if they are not enabled, we need @@ -396,13 +303,18 @@ pub const DeclGen = struct { const int_info = ty.intInfo(target); // TODO: Maybe it's useful to also return this value. const maybe_backing_bits = self.backingIntBits(int_info.bits); - break :blk ArithmeticTypeInfo{ .bits = int_info.bits, .is_vector = false, .signedness = int_info.signedness, .class = if (maybe_backing_bits) |backing_bits| - if (backing_bits == int_info.bits) - ArithmeticTypeInfo.Class.integer + break :blk ArithmeticTypeInfo{ + .bits = int_info.bits, + .is_vector = false, + .signedness = int_info.signedness, + .class = if (maybe_backing_bits) |backing_bits| + if (backing_bits == int_info.bits) + ArithmeticTypeInfo.Class.integer + else + ArithmeticTypeInfo.Class.strange_integer else - ArithmeticTypeInfo.Class.strange_integer - else - .composite_integer }; + .composite_integer, + }; }, // As of yet, there is no vector support in the self-hosted compiler. .Vector => self.fail("TODO: SPIR-V backend: implement arithmeticTypeInfo for Vector", .{}), @@ -413,15 +325,15 @@ pub const DeclGen = struct { /// Generate a constant representing `val`. /// TODO: Deduplication? - fn genConstant(self: *DeclGen, ty: Type, val: Value) Error!ResultId { + fn genConstant(self: *DeclGen, ty: Type, val: Value) Error!IdRef { const target = self.getTarget(); - const code = &self.spv.binary.types_globals_constants; - const result_id = self.spv.allocResultId(); + const section = &self.spv.sections.types_globals_constants; + const result_id = self.spv.allocId(); const result_type_id = try self.genType(ty); if (val.isUndef()) { - try writeInstruction(code, .OpUndef, &[_]Word{ result_type_id, result_id }); - return result_id; + try section.emit(self.spv.gpa, .OpUndef, .{ .id_result_type = result_type_id, .id_result = result_id }); + return result_id.toRef(); } switch (ty.zigTypeTag()) { @@ -436,76 +348,71 @@ pub const DeclGen = struct { // SPIR-V native type (up to i/u64 with Int64). If SPIR-V ever supports native ints of a larger size, this // might need to be updated. assert(self.largestSupportedIntBits() <= std.meta.bitCount(u64)); + + // Note, value is required to be sign-extended, so we don't need to mask off the upper bits. + // See https://www.khronos.org/registry/SPIR-V/specs/unified1/SPIRV.html#Literal var int_bits = if (ty.isSignedInt()) @bitCast(u64, val.toSignedInt()) else val.toUnsignedInt(); - // Mask the low bits which make up the actual integer. This is to make sure that negative values - // only use the actual bits of the type. - // TODO: Should this be the backing type bits or the actual type bits? - int_bits &= (@as(u64, 1) << @intCast(u6, backing_bits)) - 1; + const value: spec.LiteralContextDependentNumber = switch (backing_bits) { + 1...32 => .{.uint32 = @truncate(u32, int_bits)}, + 33...64 => .{.uint64 = int_bits}, + else => unreachable, + }; - switch (backing_bits) { - 0 => unreachable, - 1...32 => try writeInstruction(code, .OpConstant, &[_]Word{ - result_type_id, - result_id, - @truncate(u32, int_bits), - }), - 33...64 => try writeInstruction(code, .OpConstant, &[_]Word{ - result_type_id, - result_id, - @truncate(u32, int_bits), - @truncate(u32, int_bits >> @bitSizeOf(u32)), - }), - else => unreachable, // backing_bits is bounded by largestSupportedIntBits. - } + try section.emit(self.spv.gpa, .OpConstant, .{ + .id_result_type = result_type_id, + .id_result = result_id, + .value = value, + }); }, .Bool => { - const opcode: Opcode = if (val.toBool()) .OpConstantTrue else .OpConstantFalse; - try writeInstruction(code, opcode, &[_]Word{ result_type_id, result_id }); + const operands = .{ .id_result_type = result_type_id, .id_result = result_id }; + if (val.toBool()) { + try section.emit(self.spv.gpa, .OpConstantTrue, operands); + } else { + try section.emit(self.spv.gpa, .OpConstantFalse, operands); + } }, .Float => { // At this point we are guaranteed that the target floating point type is supported, otherwise the function // would have exited at genType(ty). - // f16 and f32 require one word of storage. f64 requires 2, low-order first. - - switch (ty.floatBits(target)) { - 16 => try writeInstruction(code, .OpConstant, &[_]Word{ result_type_id, result_id, @bitCast(u16, val.toFloat(f16)) }), - 32 => try writeInstruction(code, .OpConstant, &[_]Word{ result_type_id, result_id, @bitCast(u32, val.toFloat(f32)) }), - 64 => { - const float_bits = @bitCast(u64, val.toFloat(f64)); - try writeInstruction(code, .OpConstant, &[_]Word{ - result_type_id, - result_id, - @truncate(u32, float_bits), - @truncate(u32, float_bits >> @bitSizeOf(u32)), - }); - }, + const value: spec.LiteralContextDependentNumber = switch (ty.floatBits(target)) { + // Prevent upcasting to f32 by bitcasting and writing as a uint32. + 16 => .{.uint32 = @bitCast(u16, val.toFloat(f16))}, + 32 => .{.float32 = val.toFloat(f32)}, + 64 => .{.float64 = val.toFloat(f64)}, 128 => unreachable, // Filtered out in the call to genType. - // TODO: Insert case for long double when the layout for that is determined. + // TODO: Insert case for long double when the layout for that is determined? else => unreachable, - } + }; + + try section.emit(self.spv.gpa, .OpConstant, .{ + .id_result_type = result_type_id, + .id_result = result_id, + .value = value, + }); }, .Void => unreachable, else => return self.fail("TODO: SPIR-V backend: constant generation of type {}", .{ty}), } - return result_id; + return result_id.toRef(); } - fn genType(self: *DeclGen, ty: Type) Error!ResultId { + fn genType(self: *DeclGen, ty: Type) Error!IdResultType { // We can't use getOrPut here so we can recursively generate types. - if (self.spv.types.get(ty)) |already_generated| { + if (self.type_cache.get(ty)) |already_generated| { return already_generated; } const target = self.getTarget(); - const code = &self.spv.binary.types_globals_constants; - const result_id = self.spv.allocResultId(); + const section = &self.spv.sections.types_globals_constants; + const result_id = self.spv.allocId(); switch (ty.zigTypeTag()) { - .Void => try writeInstruction(code, .OpTypeVoid, &[_]Word{result_id}), - .Bool => try writeInstruction(code, .OpTypeBool, &[_]Word{result_id}), + .Void => try section.emit(self.spv.gpa, .OpTypeVoid, .{.id_result = result_id}), + .Bool => try section.emit(self.spv.gpa, .OpTypeBool, .{.id_result = result_id}), .Int => { const int_info = ty.intInfo(target); const backing_bits = self.backingIntBits(int_info.bits) orelse { @@ -514,11 +421,11 @@ pub const DeclGen = struct { }; // TODO: If backing_bits != int_info.bits, a duplicate type might be generated here. - try writeInstruction(code, .OpTypeInt, &[_]Word{ - result_id, - backing_bits, - switch (int_info.signedness) { - .unsigned => 0, + try section.emit(self.spv.gpa, .OpTypeInt, .{ + .id_result = result_id, + .width = backing_bits, + .signedness = switch (int_info.signedness) { + .unsigned => @as(spec.LiteralInteger, 0), .signed => 1, }, }); @@ -539,7 +446,7 @@ pub const DeclGen = struct { return self.fail("Floating point width of {} bits is not supported for the current SPIR-V feature set", .{bits}); } - try writeInstruction(code, .OpTypeFloat, &[_]Word{ result_id, bits }); + try section.emit(self.spv.gpa, .OpTypeFloat, .{.id_result = result_id, .width = bits}); }, .Fn => { // We only support zig-calling-convention functions, no varargs. @@ -558,14 +465,16 @@ pub const DeclGen = struct { const return_type_id = try self.genType(ty.fnReturnType()); + try section.emitRaw(self.spv.gpa, .OpTypeFunction, 2 + @intCast(u16, ty.fnParamLen())); + // result id + result type id + parameter type ids. - try writeOpcode(code, .OpTypeFunction, 2 + @intCast(u16, ty.fnParamLen())); - try code.appendSlice(&.{ result_id, return_type_id }); + section.writeOperand(IdResult, result_id); + section.writeOperand(IdResultType, return_type_id); i = 0; while (i < params) : (i += 1) { - const param_type_id = self.spv.types.get(ty.fnParamType(i)).?; - try code.append(param_type_id); + const param_type_id = self.type_cache.get(ty.fnParamType(i)).?; + section.writeOperand(IdRef, param_type_id.toRef()); } }, // When recursively generating a type, we cannot infer the pointer's storage class. See genPointerType. @@ -594,26 +503,29 @@ pub const DeclGen = struct { else => |tag| return self.fail("TODO: SPIR-V backend: implement type {}s", .{tag}), } - try self.spv.types.putNoClobber(ty, result_id); - return result_id; + try self.type_cache.putNoClobber(self.spv.gpa, ty, result_id.toResultType()); + return result_id.toResultType(); } /// SPIR-V requires pointers to have a storage class (address space), and so we have a special function for that. /// TODO: The result of this needs to be cached. - fn genPointerType(self: *DeclGen, ty: Type, storage_class: spec.StorageClass) !ResultId { + fn genPointerType(self: *DeclGen, ty: Type, storage_class: spec.StorageClass) !IdResultType { assert(ty.zigTypeTag() == .Pointer); - const code = &self.spv.binary.types_globals_constants; - const result_id = self.spv.allocResultId(); + const result_id = self.spv.allocId(); // TODO: There are many constraints which are ignored for now: We may only create pointers to certain types, and to other types // if more capabilities are enabled. For example, we may only create pointers to f16 if Float16Buffer is enabled. // These also relates to the pointer's address space. const child_id = try self.genType(ty.elemType()); - try writeInstruction(code, .OpTypePointer, &[_]Word{ result_id, @enumToInt(storage_class), child_id }); + try self.spv.sections.types_globals_constants.emit(self.spv.gpa, .OpTypePointer, .{ + .id_result = result_id, + .storage_class = storage_class, + .type = child_id.toRef(), + }); - return result_id; + return result_id.toResultType(); } fn genDecl(self: *DeclGen) !void { @@ -623,38 +535,43 @@ pub const DeclGen = struct { if (decl.val.castTag(.function)) |_| { assert(decl.ty.zigTypeTag() == .Fn); const prototype_id = try self.genType(decl.ty); - try writeInstruction(&self.spv.binary.fn_decls, .OpFunction, &[_]Word{ - self.spv.types.get(decl.ty.fnReturnType()).?, // This type should be generated along with the prototype. - result_id, - @bitCast(Word, spec.FunctionControl{}), // TODO: We can set inline here if the type requires it. - prototype_id, + try self.spv.sections.functions.emit(self.spv.gpa, .OpFunction, .{ + .id_result_type = self.type_cache.get(decl.ty.fnReturnType()).?, // This type should be generated along with the prototype. + .id_result = result_id, + .function_control = .{}, // TODO: We can set inline here if the type requires it. + .function_type = prototype_id.toRef(), }); const params = decl.ty.fnParamLen(); var i: usize = 0; - try self.args.ensureUnusedCapacity(params); + try self.args.ensureUnusedCapacity(self.spv.gpa, params); while (i < params) : (i += 1) { - const param_type_id = self.spv.types.get(decl.ty.fnParamType(i)).?; - const arg_result_id = self.spv.allocResultId(); - try writeInstruction(&self.spv.binary.fn_decls, .OpFunctionParameter, &[_]Word{ param_type_id, arg_result_id }); - self.args.appendAssumeCapacity(arg_result_id); + const param_type_id = self.type_cache.get(decl.ty.fnParamType(i)).?; + const arg_result_id = self.spv.allocId(); + try self.spv.sections.functions.emit(self.spv.gpa, .OpFunctionParameter, .{ + .id_result_type = param_type_id, + .id_result = arg_result_id, + }); + self.args.appendAssumeCapacity(arg_result_id.toRef()); } // TODO: This could probably be done in a better way... - const root_block_id = self.spv.allocResultId(); + const root_block_id = self.spv.allocId(); - // We need to generate the label directly in the fn_decls here because we're going to write the local variables after - // here. Since we're not generating in self.code, we're just going to bypass self.beginSPIRVBlock here. - try writeInstruction(&self.spv.binary.fn_decls, .OpLabel, &[_]Word{root_block_id}); - self.current_block_label_id = root_block_id; + // We need to generate the label directly in the functions section here because we're going to write the local variables after + // here. Since we're not generating in self.code, we're just going to bypass self.beginSpvBlock here. + try self.spv.sections.functions.emit(self.spv.gpa, .OpLabel, .{ + .id_result = root_block_id, + }); + self.current_block_label_id = root_block_id.toRef(); const main_body = self.air.getMainBody(); try self.genBody(main_body); - // Append the actual code into the fn_decls section. - try self.spv.binary.fn_decls.appendSlice(self.code.items); - try writeInstruction(&self.spv.binary.fn_decls, .OpFunctionEnd, &[_]Word{}); + // Append the actual code into the functions section. + try self.spv.sections.functions.append(self.spv.gpa, self.code); + try self.spv.sections.functions.emit(self.spv.gpa, .OpFunctionEnd, {}); } else { return self.fail("TODO: SPIR-V backend: generate decl type {}", .{decl.ty.zigTypeTag()}); } @@ -670,9 +587,9 @@ pub const DeclGen = struct { const air_tags = self.air.instructions.items(.tag); const result_id = switch (air_tags[inst]) { // zig fmt: off - .add, .addwrap => try self.airArithOp(inst, .{.OpFAdd, .OpIAdd, .OpIAdd}), - .sub, .subwrap => try self.airArithOp(inst, .{.OpFSub, .OpISub, .OpISub}), - .mul, .mulwrap => try self.airArithOp(inst, .{.OpFMul, .OpIMul, .OpIMul}), + .add, .addwrap => try self.airArithOp(inst, .OpFAdd, .OpIAdd, .OpIAdd), + .sub, .subwrap => try self.airArithOp(inst, .OpFSub, .OpISub, .OpISub), + .mul, .mulwrap => try self.airArithOp(inst, .OpFMul, .OpIMul, .OpIMul), .bit_and => try self.airBinOpSimple(inst, .OpBitwiseAnd), .bit_or => try self.airBinOpSimple(inst, .OpBitwiseOr), @@ -682,12 +599,12 @@ pub const DeclGen = struct { .not => try self.airNot(inst), - .cmp_eq => try self.airCmp(inst, .{.OpFOrdEqual, .OpLogicalEqual, .OpIEqual}), - .cmp_neq => try self.airCmp(inst, .{.OpFOrdNotEqual, .OpLogicalNotEqual, .OpINotEqual}), - .cmp_gt => try self.airCmp(inst, .{.OpFOrdGreaterThan, .OpSGreaterThan, .OpUGreaterThan}), - .cmp_gte => try self.airCmp(inst, .{.OpFOrdGreaterThanEqual, .OpSGreaterThanEqual, .OpUGreaterThanEqual}), - .cmp_lt => try self.airCmp(inst, .{.OpFOrdLessThan, .OpSLessThan, .OpULessThan}), - .cmp_lte => try self.airCmp(inst, .{.OpFOrdLessThanEqual, .OpSLessThanEqual, .OpULessThanEqual}), + .cmp_eq => try self.airCmp(inst, .OpFOrdEqual, .OpLogicalEqual, .OpIEqual), + .cmp_neq => try self.airCmp(inst, .OpFOrdNotEqual, .OpLogicalNotEqual, .OpINotEqual), + .cmp_gt => try self.airCmp(inst, .OpFOrdGreaterThan, .OpSGreaterThan, .OpUGreaterThan), + .cmp_gte => try self.airCmp(inst, .OpFOrdGreaterThanEqual, .OpSGreaterThanEqual, .OpUGreaterThanEqual), + .cmp_lt => try self.airCmp(inst, .OpFOrdLessThan, .OpSLessThan, .OpULessThan), + .cmp_lte => try self.airCmp(inst, .OpFOrdLessThanEqual, .OpSLessThanEqual, .OpULessThanEqual), .arg => self.airArg(), .alloc => try self.airAlloc(inst), @@ -710,22 +627,25 @@ pub const DeclGen = struct { }), }; - try self.inst_results.putNoClobber(inst, result_id); + try self.inst_results.putNoClobber(self.spv.gpa, inst, result_id); } - fn airBinOpSimple(self: *DeclGen, inst: Air.Inst.Index, opcode: Opcode) !ResultId { + fn airBinOpSimple(self: *DeclGen, inst: Air.Inst.Index, comptime opcode: Opcode) !IdRef { const bin_op = self.air.instructions.items(.data)[inst].bin_op; const lhs_id = try self.resolve(bin_op.lhs); const rhs_id = try self.resolve(bin_op.rhs); - const result_id = self.spv.allocResultId(); + const result_id = self.spv.allocId(); const result_type_id = try self.genType(self.air.typeOfIndex(inst)); - try writeInstruction(&self.code, opcode, &[_]Word{ - result_type_id, result_id, lhs_id, rhs_id, + try self.code.emit(self.spv.gpa, opcode, .{ + .id_result_type = result_type_id, + .id_result = result_id, + .operand_1 = lhs_id, + .operand_2 = rhs_id, }); - return result_id; + return result_id.toRef(); } - fn airArithOp(self: *DeclGen, inst: Air.Inst.Index, ops: [3]Opcode) !ResultId { + fn airArithOp(self: *DeclGen, inst: Air.Inst.Index, comptime fop: Opcode, comptime sop: Opcode, comptime uop: Opcode) !IdRef { // LHS and RHS are guaranteed to have the same type, and AIR guarantees // the result to be the same as the LHS and RHS, which matches SPIR-V. const ty = self.air.typeOfIndex(inst); @@ -733,7 +653,7 @@ pub const DeclGen = struct { const lhs_id = try self.resolve(bin_op.lhs); const rhs_id = try self.resolve(bin_op.rhs); - const result_id = self.spv.allocResultId(); + const result_id = self.spv.allocId(); const result_type_id = try self.genType(ty); assert(self.air.typeOf(bin_op.lhs).eql(ty)); @@ -757,20 +677,31 @@ pub const DeclGen = struct { .float => 0, else => unreachable, }; - const opcode = ops[opcode_index]; - try writeInstruction(&self.code, opcode, &[_]Word{ result_type_id, result_id, lhs_id, rhs_id }); + const operands = .{ + .id_result_type = result_type_id, + .id_result = result_id, + .operand_1 = lhs_id, + .operand_2 = rhs_id, + }; + + switch (opcode_index) { + 0 => try self.code.emit(self.spv.gpa, fop, operands), + 1 => try self.code.emit(self.spv.gpa, sop, operands), + 2 => try self.code.emit(self.spv.gpa, uop, operands), + else => unreachable, + } // TODO: Trap on overflow? Probably going to be annoying. // TODO: Look into SPV_KHR_no_integer_wrap_decoration which provides NoSignedWrap/NoUnsignedWrap. - return result_id; + return result_id.toRef(); } - fn airCmp(self: *DeclGen, inst: Air.Inst.Index, ops: [3]Opcode) !ResultId { + fn airCmp(self: *DeclGen, inst: Air.Inst.Index, comptime fop: Opcode, comptime sop: Opcode, comptime uop: Opcode) !IdRef { const bin_op = self.air.instructions.items(.data)[inst].bin_op; const lhs_id = try self.resolve(bin_op.lhs); const rhs_id = try self.resolve(bin_op.rhs); - const result_id = self.spv.allocResultId(); + const result_id = self.spv.allocId(); const result_type_id = try self.genType(Type.initTag(.bool)); const op_ty = self.air.typeOf(bin_op.lhs); assert(op_ty.eql(self.air.typeOf(bin_op.rhs))); @@ -793,53 +724,71 @@ pub const DeclGen = struct { .unsigned => @as(usize, 2), }, }; - const opcode = ops[opcode_index]; - try writeInstruction(&self.code, opcode, &[_]Word{ result_type_id, result_id, lhs_id, rhs_id }); - return result_id; + const operands = .{ + .id_result_type = result_type_id, + .id_result = result_id, + .operand_1 = lhs_id, + .operand_2 = rhs_id, + }; + + switch (opcode_index) { + 0 => try self.code.emit(self.spv.gpa, fop, operands), + 1 => try self.code.emit(self.spv.gpa, sop, operands), + 2 => try self.code.emit(self.spv.gpa, uop, operands), + else => unreachable, + } + + return result_id.toRef(); } - fn airNot(self: *DeclGen, inst: Air.Inst.Index) !ResultId { + fn airNot(self: *DeclGen, inst: Air.Inst.Index) !IdRef { const ty_op = self.air.instructions.items(.data)[inst].ty_op; const operand_id = try self.resolve(ty_op.operand); - const result_id = self.spv.allocResultId(); + const result_id = self.spv.allocId(); const result_type_id = try self.genType(Type.initTag(.bool)); - const opcode: Opcode = .OpLogicalNot; - try writeInstruction(&self.code, opcode, &[_]Word{ result_type_id, result_id, operand_id }); - return result_id; + try self.code.emit(self.spv.gpa, .OpLogicalNot, .{ + .id_result_type = result_type_id, + .id_result = result_id, + .operand = operand_id, + }); + return result_id.toRef(); } - fn airAlloc(self: *DeclGen, inst: Air.Inst.Index) !ResultId { + fn airAlloc(self: *DeclGen, inst: Air.Inst.Index) !IdRef { const ty = self.air.typeOfIndex(inst); const storage_class = spec.StorageClass.Function; const result_type_id = try self.genPointerType(ty, storage_class); - const result_id = self.spv.allocResultId(); + const result_id = self.spv.allocId(); - // Rather than generating into code here, we're just going to generate directly into the fn_decls section so that + // Rather than generating into code here, we're just going to generate directly into the functions section so that // variable declarations appear in the first block of the function. - try writeInstruction(&self.spv.binary.fn_decls, .OpVariable, &[_]Word{ result_type_id, result_id, @enumToInt(storage_class) }); - - return result_id; + try self.spv.sections.functions.emit(self.spv.gpa, .OpVariable, .{ + .id_result_type = result_type_id, + .id_result = result_id, + .storage_class = storage_class, + }); + return result_id.toRef(); } - fn airArg(self: *DeclGen) ResultId { + fn airArg(self: *DeclGen) IdRef { defer self.next_arg_index += 1; return self.args.items[self.next_arg_index]; } - fn airBlock(self: *DeclGen, inst: Air.Inst.Index) !?ResultId { - // In IR, a block doesn't really define an entry point like a block, but more like a scope that breaks can jump out of and + fn airBlock(self: *DeclGen, inst: Air.Inst.Index) !?IdRef { + // In AIR, a block doesn't really define an entry point like a block, but more like a scope that breaks can jump out of and // "return" a value from. This cannot be directly modelled in SPIR-V, so in a block instruction, we're going to split up // the current block by first generating the code of the block, then a label, and then generate the rest of the current // ir.Block in a different SPIR-V block. - const label_id = self.spv.allocResultId(); + const label_id = self.spv.allocId(); // 4 chosen as arbitrary initial capacity. var incoming_blocks = try std.ArrayListUnmanaged(IncomingBlock).initCapacity(self.spv.gpa, 4); - try self.blocks.putNoClobber(inst, .{ - .label_id = label_id, + try self.blocks.putNoClobber(self.spv.gpa, inst, .{ + .label_id = label_id.toRef(), .incoming_blocks = &incoming_blocks, }); defer { @@ -853,7 +802,7 @@ pub const DeclGen = struct { const body = self.air.extra[extra.end..][0..extra.data.body_len]; try self.genBody(body); - try self.beginSPIRVBlock(label_id); + try self.beginSpvBlock(label_id); // If this block didn't produce a value, simply return here. if (!ty.hasRuntimeBits()) @@ -861,7 +810,7 @@ pub const DeclGen = struct { // Combine the result from the blocks using the Phi instruction. - const result_id = self.spv.allocResultId(); + const result_id = self.spv.allocId(); // TODO: OpPhi is limited in the types that it may produce, such as pointers. Figure out which other types // are not allowed to be created from a phi node, and throw an error for those. For now, genType already throws @@ -869,13 +818,13 @@ pub const DeclGen = struct { const result_type_id = try self.genType(ty); _ = result_type_id; - try writeOpcode(&self.code, .OpPhi, 2 + @intCast(u16, incoming_blocks.items.len * 2)); // result type + result + variable/parent... + try self.code.emitRaw(self.spv.gpa, .OpPhi, 2 + @intCast(u16, incoming_blocks.items.len * 2)); // result type + result + variable/parent... for (incoming_blocks.items) |incoming| { - try self.code.appendSlice(&[_]Word{ incoming.break_value_id, incoming.src_label_id }); + self.code.writeOperand(spec.PairIdRefIdRef, .{ incoming.break_value_id, incoming.src_label_id }); } - return result_id; + return result_id.toRef(); } fn airBr(self: *DeclGen, inst: Air.Inst.Index) !void { @@ -889,7 +838,7 @@ pub const DeclGen = struct { try block.incoming_blocks.append(self.spv.gpa, .{ .src_label_id = self.current_block_label_id, .break_value_id = operand_id }); } - try writeInstruction(&self.code, .OpBranch, &[_]Word{block.label_id}); + try self.code.emit(self.spv.gpa, .OpBranch, .{.target_label = block.label_id}); } fn airCondBr(self: *DeclGen, inst: Air.Inst.Index) !void { @@ -900,63 +849,70 @@ pub const DeclGen = struct { const condition_id = try self.resolve(pl_op.operand); // These will always generate a new SPIR-V block, since they are ir.Body and not ir.Block. - const then_label_id = self.spv.allocResultId(); - const else_label_id = self.spv.allocResultId(); + const then_label_id = self.spv.allocId(); + const else_label_id = self.spv.allocId(); // TODO: We can generate OpSelectionMerge here if we know the target block that both of these will resolve to, // but i don't know if those will always resolve to the same block. - try writeInstruction(&self.code, .OpBranchConditional, &[_]Word{ - condition_id, - then_label_id, - else_label_id, + try self.code.emit(self.spv.gpa, .OpBranchConditional, .{ + .condition = condition_id, + .true_label = then_label_id.toRef(), + .false_label = else_label_id.toRef(), }); - try self.beginSPIRVBlock(then_label_id); + try self.beginSpvBlock(then_label_id); try self.genBody(then_body); - try self.beginSPIRVBlock(else_label_id); + try self.beginSpvBlock(else_label_id); try self.genBody(else_body); } fn airDbgStmt(self: *DeclGen, inst: Air.Inst.Index) !void { const dbg_stmt = self.air.instructions.items(.data)[inst].dbg_stmt; const src_fname_id = try self.spv.resolveSourceFileName(self.decl); - try writeInstruction(&self.code, .OpLine, &[_]Word{ src_fname_id, dbg_stmt.line, dbg_stmt.column }); + try self.code.emit(self.spv.gpa, .OpLine, .{ + .file = src_fname_id, + .line = dbg_stmt.line, + .column = dbg_stmt.column, + }); } - fn airLoad(self: *DeclGen, inst: Air.Inst.Index) !ResultId { + fn airLoad(self: *DeclGen, inst: Air.Inst.Index) !IdRef { const ty_op = self.air.instructions.items(.data)[inst].ty_op; const operand_id = try self.resolve(ty_op.operand); const ty = self.air.typeOfIndex(inst); const result_type_id = try self.genType(ty); - const result_id = self.spv.allocResultId(); + const result_id = self.spv.allocId(); - const operands = if (ty.isVolatilePtr()) - &[_]Word{ result_type_id, result_id, operand_id, @bitCast(u32, spec.MemoryAccess{ .Volatile = true }) } - else - &[_]Word{ result_type_id, result_id, operand_id }; + const access = spec.MemoryAccess.Extended{ + .Volatile = ty.isVolatilePtr(), + }; - try writeInstruction(&self.code, .OpLoad, operands); + try self.code.emit(self.spv.gpa, .OpLoad, .{ + .id_result_type = result_type_id, + .id_result = result_id, + .pointer = operand_id, + .memory_access = access, + }); - return result_id; + return result_id.toRef(); } fn airLoop(self: *DeclGen, inst: Air.Inst.Index) !void { const ty_pl = self.air.instructions.items(.data)[inst].ty_pl; const loop = self.air.extraData(Air.Block, ty_pl.payload); const body = self.air.extra[loop.end..][0..loop.data.body_len]; - const loop_label_id = self.spv.allocResultId(); + const loop_label_id = self.spv.allocId(); // Jump to the loop entry point - try writeInstruction(&self.code, .OpBranch, &[_]Word{loop_label_id}); + try self.code.emit(self.spv.gpa, .OpBranch, .{.target_label = loop_label_id.toRef()}); // TODO: Look into OpLoopMerge. - - try self.beginSPIRVBlock(loop_label_id); + try self.beginSpvBlock(loop_label_id); try self.genBody(body); - try writeInstruction(&self.code, .OpBranch, &[_]Word{loop_label_id}); + try self.code.emit(self.spv.gpa, .OpBranch, .{.target_label = loop_label_id.toRef()}); } fn airRet(self: *DeclGen, inst: Air.Inst.Index) !void { @@ -964,9 +920,9 @@ pub const DeclGen = struct { const operand_ty = self.air.typeOf(operand); if (operand_ty.hasRuntimeBits()) { const operand_id = try self.resolve(operand); - try writeInstruction(&self.code, .OpReturnValue, &[_]Word{operand_id}); + try self.code.emit(self.spv.gpa, .OpReturnValue, .{.value = operand_id}); } else { - try writeInstruction(&self.code, .OpReturn, &[_]Word{}); + try self.code.emit(self.spv.gpa, .OpReturn, {}); } } @@ -976,15 +932,18 @@ pub const DeclGen = struct { const src_val_id = try self.resolve(bin_op.rhs); const lhs_ty = self.air.typeOf(bin_op.lhs); - const operands = if (lhs_ty.isVolatilePtr()) - &[_]Word{ dst_ptr_id, src_val_id, @bitCast(u32, spec.MemoryAccess{ .Volatile = true }) } - else - &[_]Word{ dst_ptr_id, src_val_id }; + const access = spec.MemoryAccess.Extended{ + .Volatile = lhs_ty.isVolatilePtr(), + }; - try writeInstruction(&self.code, .OpStore, operands); + try self.code.emit(self.spv.gpa, .OpStore, .{ + .pointer = dst_ptr_id, + .object = src_val_id, + .memory_access = access, + }); } fn airUnreach(self: *DeclGen) !void { - try writeInstruction(&self.code, .OpUnreachable, &[_]Word{}); + try self.code.emit(self.spv.gpa, .OpUnreachable, {}); } }; diff --git a/src/codegen/spirv/Module.zig b/src/codegen/spirv/Module.zig new file mode 100644 index 0000000000..fac9b92c70 --- /dev/null +++ b/src/codegen/spirv/Module.zig @@ -0,0 +1,153 @@ +//! This structure represents a SPIR-V (sections) module being compiled, and keeps track of all relevant information. +//! That includes the actual instructions, the current result-id bound, and data structures for querying result-id's +//! of data which needs to be persistent over different calls to Decl code generation. +//! +//! A SPIR-V binary module supports both little- and big endian layout. The layout is detected by the magic word in the +//! header. Therefore, we can ignore any byte order throughout the implementation, and just use the host byte order, +//! and make this a problem for the consumer. +const Module = @This(); + +const std = @import("std"); +const Allocator = std.mem.Allocator; + +const ZigDecl = @import("../../Module.zig").Decl; + +const spec = @import("spec.zig"); +const Word = spec.Word; +const IdRef = spec.IdRef; + +const Section = @import("Section.zig"); + +/// A general-purpose allocator which may be used to allocate resources for this module +gpa: Allocator, + +/// An arena allocator used to store things that have the same lifetime as this module. +arena: Allocator, + +/// Module layout, according to SPIR-V Spec section 2.4, "Logical Layout of a Module". +sections: struct { + /// Capability instructions + capabilities: Section = .{}, + /// OpExtension instructions + extensions: Section = .{}, + // OpExtInstImport instructions - skip for now. + // memory model defined by target, not required here. + /// OpEntryPoint instructions. + entry_points: Section = .{}, + // OpExecutionMode and OpExecutionModeId instructions - skip for now. + /// OpString, OpSourcExtension, OpSource, OpSourceContinued. + debug_strings: Section = .{}, + // OpName, OpMemberName - skip for now. + // OpModuleProcessed - skip for now. + /// Annotation instructions (OpDecorate etc). + annotations: Section = .{}, + /// Type declarations, constants, global variables + /// Below this section, OpLine and OpNoLine is allowed. + types_globals_constants: Section = .{}, + // Functions without a body - skip for now. + /// Regular function definitions. + functions: Section = .{}, +} = .{}, + +/// SPIR-V instructions return result-ids. This variable holds the module-wide counter for these. +next_result_id: Word, + +/// Cache for results of OpString instructions for module file names fed to OpSource. +/// Since OpString is pretty much only used for those, we don't need to keep track of all strings, +/// just the ones for OpLine. Note that OpLine needs the result of OpString, and not that of OpSource. +source_file_names: std.StringHashMapUnmanaged(IdRef) = .{}, + +pub fn init(gpa: Allocator, arena: Allocator) Module { + return .{ + .gpa = gpa, + .arena = arena, + .next_result_id = 1, // 0 is an invalid SPIR-V result id, so start counting at 1. + }; +} + +pub fn deinit(self: *Module) void { + self.sections.capabilities.deinit(self.gpa); + self.sections.extensions.deinit(self.gpa); + self.sections.entry_points.deinit(self.gpa); + self.sections.debug_strings.deinit(self.gpa); + self.sections.annotations.deinit(self.gpa); + self.sections.types_globals_constants.deinit(self.gpa); + self.sections.functions.deinit(self.gpa); + + self.source_file_names.deinit(self.gpa); + + self.* = undefined; +} + +pub fn allocId(self: *Module) spec.IdResult { + defer self.next_result_id += 1; + return .{.id = self.next_result_id}; +} + +pub fn idBound(self: Module) Word { + return self.next_result_id; +} + +/// Fetch the result-id of an OpString instruction that encodes the path of the source +/// file of the decl. This function may also emit an OpSource with source-level information regarding +/// the decl. +pub fn resolveSourceFileName(self: *Module, decl: *ZigDecl) !IdRef { + const path = decl.getFileScope().sub_file_path; + const result = try self.source_file_names.getOrPut(self.gpa, path); + if (!result.found_existing) { + const file_result_id = self.allocId(); + result.value_ptr.* = file_result_id.toRef(); + try self.sections.debug_strings.emit(self.gpa, .OpString, .{ + .id_result = file_result_id, + .string = path, + }); + + try self.sections.debug_strings.emit(self.gpa, .OpSource, .{ + .source_language = .Unknown, // TODO: Register Zig source language. + .version = 0, // TODO: Zig version as u32? + .file = file_result_id.toRef(), + .source = null, // TODO: Store actual source also? + }); + } + + return result.value_ptr.*; +} + +/// Emit this module as a spir-v binary. +pub fn flush(self: Module, file: std.fs.File) !void { + // See SPIR-V Spec section 2.3, "Physical Layout of a SPIR-V Module and Instruction" + + const header = [_]Word{ + spec.magic_number, + (spec.version.major << 16) | (spec.version.minor << 8), + 0, // TODO: Register Zig compiler magic number. + self.idBound(), + 0, // Schema (currently reserved for future use) + }; + + // Note: needs to be kept in order according to section 2.3! + const buffers = &[_][]const Word{ + &header, + self.sections.capabilities.toWords(), + self.sections.extensions.toWords(), + self.sections.entry_points.toWords(), + self.sections.debug_strings.toWords(), + self.sections.annotations.toWords(), + self.sections.types_globals_constants.toWords(), + self.sections.functions.toWords(), + }; + + var iovc_buffers: [buffers.len]std.os.iovec_const = undefined; + var file_size: u64 = 0; + for (iovc_buffers) |*iovc, i| { + // Note, since spir-v supports both little and big endian we can ignore byte order here and + // just treat the words as a sequence of bytes. + const bytes = std.mem.sliceAsBytes(buffers[i]); + iovc.* = .{ .iov_base = bytes.ptr, .iov_len = bytes.len }; + file_size += bytes.len; + } + + try file.seekTo(0); + try file.setEndPos(file_size); + try file.pwritevAll(&iovc_buffers, 0); +} diff --git a/src/codegen/spirv/Section.zig b/src/codegen/spirv/Section.zig index f5e2cf77b3..261bac596c 100644 --- a/src/codegen/spirv/Section.zig +++ b/src/codegen/spirv/Section.zig @@ -22,19 +22,36 @@ pub fn deinit(section: *Section, allocator: Allocator) void { section.* = undefined; } -fn writeWord(section: *Section, word: Word) void { - section.instructions.appendAssumeCapacity(word); -} - -fn writeWords(section: *Section, words: []const Word) void { - section.instructions.appendSliceAssumeCapacity(words); -} - -// Clear the instructions in this section +/// Clear the instructions in this section pub fn reset(section: *Section) void { section.instructions.items.len = 0; } +pub fn toWords(section: Section) []Word { + return section.instructions.items; +} + +/// Append the instructions from another section into this section. +pub fn append( + section: *Section, + allocator: Allocator, + other_section: Section +) !void { + try section.instructions.appendSlice(allocator, other_section.instructions.items); +} + +/// Write an instruction and size, operands are to be inserted manually. +pub fn emitRaw( + section: *Section, + allocator: Allocator, + opcode: Opcode, + operands: usize, // opcode itself not included +) !void { + const word_count = 1 + operands; + try section.instructions.ensureUnusedCapacity(allocator, word_count); + section.writeWord((@intCast(Word, word_count << 16)) | @enumToInt(opcode)); +} + pub fn emit( section: *Section, allocator: Allocator, @@ -43,10 +60,25 @@ pub fn emit( ) !void { const word_count = instructionSize(opcode, operands); try section.instructions.ensureUnusedCapacity(allocator, word_count); - section.instructions.appendAssumeCapacity(@intCast(Word, word_count << 16) | @enumToInt(opcode)); + section.writeWord(@intCast(Word, word_count << 16) | @enumToInt(opcode)); section.writeOperands(opcode.Operands(), operands); } +pub fn writeWord(section: *Section, word: Word) void { + section.instructions.appendAssumeCapacity(word); +} + +pub fn writeWords(section: *Section, words: []const Word) void { + section.instructions.appendSliceAssumeCapacity(words); +} + +fn writeDoubleWord(section: *Section, dword: DoubleWord) void { + section.writeWords(&.{ + @truncate(Word, dword), + @truncate(Word, dword >> @bitSizeOf(Word)), + }); +} + fn writeOperands(section: *Section, comptime Operands: type, operands: Operands) void { const fields = switch (@typeInfo(Operands)) { .Struct => |info| info.fields, @@ -59,7 +91,7 @@ fn writeOperands(section: *Section, comptime Operands: type, operands: Operands) } } -fn writeOperand(section: *Section, comptime Operand: type, operand: Operand) void { +pub fn writeOperand(section: *Section, comptime Operand: type, operand: Operand) void { switch (Operand) { spec.IdResultType, spec.IdResult, diff --git a/src/link/SpirV.zig b/src/link/SpirV.zig index 7c70260f0d..ee3205c9f5 100644 --- a/src/link/SpirV.zig +++ b/src/link/SpirV.zig @@ -32,20 +32,21 @@ const Module = @import("../Module.zig"); const Compilation = @import("../Compilation.zig"); const link = @import("../link.zig"); const codegen = @import("../codegen/spirv.zig"); -const Word = codegen.Word; -const ResultId = codegen.ResultId; const trace = @import("../tracy.zig").trace; const build_options = @import("build_options"); -const spec = @import("../codegen/spirv/spec.zig"); const Air = @import("../Air.zig"); const Liveness = @import("../Liveness.zig"); const Value = @import("../value.zig").Value; +const SpvModule = @import("../codegen/spirv/Module.zig"); +const spec = @import("../codegen/spirv/spec.zig"); +const IdResult = spec.IdResult; + // TODO: Should this struct be used at all rather than just a hashmap of aux data for every decl? pub const FnData = struct { // We're going to fill these in flushModule, and we're going to fill them unconditionally, // so just set it to undefined. - id: ResultId = undefined, + id: IdResult = undefined, }; base: link.File, @@ -194,7 +195,10 @@ pub fn flushModule(self: *SpirV, comp: *Compilation) !void { const module = self.base.options.module.?; const target = comp.getTarget(); - var spv = codegen.SPIRVModule.init(self.base.allocator, module); + var arena = std.heap.ArenaAllocator.init(self.base.allocator); + defer arena.deinit(); + + var spv = SpvModule.init(self.base.allocator, arena.allocator()); defer spv.deinit(); // Allocate an ID for every declaration before generating code, @@ -202,73 +206,38 @@ pub fn flushModule(self: *SpirV, comp: *Compilation) !void { // TODO: We're allocating an ID unconditionally now, are there // declarations which don't generate a result? // TODO: fn_link is used here, but thats probably not the right field. It will work anyway though. - { - for (self.decl_table.keys()) |decl| { - if (!decl.has_tv) continue; - - decl.fn_link.spirv.id = spv.allocResultId(); + for (self.decl_table.keys()) |decl| { + if (decl.has_tv) { + decl.fn_link.spirv.id = spv.allocId(); } } // Now, actually generate the code for all declarations. - { - var decl_gen = codegen.DeclGen.init(&spv); - defer decl_gen.deinit(); + var decl_gen = codegen.DeclGen.init(module, &spv); + defer decl_gen.deinit(); - var it = self.decl_table.iterator(); - while (it.next()) |entry| { - const decl = entry.key_ptr.*; - if (!decl.has_tv) continue; + var it = self.decl_table.iterator(); + while (it.next()) |entry| { + const decl = entry.key_ptr.*; + if (!decl.has_tv) continue; - const air = entry.value_ptr.air; - const liveness = entry.value_ptr.liveness; + const air = entry.value_ptr.air; + const liveness = entry.value_ptr.liveness; - if (try decl_gen.gen(decl, air, liveness)) |msg| { - try module.failed_decls.put(module.gpa, decl, msg); - return; // TODO: Attempt to generate more decls? - } + // Note, if `decl` is not a function, air/liveness may be undefined. + if (try decl_gen.gen(decl, air, liveness)) |msg| { + try module.failed_decls.put(module.gpa, decl, msg); + return; // TODO: Attempt to generate more decls? } } - try writeCapabilities(&spv.binary.capabilities_and_extensions, target); - try writeMemoryModel(&spv.binary.capabilities_and_extensions, target); + try writeCapabilities(&spv, target); + try writeMemoryModel(&spv, target); - const header = [_]Word{ - spec.magic_number, - (spec.version.major << 16) | (spec.version.minor << 8), - 0, // TODO: Register Zig compiler magic number. - spv.resultIdBound(), - 0, // Schema (currently reserved for future use in the SPIR-V spec). - }; - - // Note: The order of adding sections to the final binary - // follows the SPIR-V logical module format! - const buffers = &[_][]const Word{ - &header, - spv.binary.capabilities_and_extensions.items, - spv.binary.debug_strings.items, - spv.binary.types_globals_constants.items, - spv.binary.fn_decls.items, - }; - - var iovc_buffers: [buffers.len]std.os.iovec_const = undefined; - for (iovc_buffers) |*iovc, i| { - const bytes = std.mem.sliceAsBytes(buffers[i]); - iovc.* = .{ .iov_base = bytes.ptr, .iov_len = bytes.len }; - } - - var file_size: u64 = 0; - for (iovc_buffers) |iov| { - file_size += iov.iov_len; - } - - const file = self.base.file.?; - try file.seekTo(0); - try file.setEndPos(file_size); - try file.pwritevAll(&iovc_buffers, 0); + try spv.flush(self.base.file.?); } -fn writeCapabilities(binary: *std.ArrayList(Word), target: std.Target) !void { +fn writeCapabilities(spv: *SpvModule, target: std.Target) !void { // TODO: Integrate with a hypothetical feature system const cap: spec.Capability = switch (target.os.tag) { .opencl => .Kernel, @@ -277,10 +246,12 @@ fn writeCapabilities(binary: *std.ArrayList(Word), target: std.Target) !void { else => unreachable, // TODO }; - try codegen.writeInstruction(binary, .OpCapability, &[_]Word{@enumToInt(cap)}); + try spv.sections.capabilities.emit(spv.gpa, .OpCapability, .{ + .capability = cap, + }); } -fn writeMemoryModel(binary: *std.ArrayList(Word), target: std.Target) !void { +fn writeMemoryModel(spv: *SpvModule, target: std.Target) !void { const addressing_model = switch (target.os.tag) { .opencl => switch (target.cpu.arch) { .spirv32 => spec.AddressingModel.Physical32, @@ -298,8 +269,10 @@ fn writeMemoryModel(binary: *std.ArrayList(Word), target: std.Target) !void { else => unreachable, }; - try codegen.writeInstruction(binary, .OpMemoryModel, &[_]Word{ - @enumToInt(addressing_model), @enumToInt(memory_model), + // TODO: Put this in a proper section. + try spv.sections.capabilities.emit(spv.gpa, .OpMemoryModel, .{ + .addressing_model = addressing_model, + .memory_model = memory_model, }); }