From 18e94c355e78837e6fda6de9dfcd59a945a0ab80 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= <alex@alexrp.com>
Date: Tue, 13 Aug 2024 07:54:37 +0200
Subject: [PATCH] llvm: Also disable f16/f128 on aarch64_be with soft float.

---
 src/codegen/llvm.zig | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
index 6453ea04a3..3ac0658df8 100644
--- a/src/codegen/llvm.zig
+++ b/src/codegen/llvm.zig
@@ -11760,7 +11760,9 @@ fn backendSupportsF16(target: std.Target) bool {
         .mips64el,
         .s390x,
         => false,
-        .aarch64 => std.Target.aarch64.featureSetHas(target.cpu.features, .fp_armv8),
+        .aarch64,
+        .aarch64_be,
+        => std.Target.aarch64.featureSetHas(target.cpu.features, .fp_armv8),
         else => true,
     };
 }
@@ -11773,7 +11775,9 @@ fn backendSupportsF128(target: std.Target) bool {
         .amdgcn,
         .sparc,
         => false,
-        .aarch64 => std.Target.aarch64.featureSetHas(target.cpu.features, .fp_armv8),
+        .aarch64,
+        .aarch64_be,
+        => std.Target.aarch64.featureSetHas(target.cpu.features, .fp_armv8),
         else => true,
     };
 }