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compiler-rt: upgrade to stage2 fn ptr semantics
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@ -1,13 +1,21 @@
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const builtin = @import("builtin");
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const clz = @import("count0bits.zig");
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const testing = @import("std").testing;
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fn test__clzsi2(a: u32, expected: i32) !void {
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// XXX At high optimization levels this test may be horribly miscompiled if
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// one of the naked implementations is selected.
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var nakedClzsi2 = clz.__clzsi2;
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var actualClzsi2 = @ptrCast(fn (a: i32) callconv(.C) i32, nakedClzsi2);
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var x = @bitCast(i32, a);
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var result = actualClzsi2(x);
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const nakedClzsi2 = clz.__clzsi2;
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const fnProto = fn (a: i32) callconv(.C) i32;
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const fnProtoPtr = switch (builtin.zig_backend) {
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.stage1 => fnProto,
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else => *const fnProto,
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};
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const fn_ptr = switch (builtin.zig_backend) {
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.stage1 => nakedClzsi2,
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else => &nakedClzsi2,
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};
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const actualClzsi2 = @ptrCast(fnProtoPtr, fn_ptr);
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const x = @bitCast(i32, a);
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const result = actualClzsi2(x);
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try testing.expectEqual(expected, result);
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}
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@ -4,6 +4,8 @@ const native_arch = builtin.cpu.arch;
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// AArch64 is the only ABI (at the moment) to support f16 arguments without the
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// need for extending them to wider fp types.
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// TODO remove this; do this type selection in the language rather than
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// here in compiler-rt.
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pub const F16T = if (native_arch.isAARCH64()) f16 else u16;
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pub fn __truncsfhf2(a: f32) callconv(.C) F16T {
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@ -140,7 +142,8 @@ inline fn truncXfYf2(comptime dst_t: type, comptime src_t: type, a: src_t) dst_t
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}
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}
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const result: dst_rep_t align(@alignOf(dst_t)) = absResult | @truncate(dst_rep_t, sign >> @intCast(SrcShift, srcBits - dstBits));
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const result: dst_rep_t align(@alignOf(dst_t)) = absResult |
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@truncate(dst_rep_t, sign >> @intCast(SrcShift, srcBits - dstBits));
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return @bitCast(dst_t, result);
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}
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