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x86_64: fix issues with getting float fields

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This commit is contained in:
Jacob Young 2023-05-08 18:35:03 -04:00
parent e98e58691f
commit 1667e831cf
1 changed files with 18 additions and 19 deletions
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37
src/arch/x86_64/CodeGen.zig
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@ -5325,8 +5325,10 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void {
const index = extra.field_index; const index = extra.field_index;
const container_ty = self.air.typeOf(operand); const container_ty = self.air.typeOf(operand);
const container_rc = regClassForType(container_ty);
const field_ty = container_ty.structFieldType(index); const field_ty = container_ty.structFieldType(index);
if (!field_ty.hasRuntimeBitsIgnoreComptime()) break :result .none; if (!field_ty.hasRuntimeBitsIgnoreComptime()) break :result .none;
const field_rc = regClassForType(field_ty);
const src_mcv = try self.resolveInst(operand); const src_mcv = try self.resolveInst(operand);
const field_off = switch (container_ty.containerLayout()) { const field_off = switch (container_ty.containerLayout()) {
@ -5410,30 +5412,23 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void {
if (field_extra_bits > 0) try self.truncateRegister(field_ty, dst_reg); if (field_extra_bits > 0) try self.truncateRegister(field_ty, dst_reg);
const dst_mcv = MCValue{ .register = dst_reg }; const dst_mcv = MCValue{ .register = dst_reg };
const dst_rc = regClassForType(field_ty); break :result if (field_rc.supersetOf(gp))
if (dst_rc.eql(gp)) break :result dst_mcv; dst_mcv
else
const result_reg = try self.register_manager.allocReg(inst, dst_rc); try self.copyToRegisterWithInstTracking(inst, field_ty, dst_mcv);
try self.genSetReg(result_reg, field_ty, dst_mcv);
break :result .{ .register = result_reg };
}, },
.register => |reg| { .register => |reg| {
const reg_lock = self.register_manager.lockRegAssumeUnused(reg); const reg_lock = self.register_manager.lockRegAssumeUnused(reg);
defer self.register_manager.unlockReg(reg_lock); defer self.register_manager.unlockReg(reg_lock);
const dst_mcv = if (self.reuseOperand(inst, operand, 0, src_mcv)) const dst_reg = if (src_mcv.isRegister() and field_rc.supersetOf(container_rc) and
src_mcv self.reuseOperand(inst, operand, 0, src_mcv))
src_mcv.getReg().?
else else
try self.copyToRegisterWithInstTracking( try self.copyToTmpRegister(Type.usize, .{ .register = reg.to64() });
inst, const dst_mcv = MCValue{ .register = dst_reg };
Type.usize, const dst_lock = self.register_manager.lockReg(dst_reg);
.{ .register = reg.to64() }, defer if (dst_lock) |lock| self.register_manager.unlockReg(lock);
);
const dst_mcv_lock: ?RegisterLock = switch (dst_mcv) {
.register => |a_reg| self.register_manager.lockReg(a_reg),
else => null,
};
defer if (dst_mcv_lock) |lock| self.register_manager.unlockReg(lock);
// Shift by struct_field_offset. // Shift by struct_field_offset.
try self.genShiftBinOpMir( try self.genShiftBinOpMir(
@ -5460,7 +5455,11 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void {
registerAlias(dst_mcv.register, field_byte_size), registerAlias(dst_mcv.register, field_byte_size),
); );
} }
break :result dst_mcv;
break :result if (field_rc.supersetOf(gp))
dst_mcv
else
try self.copyToRegisterWithInstTracking(inst, field_ty, dst_mcv);
}, },
.register_overflow => |ro| { .register_overflow => |ro| {
switch (index) { switch (index) {