mirror/zig
1
0
Fork 0
mirror of https://github.com/ziglang/zig.git synced 2026-02-13 04:48:20 +00:00
Code Issues Packages Projects Releases Wiki Activity

x86_64: remove unused Mir encodings

Browse Source 
This also restores the size of Mir.Inst and simplifies logic in general.
This commit is contained in:
Jacob Young 2023-03-25 21:26:12 -04:00
parent a80be15cd4
commit 14c0b8c548
3 changed files with 13 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
src/arch/x86_64/CodeGen.zig
View File

@ -668,20 +668,11 @@ fn asmMemoryRegisterImmediate(
_ = try self.addInst(.{
.tag = tag,
.ops = switch (m) {
.sib => switch (imm) {
.signed => .mri_sib_s,
.unsigned => .mri_sib_u,
},
.rip => switch (imm) {
.signed => .mri_rip_s,
.unsigned => .mri_sib_u,
},
.sib => .mri_sib,
.rip => .mri_rip,
else => unreachable,
},
.data = .{ .rix = .{ .r = reg, .i = switch (imm) {
.signed => |s| @bitCast(u32, s),
.unsigned => |u| @intCast(u32, u),
}, .payload = switch (m) {
.data = .{ .rix = .{ .r = reg, .i = @intCast(u8, imm.unsigned), .payload = switch (m) {
.sib => try self.addExtra(Mir.MemorySib.encode(m)),
.rip => try self.addExtra(Mir.MemoryRip.encode(m)),
else => unreachable,

18
src/arch/x86_64/Emit.zig
View File

@ -359,27 +359,17 @@ fn mirEncodeGeneric(emit: *Emit, tag: Mir.Inst.Tag, inst: Mir.Inst.Index) InnerE
op2 = .{ .reg = data.rrx.r1 };
op2 = .{ .reg = data.rrx.r2 };
},
.mri_sib_u, .mri_sib_s => {
.mri_sib => {
const msib = emit.mir.extraData(Mir.MemorySib, data.rix.payload).data;
const imm = switch (ops) {
.mri_sib_s => Immediate.s(@bitCast(i32, data.rix.i)),
.mri_sib_u, .lock_mi_rip_u => Immediate.u(data.rix.i),
else => unreachable,
};
op1 = .{ .mem = Mir.MemorySib.decode(msib) };
op2 = .{ .reg = data.rix.r };
op3 = .{ .imm = imm };
op3 = .{ .imm = Immediate.u(data.rix.i) };
},
.mri_rip_u, .mri_rip_s => {
.mri_rip => {
const mrip = emit.mir.extraData(Mir.MemoryRip, data.rix.payload).data;
const imm = switch (ops) {
.mri_rip_s => Immediate.s(@bitCast(i32, data.rix.i)),
.mri_rip_u, .lock_mi_rip_u => Immediate.u(data.rix.i),
else => unreachable,
};
op1 = .{ .mem = Mir.MemoryRip.decode(mrip) };
op2 = .{ .reg = data.rix.r };
op3 = .{ .imm = imm };
op3 = .{ .imm = Immediate.u(data.rix.i) };
},
else => return emit.fail("TODO handle generic encoding: {s}, {s}", .{
@tagName(mnemonic),

18
src/arch/x86_64/Mir.zig
View File

@ -343,18 +343,12 @@ pub const Inst = struct {
/// Memory (RIP), register, register operands.
/// Uses `rrx` payload with extra data of type `MemoryRip`.
mrr_rip,
/// Memory (SIB), register, immediate (unsigned) operands.
/// Memory (SIB), register, immediate (byte) operands.
/// Uses `rix` payload with extra data of type `MemorySib`.
mri_sib_u,
/// Memory (RIP), register, immediate (unsigned) operands.
mri_sib,
/// Memory (RIP), register, immediate (byte) operands.
/// Uses `rix` payload with extra data of type `MemoryRip`.
mri_rip_u,
/// Memory (SIB), register, immediate (signed) operands.
/// Uses `rix` payload with extra data of type `MemorySib`.
mri_sib_s,
/// Memory (RIP), register, immediate (signed) operands.
/// Uses `rix` payload with extra data of type `MemoryRip`.
mri_rip_s,
mri_rip,
/// Rax, Memory moffs.
/// Uses `payload` with extra data of type `MemoryMoffs`.
rax_moffs,
@ -481,10 +475,10 @@ pub const Inst = struct {
r2: Register,
payload: u32,
},
/// Register, immediate, followed by Custom payload found in extra.
/// Register, byte immediate, followed by Custom payload found in extra.
rix: struct {
r: Register,
i: u32,
i: u8,
payload: u32,
},
/// String instruction prefix and width.