stage2: add x86_64 NOP MIR inst and lowering

If we don't touch the stack, ellide `sub rsp, imm32` to `nop`.

src/arch/x86_64/CodeGen.zig

@@ -405,6 +405,12 @@ fn gen(self: *Self) InnerError!void {
         const aligned_stack_end = mem.alignForward(stack_end, self.stack_align);
         if (aligned_stack_end > 0) {
             self.mir_instructions.items(.data)[backpatch_reloc].imm = @intCast(i32, aligned_stack_end);
+        } else {
+            self.mir_instructions.set(backpatch_reloc, .{
+                .tag = .nop,
+                .ops = undefined,
+                .data = undefined,
+            });
         }
 
         if (self.exitlude_jump_relocs.items.len == 1) {

src/arch/x86_64/Emit.zig

@@ -134,6 +134,7 @@ pub fn emitMir(emit: *Emit) InnerError!void {
             .@"test" => try emit.mirTest(inst),
 
             .brk => try emit.mirBrk(),
+            .nop => try emit.mirNop(),
 
             .call_extern => try emit.mirCallExtern(inst),
 
@@ -185,6 +186,11 @@ fn mirBrk(emit: *Emit) InnerError!void {
     encoder.opcode_1byte(0xcc);
 }
 
+fn mirNop(emit: *Emit) InnerError!void {
+    const encoder = try Encoder.init(emit.code, 1);
+    encoder.opcode_1byte(0x90);
+}
+
 fn mirSyscall(emit: *Emit) InnerError!void {
     const encoder = try Encoder.init(emit.code, 2);
     encoder.opcode_2byte(0x0f, 0x05);

src/arch/x86_64/Mir.zig

@@ -247,6 +247,9 @@ pub const Inst = struct {
         /// Breakpoint
         brk,
 
+        /// Nop
+        nop,
+
         /// Pseudo-instructions
         /// call extern function
         /// Notes: