From 0941364d70d14856c9f313f819458efd0add7c2a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= <alex@alexrp.com>
Date: Sun, 6 Oct 2024 11:55:44 +0200
Subject: [PATCH] compiler-rt: Always use f16 as the half type for riscv.

---
 lib/compiler_rt/common.zig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/compiler_rt/common.zig b/lib/compiler_rt/common.zig
index 786dc7303a..3b1f93f1c2 100644
--- a/lib/compiler_rt/common.zig
+++ b/lib/compiler_rt/common.zig
@@ -103,7 +103,7 @@ pub fn F16T(comptime OtherType: type) type {
         else
             u16,
         .aarch64, .aarch64_be => f16,
-        .riscv64 => if (builtin.zig_backend == .stage1) u16 else f16,
+        .riscv32, .riscv64 => f16,
         .x86, .x86_64 => if (builtin.target.isDarwin()) switch (OtherType) {
             // Starting with LLVM 16, Darwin uses different abi for f16
             // depending on the type of the other return/argument..???