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stage2: fix improper capacity prealloc in lowerToRm encoding

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This commit is contained in:
Jakub Konka 2022-01-22 00:58:18 +01:00
parent 5fb921539b
commit 062ddb693f
1 changed files with 1 additions and 1 deletions
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2
src/arch/x86_64/Emit.zig
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@ -1605,7 +1605,7 @@ fn lowerToRmEnc(
if (reg.size() != src_reg.size()) {
return error.OperandSizeMismatch;
}
const encoder = try Encoder.init(code, 3);
const encoder = try Encoder.init(code, 4);
encoder.rex(.{
.w = setRexWRegister(reg) or setRexWRegister(src_reg),
.r = reg.isExtended(),