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synced 2026-01-20 22:35:24 +00:00
std.os.linux: fix a bunch of syscall and time ABI issues on hexagon
I'm not particularly happy with sprinkling this check everywhere, but the situation should improve once we complete the time64 migration.
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3b5376eff5
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@ -533,9 +533,10 @@ fn getauxvalImpl(index: usize) callconv(.c) usize {
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// Some architectures (and some syscalls) require 64bit parameters to be passed
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// in a even-aligned register pair.
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const require_aligned_register_pair =
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builtin.cpu.arch.isPowerPC32() or
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builtin.cpu.arch.isArm() or
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builtin.cpu.arch == .hexagon or
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builtin.cpu.arch.isMIPS32() or
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builtin.cpu.arch.isArm();
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builtin.cpu.arch.isPowerPC32();
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// Split a 64bit value into a {LSB,MSB} pair.
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// The LE/BE variants specify the endianness to assume.
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@ -640,7 +641,7 @@ pub fn futimens(fd: i32, times: ?*const [2]timespec) usize {
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pub fn utimensat(dirfd: i32, path: ?[*:0]const u8, times: ?*const [2]timespec, flags: u32) usize {
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return syscall4(
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if (@hasField(SYS, "utimensat")) .utimensat else .utimensat_time64,
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if (@hasField(SYS, "utimensat") and native_arch != .hexagon) .utimensat else .utimensat_time64,
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@as(usize, @bitCast(@as(isize, dirfd))),
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@intFromPtr(path),
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@intFromPtr(times),
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@ -688,7 +689,7 @@ pub const futex_param4 = extern union {
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/// defines which of the subsequent paramters are relevant.
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pub fn futex(uaddr: *const anyopaque, futex_op: FUTEX_OP, val: u32, val2timeout: futex_param4, uaddr2: ?*const anyopaque, val3: u32) usize {
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return syscall6(
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if (@hasField(SYS, "futex")) .futex else .futex_time64,
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if (@hasField(SYS, "futex") and native_arch != .hexagon) .futex else .futex_time64,
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@intFromPtr(uaddr),
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@as(u32, @bitCast(futex_op)),
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val,
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@ -702,7 +703,7 @@ pub fn futex(uaddr: *const anyopaque, futex_op: FUTEX_OP, val: u32, val2timeout:
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/// futex_op that ignores the remaining arguments (e.g., FUTUX_OP.WAKE).
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pub fn futex_3arg(uaddr: *const anyopaque, futex_op: FUTEX_OP, val: u32) usize {
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return syscall3(
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if (@hasField(SYS, "futex")) .futex else .futex_time64,
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if (@hasField(SYS, "futex") and native_arch != .hexagon) .futex else .futex_time64,
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@intFromPtr(uaddr),
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@as(u32, @bitCast(futex_op)),
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val,
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@ -713,7 +714,7 @@ pub fn futex_3arg(uaddr: *const anyopaque, futex_op: FUTEX_OP, val: u32) usize {
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/// futex_op that ignores the remaining arguments (e.g., FUTEX_OP.WAIT).
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pub fn futex_4arg(uaddr: *const anyopaque, futex_op: FUTEX_OP, val: u32, timeout: ?*const timespec) usize {
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return syscall4(
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if (@hasField(SYS, "futex")) .futex else .futex_time64,
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if (@hasField(SYS, "futex") and native_arch != .hexagon) .futex else .futex_time64,
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@intFromPtr(uaddr),
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@as(u32, @bitCast(futex_op)),
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val,
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@ -1093,7 +1094,7 @@ pub fn poll(fds: [*]pollfd, n: nfds_t, timeout: i32) usize {
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pub fn ppoll(fds: [*]pollfd, n: nfds_t, timeout: ?*timespec, sigmask: ?*const sigset_t) usize {
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return syscall5(
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if (@hasField(SYS, "ppoll")) .ppoll else .ppoll_time64,
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if (@hasField(SYS, "ppoll") and native_arch != .hexagon) .ppoll else .ppoll_time64,
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@intFromPtr(fds),
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n,
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@intFromPtr(timeout),
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@ -1627,7 +1628,7 @@ pub fn clock_gettime(clk_id: clockid_t, tp: *timespec) usize {
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}
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}
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return syscall2(
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if (@hasField(SYS, "clock_gettime")) .clock_gettime else .clock_gettime64,
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if (@hasField(SYS, "clock_gettime") and native_arch != .hexagon) .clock_gettime else .clock_gettime64,
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@intFromEnum(clk_id),
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@intFromPtr(tp),
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);
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@ -1645,7 +1646,7 @@ fn init_vdso_clock_gettime(clk: clockid_t, ts: *timespec) callconv(.c) usize {
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pub fn clock_getres(clk_id: i32, tp: *timespec) usize {
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return syscall2(
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if (@hasField(SYS, "clock_getres")) .clock_getres else .clock_getres_time64,
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if (@hasField(SYS, "clock_getres") and native_arch != .hexagon) .clock_getres else .clock_getres_time64,
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@as(usize, @bitCast(@as(isize, clk_id))),
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@intFromPtr(tp),
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);
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@ -1653,7 +1654,7 @@ pub fn clock_getres(clk_id: i32, tp: *timespec) usize {
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pub fn clock_settime(clk_id: i32, tp: *const timespec) usize {
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return syscall2(
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if (@hasField(SYS, "clock_settime")) .clock_settime else .clock_settime64,
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if (@hasField(SYS, "clock_settime") and native_arch != .hexagon) .clock_settime else .clock_settime64,
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@as(usize, @bitCast(@as(isize, clk_id))),
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@intFromPtr(tp),
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);
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@ -1661,7 +1662,7 @@ pub fn clock_settime(clk_id: i32, tp: *const timespec) usize {
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pub fn clock_nanosleep(clockid: clockid_t, flags: TIMER, request: *const timespec, remain: ?*timespec) usize {
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return syscall4(
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if (@hasField(SYS, "clock_nanosleep")) .clock_nanosleep else .clock_nanosleep_time64,
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if (@hasField(SYS, "clock_nanosleep") and native_arch != .hexagon) .clock_nanosleep else .clock_nanosleep_time64,
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@intFromEnum(clockid),
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@as(u32, @bitCast(flags)),
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@intFromPtr(request),
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@ -2071,7 +2072,7 @@ pub fn recvmsg(fd: i32, msg: *msghdr, flags: u32) usize {
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pub fn recvmmsg(fd: i32, msgvec: ?[*]mmsghdr, vlen: u32, flags: u32, timeout: ?*timespec) usize {
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return syscall5(
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if (@hasField(SYS, "recvmmsg")) .recvmmsg else .recvmmsg_time64,
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if (@hasField(SYS, "recvmmsg") and native_arch != .hexagon) .recvmmsg else .recvmmsg_time64,
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@as(usize, @bitCast(@as(isize, fd))),
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@intFromPtr(msgvec),
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vlen,
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@ -2421,7 +2422,7 @@ pub const itimerspec = extern struct {
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pub fn timerfd_gettime(fd: i32, curr_value: *itimerspec) usize {
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return syscall2(
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if (@hasField(SYS, "timerfd_gettime")) .timerfd_gettime else .timerfd_gettime64,
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if (@hasField(SYS, "timerfd_gettime") and native_arch != .hexagon) .timerfd_gettime else .timerfd_gettime64,
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@bitCast(@as(isize, fd)),
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@intFromPtr(curr_value),
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);
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@ -2429,7 +2430,7 @@ pub fn timerfd_gettime(fd: i32, curr_value: *itimerspec) usize {
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pub fn timerfd_settime(fd: i32, flags: TFD.TIMER, new_value: *const itimerspec, old_value: ?*itimerspec) usize {
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return syscall4(
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if (@hasField(SYS, "timerfd_settime")) .timerfd_settime else .timerfd_settime64,
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if (@hasField(SYS, "timerfd_settime") and native_arch != .hexagon) .timerfd_settime else .timerfd_settime64,
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@bitCast(@as(isize, fd)),
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@as(u32, @bitCast(flags)),
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@intFromPtr(new_value),
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@ -2632,7 +2633,7 @@ pub fn process_vm_writev(pid: pid_t, local: []const iovec_const, remote: []const
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}
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pub fn fadvise(fd: fd_t, offset: i64, len: i64, advice: usize) usize {
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if (comptime native_arch.isArm() or native_arch.isPowerPC32()) {
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if (comptime native_arch.isArm() or native_arch == .hexagon or native_arch.isPowerPC32()) {
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// These architectures reorder the arguments so that a register is not skipped to align the
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// register number that `offset` is passed in.
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@ -8367,7 +8368,7 @@ pub const kernel_timespec = extern struct {
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};
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// https://github.com/ziglang/zig/issues/4726#issuecomment-2190337877
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pub const timespec = if (native_arch == .riscv32) kernel_timespec else extern struct {
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pub const timespec = if (native_arch == .hexagon or native_arch == .riscv32) kernel_timespec else extern struct {
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sec: isize,
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nsec: isize,
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};
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@ -170,7 +170,7 @@ pub const Flock = extern struct {
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pub const blksize_t = i32;
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pub const nlink_t = u32;
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pub const time_t = i32;
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pub const time_t = i64;
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pub const mode_t = u32;
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pub const off_t = i64;
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pub const ino_t = u64;
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