From 020f99d893be794376eea329af06838474744e80 Mon Sep 17 00:00:00 2001
From: Jakub Konka <kubkon@jakubkonka.com>
Date: Wed, 18 May 2022 12:50:19 +0200
Subject: [PATCH] x64: remove special-casing of AVX for br()

---
 src/arch/x86_64/CodeGen.zig | 11 +----------
 1 file changed, 1 insertion(+), 10 deletions(-)

diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig
index 7f41d62141..6d7684eef8 100644
--- a/src/arch/x86_64/CodeGen.zig
+++ b/src/arch/x86_64/CodeGen.zig
@@ -5042,21 +5042,12 @@ fn br(self: *Self, block: Air.Inst.Index, operand: Air.Inst.Ref) !void {
         if (block_mcv == .none) {
             block_data.mcv = switch (operand_mcv) {
                 .none, .dead, .unreach => unreachable,
-                .stack_offset, .memory => operand_mcv,
+                .register, .stack_offset, .memory => operand_mcv,
                 .compare_flags_signed, .compare_flags_unsigned, .immediate => blk: {
                     const new_mcv = try self.allocRegOrMem(block, true);
                     try self.setRegOrMem(self.air.typeOfIndex(block), new_mcv, operand_mcv);
                     break :blk new_mcv;
                 },
-                .register => blk: {
-                    if (self.air.typeOfIndex(block).zigTypeTag() == .Float) {
-                        // TODO not needed; return operand_mcv ones we can transfer between XMM registers
-                        const new_mcv = try self.allocRegOrMem(block, false);
-                        try self.setRegOrMem(self.air.typeOfIndex(block), new_mcv, operand_mcv);
-                        break :blk new_mcv;
-                    }
-                    break :blk operand_mcv;
-                },
                 else => return self.fail("TODO implement block_data.mcv = operand_mcv for {}", .{operand_mcv}),
             };
         } else {