mirror of
https://github.com/ziglang/zig.git
synced 2026-01-20 22:35:24 +00:00
x86_64: fix some of the mass confusion about the meaning of MCValue
This commit is contained in:
Jacob Young
parent
e2fe1907ec
commit
0165187cd0
@ -3569,7 +3569,12 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
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return self.genSetStack(elem_ty, off, MCValue{ .register = tmp_reg }, .{});
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}
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try self.genInlineMemcpy(dst_mcv, ptr, .{ .immediate = abi_size }, .{});
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try self.genInlineMemcpy(
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.{ .ptr_stack_offset = off },
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ptr,
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.{ .immediate = abi_size },
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.{},
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);
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},
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else => return self.fail("TODO implement loading from register into {}", .{dst_mcv}),
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}
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@ -3745,22 +3750,47 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type
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-@intCast(i32, overflow_bit_offset),
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);
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},
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.linker_load, .memory, .stack_offset => if (abi_size <= 8) {
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.memory, .linker_load => if (abi_size <= 8) {
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const tmp_reg = try self.copyToTmpRegister(value_ty, value);
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const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg);
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defer self.register_manager.unlockReg(tmp_lock);
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try self.store(ptr, .{ .register = tmp_reg }, ptr_ty, value_ty);
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} else {
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const addr_reg = try self.register_manager.allocReg(null, gp);
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const addr_lock = self.register_manager.lockRegAssumeUnused(addr_reg);
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defer self.register_manager.unlockReg(addr_lock);
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try self.loadMemPtrIntoRegister(addr_reg, Type.usize, value);
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try self.genInlineMemcpy(
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ptr,
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.{ .register = addr_reg },
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.{ .immediate = abi_size },
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.{},
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);
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},
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.stack_offset => |off| if (abi_size <= 8) {
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const tmp_reg = try self.copyToTmpRegister(value_ty, value);
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const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg);
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defer self.register_manager.unlockReg(tmp_lock);
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try self.store(ptr, .{ .register = tmp_reg }, ptr_ty, value_ty);
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} else try self.genInlineMemcpy(
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.{ .stack_offset = 0 },
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value,
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ptr,
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.{ .ptr_stack_offset = off },
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.{ .immediate = abi_size },
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.{ .source_stack_base = .rbp, .dest_stack_base = reg.to64() },
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.{},
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),
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.ptr_stack_offset => {
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const tmp_reg = try self.copyToTmpRegister(value_ty, value);
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const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg);
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defer self.register_manager.unlockReg(tmp_lock);
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try self.store(ptr, .{ .register = tmp_reg }, ptr_ty, value_ty);
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},
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}
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},
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.linker_load, .memory => {
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.memory, .linker_load => {
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const value_lock: ?RegisterLock = switch (value) {
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.register => |reg| self.register_manager.lockReg(reg),
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else => null,
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@ -5530,14 +5560,7 @@ fn airRet(self: *Self, inst: Air.Inst.Index) !void {
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assert(ret_ty.isError());
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},
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.stack_offset => {
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const reg = try self.copyToTmpRegister(Type.usize, self.ret_mcv);
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const reg_lock = self.register_manager.lockRegAssumeUnused(reg);
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defer self.register_manager.unlockReg(reg_lock);
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try self.genSetStack(ret_ty, 0, operand, .{
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.source_stack_base = .rbp,
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.dest_stack_base = reg,
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});
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try self.store(self.ret_mcv, operand, Type.usize, ret_ty);
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},
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else => {
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try self.setRegOrMem(ret_ty, self.ret_mcv, operand);
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@ -5556,6 +5579,7 @@ fn airRetLoad(self: *Self, inst: Air.Inst.Index) !void {
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const ptr = try self.resolveInst(un_op);
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const ptr_ty = self.air.typeOf(un_op);
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const elem_ty = ptr_ty.elemType();
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const abi_size = elem_ty.abiSize(self.target.*);
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switch (self.ret_mcv) {
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.immediate => {
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assert(elem_ty.isError());
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@ -5565,10 +5589,7 @@ fn airRetLoad(self: *Self, inst: Air.Inst.Index) !void {
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const reg_lock = self.register_manager.lockRegAssumeUnused(reg);
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defer self.register_manager.unlockReg(reg_lock);
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try self.genInlineMemcpy(.{ .stack_offset = 0 }, ptr, .{ .immediate = elem_ty.abiSize(self.target.*) }, .{
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.source_stack_base = .rbp,
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.dest_stack_base = reg,
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});
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try self.genInlineMemcpy(.{ .register = reg }, ptr, .{ .immediate = abi_size }, .{});
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},
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else => {
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try self.load(self.ret_mcv, ptr, ptr_ty);
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@ -6838,7 +6859,7 @@ fn genSetStackArg(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerE
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return self.genSetStackArg(ty, stack_offset, MCValue{ .register = reg });
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}
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try self.genInlineMemset(
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.{ .stack_offset = stack_offset },
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.{ .ptr_stack_offset = stack_offset },
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.{ .immediate = 0xaa },
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.{ .immediate = abi_size },
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.{ .dest_stack_base = .rsp },
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@ -6877,10 +6898,17 @@ fn genSetStackArg(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerE
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return self.genSetStackArg(ty, stack_offset, MCValue{ .register = reg });
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}
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try self.genInlineMemcpy(.{ .stack_offset = stack_offset }, mcv, .{ .immediate = abi_size }, .{
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.source_stack_base = .rbp,
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.dest_stack_base = .rsp,
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});
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const addr_reg = try self.register_manager.allocReg(null, gp);
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const addr_lock = self.register_manager.lockRegAssumeUnused(addr_reg);
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defer self.register_manager.unlockReg(addr_lock);
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try self.loadMemPtrIntoRegister(addr_reg, Type.usize, mcv);
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try self.genInlineMemcpy(
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.{ .ptr_stack_offset = stack_offset },
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.{ .register = addr_reg },
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.{ .immediate = abi_size },
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.{ .dest_stack_base = .rsp },
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);
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},
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.register => |reg| {
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switch (ty.zigTypeTag()) {
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@ -6920,16 +6948,18 @@ fn genSetStackArg(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerE
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const reg = try self.copyToTmpRegister(ty, mcv);
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return self.genSetStackArg(ty, stack_offset, MCValue{ .register = reg });
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},
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.stack_offset => {
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.stack_offset => |mcv_off| {
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if (abi_size <= 8) {
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const reg = try self.copyToTmpRegister(ty, mcv);
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return self.genSetStackArg(ty, stack_offset, MCValue{ .register = reg });
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}
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try self.genInlineMemcpy(.{ .stack_offset = stack_offset }, mcv, .{ .immediate = abi_size }, .{
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.source_stack_base = .rbp,
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.dest_stack_base = .rsp,
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});
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try self.genInlineMemcpy(
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.{ .ptr_stack_offset = stack_offset },
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.{ .ptr_stack_offset = mcv_off },
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.{ .immediate = abi_size },
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.{ .dest_stack_base = .rsp },
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);
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},
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}
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}
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@ -6963,7 +6993,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue, opts: Inl
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opts,
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),
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else => |x| return self.genInlineMemset(
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.{ .stack_offset = stack_offset },
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.{ .ptr_stack_offset = stack_offset },
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.{ .immediate = 0xaa },
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.{ .immediate = x },
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opts,
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@ -7072,22 +7102,40 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue, opts: Inl
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},
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}
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},
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.memory, .linker_load, .stack_offset, .ptr_stack_offset => {
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switch (mcv) {
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else => unreachable,
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.memory, .linker_load, .ptr_stack_offset => {},
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.stack_offset => |src_off| if (stack_offset == src_off) {
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// Copy stack variable to itself; nothing to do.
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return;
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},
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}
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.memory, .linker_load => if (abi_size <= 8) {
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const reg = try self.copyToTmpRegister(ty, mcv);
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return self.genSetStack(ty, stack_offset, MCValue{ .register = reg }, opts);
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} else {
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const addr_reg = try self.register_manager.allocReg(null, gp);
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const addr_lock = self.register_manager.lockRegAssumeUnused(addr_reg);
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defer self.register_manager.unlockReg(addr_lock);
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if (abi_size <= 8) {
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const reg = try self.copyToTmpRegister(ty, mcv);
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return self.genSetStack(ty, stack_offset, MCValue{ .register = reg }, opts);
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}
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try self.loadMemPtrIntoRegister(addr_reg, Type.usize, mcv);
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try self.genInlineMemcpy(
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.{ .ptr_stack_offset = stack_offset },
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.{ .register = addr_reg },
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.{ .immediate = abi_size },
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.{},
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);
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},
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.stack_offset => |off| if (abi_size <= 8) {
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const tmp_reg = try self.copyToTmpRegister(ty, mcv);
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const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg);
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defer self.register_manager.unlockReg(tmp_lock);
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try self.genInlineMemcpy(.{ .stack_offset = stack_offset }, mcv, .{ .immediate = abi_size }, opts);
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try self.genSetStack(ty, stack_offset, .{ .register = tmp_reg }, opts);
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} else try self.genInlineMemcpy(
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.{ .ptr_stack_offset = stack_offset },
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.{ .ptr_stack_offset = off },
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.{ .immediate = abi_size },
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.{},
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),
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.ptr_stack_offset => {
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const tmp_reg = try self.copyToTmpRegister(ty, mcv);
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const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg);
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defer self.register_manager.unlockReg(tmp_lock);
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try self.genSetStack(ty, stack_offset, .{ .register = tmp_reg }, opts);
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},
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}
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}
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@ -7134,10 +7182,14 @@ fn genInlineMemcpyRegisterRegister(
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next_offset -= nearest_power_of_two;
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}
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} else {
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try self.asmMemoryRegister(.mov, Memory.sib(Memory.PtrSize.fromSize(abi_size), .{
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.base = dst_reg,
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.disp = -offset,
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}), registerAlias(src_reg, abi_size));
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try self.asmMemoryRegister(
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switch (src_reg.class()) {
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.general_purpose, .segment => .mov,
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.floating_point => .movss,
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},
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Memory.sib(Memory.PtrSize.fromSize(abi_size), .{ .base = dst_reg, .disp = -offset }),
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registerAlias(src_reg, abi_size),
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);
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}
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}
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@ -7170,9 +7222,15 @@ fn genInlineMemcpy(
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switch (dst_ptr) {
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.memory, .linker_load => {
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try self.loadMemPtrIntoRegister(.rdi, Type.usize, dst_ptr);
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// Load the pointer, which is stored in memory
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try self.asmRegisterMemory(.mov, .rdi, Memory.sib(.qword, .{ .base = .rdi }));
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},
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.ptr_stack_offset, .stack_offset => |off| {
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try self.asmRegisterMemory(.lea, .rdi, Memory.sib(.qword, .{
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.stack_offset, .ptr_stack_offset => |off| {
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try self.asmRegisterMemory(switch (dst_ptr) {
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.stack_offset => .mov,
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.ptr_stack_offset => .lea,
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else => unreachable,
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}, .rdi, Memory.sib(.qword, .{
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.base = opts.dest_stack_base orelse .rbp,
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.disp = -off,
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}));
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@ -7192,9 +7250,15 @@ fn genInlineMemcpy(
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switch (src_ptr) {
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.memory, .linker_load => {
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try self.loadMemPtrIntoRegister(.rsi, Type.usize, src_ptr);
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// Load the pointer, which is stored in memory
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try self.asmRegisterMemory(.mov, .rsi, Memory.sib(.qword, .{ .base = .rsi }));
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},
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.ptr_stack_offset, .stack_offset => |off| {
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try self.asmRegisterMemory(.lea, .rsi, Memory.sib(.qword, .{
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.stack_offset, .ptr_stack_offset => |off| {
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try self.asmRegisterMemory(switch (src_ptr) {
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.stack_offset => .mov,
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.ptr_stack_offset => .lea,
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else => unreachable,
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}, .rsi, Memory.sib(.qword, .{
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.base = opts.source_stack_base orelse .rbp,
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.disp = -off,
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}));
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@ -7237,9 +7301,15 @@ fn genInlineMemset(
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switch (dst_ptr) {
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.memory, .linker_load => {
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try self.loadMemPtrIntoRegister(.rdi, Type.usize, dst_ptr);
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// Load the pointer, which is stored in memory
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try self.asmRegisterMemory(.mov, .rdi, Memory.sib(.qword, .{ .base = .rdi }));
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},
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.ptr_stack_offset, .stack_offset => |off| {
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try self.asmRegisterMemory(.lea, .rdi, Memory.sib(.qword, .{
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.stack_offset, .ptr_stack_offset => |off| {
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try self.asmRegisterMemory(switch (dst_ptr) {
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.stack_offset => .mov,
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.ptr_stack_offset => .lea,
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else => unreachable,
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}, .rdi, Memory.sib(.qword, .{
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.base = opts.dest_stack_base orelse .rbp,
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.disp = -off,
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}));
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@ -7979,7 +8049,6 @@ fn airMemcpy(self: *Self, inst: Air.Inst.Index) !void {
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};
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defer if (dst_ptr_lock) |lock| self.register_manager.unlockReg(lock);
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const src_ty = self.air.typeOf(extra.lhs);
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const src_ptr = try self.resolveInst(extra.lhs);
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const src_ptr_lock: ?RegisterLock = switch (src_ptr) {
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.register => |reg| self.register_manager.lockRegAssumeUnused(reg),
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@ -7994,25 +8063,7 @@ fn airMemcpy(self: *Self, inst: Air.Inst.Index) !void {
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};
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defer if (len_lock) |lock| self.register_manager.unlockReg(lock);
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// TODO Is this the only condition for pointer dereference for memcpy?
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const src: MCValue = blk: {
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switch (src_ptr) {
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.linker_load, .memory => {
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const reg = try self.register_manager.allocReg(null, gp);
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try self.loadMemPtrIntoRegister(reg, src_ty, src_ptr);
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try self.asmRegisterMemory(.mov, reg, Memory.sib(.qword, .{ .base = reg }));
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break :blk MCValue{ .register = reg };
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},
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else => break :blk src_ptr,
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}
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};
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const src_lock: ?RegisterLock = switch (src) {
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.register => |reg| self.register_manager.lockReg(reg),
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else => null,
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};
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defer if (src_lock) |lock| self.register_manager.unlockReg(lock);
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try self.genInlineMemcpy(dst_ptr, src, len, .{});
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try self.genInlineMemcpy(dst_ptr, src_ptr, len, .{});
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return self.finishAir(inst, .none, .{ pl_op.operand, extra.lhs, extra.rhs });
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}
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@ -8156,11 +8207,10 @@ fn airAggregateInit(self: *Self, inst: Air.Inst.Index) !void {
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switch (result_ty.zigTypeTag()) {
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.Struct => {
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const stack_offset = @intCast(i32, try self.allocMem(inst, abi_size, abi_align));
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const dst_mcv = MCValue{ .stack_offset = stack_offset };
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if (result_ty.containerLayout() == .Packed) {
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const struct_obj = result_ty.castTag(.@"struct").?.data;
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try self.genInlineMemset(
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dst_mcv,
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.{ .ptr_stack_offset = stack_offset },
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.{ .immediate = 0 },
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.{ .immediate = abi_size },
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.{},
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@ -8236,7 +8286,7 @@ fn airAggregateInit(self: *Self, inst: Air.Inst.Index) !void {
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const elem_mcv = try self.resolveInst(elem);
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try self.genSetStack(elem_ty, stack_offset - elem_off, elem_mcv, .{});
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}
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break :res dst_mcv;
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break :res .{ .stack_offset = stack_offset };
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},
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.Array => {
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const stack_offset = @intCast(i32, try self.allocMem(inst, abi_size, abi_align));
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@ -190,7 +190,6 @@ test "nested arrays of strings" {
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if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
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const array_of_strings = [_][]const u8{ "hello", "this", "is", "my", "thing" };
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for (array_of_strings, 0..) |s, i| {
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@ -12,7 +12,6 @@ var keys: Keys = undefined;
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test "zero keys with @memset" {
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if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
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@memset(@ptrCast([*]u8, &keys), 0, @sizeOf(@TypeOf(keys)));
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@ -79,7 +79,6 @@ fn genExpression(expr: Expression) !ExpressionResult {
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test {
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if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_x86) return error.SkipZigTest; // TODO
|
||||
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
|
||||
if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
|
||||
|
||||
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Reference in New Issue
Block a user