mirror of
https://github.com/ziglang/zig.git
synced 2026-01-03 12:03:19 +00:00
fixups for @splat
* Fix codegen for splat - instead of giving vectors of length N to shufflevector for both of the operands, it gives vectors of length 1. The mask vector is the only one that needs N elements. * Separate Splat into SplatSrc and SplatGen; the `len` is not needed once it gets to codegen since it is redundant with the result type. * Refactor compile error for wrong vector element type so that the compile error message is not duplicated in zig source code * Improve implementation to correctly handle comptime values such as undefined and lazy values. * Improve compile error for bad vector element type to point to the correct place. * Delete dead code. * Modify behavior test to use an array cast instead of vector element indexing since I'm merging this splat commit out-of-order from Shawn's patch set.
This commit is contained in:
parent
01577a3af4
commit
005a54a853
@ -2432,7 +2432,8 @@ enum IrInstructionId {
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IrInstructionIdIntType,
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IrInstructionIdVectorType,
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IrInstructionIdShuffleVector,
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IrInstructionIdSplat,
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IrInstructionIdSplatSrc,
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IrInstructionIdSplatGen,
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IrInstructionIdBoolNot,
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IrInstructionIdMemset,
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IrInstructionIdMemcpy,
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@ -3683,13 +3684,19 @@ struct IrInstructionShuffleVector {
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IrInstruction *mask; // This is in zig-format, not llvm format
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};
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struct IrInstructionSplat {
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struct IrInstructionSplatSrc {
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IrInstruction base;
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IrInstruction *len;
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IrInstruction *scalar;
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};
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struct IrInstructionSplatGen {
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IrInstruction base;
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IrInstruction *scalar;
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};
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struct IrInstructionAssertZero {
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IrInstruction base;
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@ -4619,18 +4619,16 @@ static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executabl
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llvm_mask_value, "");
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}
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static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInstructionSplat *instruction) {
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uint64_t len = bigint_as_u64(&instruction->len->value.data.x_bigint);
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LLVMValueRef wrapped_scalar_undef = LLVMGetUndef(instruction->base.value.type->llvm_type);
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LLVMValueRef wrapped_scalar = LLVMBuildInsertElement(g->builder, wrapped_scalar_undef,
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ir_llvm_value(g, instruction->scalar),
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LLVMConstInt(LLVMInt32Type(), 0, false),
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"");
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return LLVMBuildShuffleVector(g->builder,
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wrapped_scalar,
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wrapped_scalar_undef,
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LLVMConstNull(LLVMVectorType(g->builtin_types.entry_u32->llvm_type, (uint32_t)len)),
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"");
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static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInstructionSplatGen *instruction) {
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ZigType *result_type = instruction->base.value.type;
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src_assert(result_type->id == ZigTypeIdVector, instruction->base.source_node);
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uint32_t len = result_type->data.vector.len;
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LLVMTypeRef op_llvm_type = LLVMVectorType(get_llvm_type(g, instruction->scalar->value.type), 1);
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LLVMTypeRef mask_llvm_type = LLVMVectorType(LLVMInt32Type(), len);
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LLVMValueRef undef_vector = LLVMGetUndef(op_llvm_type);
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LLVMValueRef op_vector = LLVMBuildInsertElement(g->builder, undef_vector,
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ir_llvm_value(g, instruction->scalar), LLVMConstInt(LLVMInt32Type(), 0, false), "");
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return LLVMBuildShuffleVector(g->builder, op_vector, undef_vector, LLVMConstNull(mask_llvm_type), "");
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}
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static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutable *executable, IrInstructionPopCount *instruction) {
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@ -6000,6 +5998,7 @@ static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable,
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case IrInstructionIdFrameSizeSrc:
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case IrInstructionIdAllocaGen:
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case IrInstructionIdAwaitSrc:
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case IrInstructionIdSplatSrc:
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zig_unreachable();
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case IrInstructionIdDeclVarGen:
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@ -6160,8 +6159,8 @@ static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable,
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return ir_render_spill_end(g, executable, (IrInstructionSpillEnd *)instruction);
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case IrInstructionIdShuffleVector:
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return ir_render_shuffle_vector(g, executable, (IrInstructionShuffleVector *) instruction);
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case IrInstructionIdSplat:
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return ir_render_splat(g, executable, (IrInstructionSplat *) instruction);
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case IrInstructionIdSplatGen:
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return ir_render_splat(g, executable, (IrInstructionSplatGen *) instruction);
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}
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zig_unreachable();
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}
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95
src/ir.cpp
95
src/ir.cpp
@ -721,8 +721,12 @@ static constexpr IrInstructionId ir_instruction_id(IrInstructionShuffleVector *)
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return IrInstructionIdShuffleVector;
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}
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static constexpr IrInstructionId ir_instruction_id(IrInstructionSplat *) {
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return IrInstructionIdSplat;
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static constexpr IrInstructionId ir_instruction_id(IrInstructionSplatSrc *) {
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return IrInstructionIdSplatSrc;
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}
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static constexpr IrInstructionId ir_instruction_id(IrInstructionSplatGen *) {
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return IrInstructionIdSplatGen;
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}
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static constexpr IrInstructionId ir_instruction_id(IrInstructionBoolNot *) {
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@ -2304,10 +2308,10 @@ static IrInstruction *ir_build_shuffle_vector(IrBuilder *irb, Scope *scope, AstN
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return &instruction->base;
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}
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static IrInstruction *ir_build_splat(IrBuilder *irb, Scope *scope, AstNode *source_node,
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static IrInstruction *ir_build_splat_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
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IrInstruction *len, IrInstruction *scalar)
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{
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IrInstructionSplat *instruction = ir_build_instruction<IrInstructionSplat>(irb, scope, source_node);
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IrInstructionSplatSrc *instruction = ir_build_instruction<IrInstructionSplatSrc>(irb, scope, source_node);
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instruction->len = len;
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instruction->scalar = scalar;
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@ -2373,6 +2377,19 @@ static IrInstruction *ir_build_slice_src(IrBuilder *irb, Scope *scope, AstNode *
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return &instruction->base;
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}
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static IrInstruction *ir_build_splat_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type,
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IrInstruction *scalar)
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{
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IrInstructionSplatGen *instruction = ir_build_instruction<IrInstructionSplatGen>(
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&ira->new_irb, source_instruction->scope, source_instruction->source_node);
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instruction->base.value.type = result_type;
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instruction->scalar = scalar;
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ir_ref_instruction(scalar, ira->new_irb.current_basic_block);
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return &instruction->base;
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}
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static IrInstruction *ir_build_slice_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *slice_type,
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IrInstruction *ptr, IrInstruction *start, IrInstruction *end, bool safety_check_on, IrInstruction *result_loc)
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{
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@ -5014,7 +5031,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
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if (arg1_value == irb->codegen->invalid_instruction)
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return arg1_value;
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IrInstruction *splat = ir_build_splat(irb, scope, node,
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IrInstruction *splat = ir_build_splat_src(irb, scope, node,
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arg0_value, arg1_value);
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return ir_lval_wrap(irb, scope, splat, lval, result_loc);
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}
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@ -11082,16 +11099,23 @@ static ZigType *ir_resolve_type(IrAnalyze *ira, IrInstruction *type_value) {
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return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, type_value->source_node, val);
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}
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static Error ir_validate_vector_elem_type(IrAnalyze *ira, IrInstruction *source_instr, ZigType *elem_type) {
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if (!is_valid_vector_elem_type(elem_type)) {
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ir_add_error(ira, source_instr,
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buf_sprintf("vector element type must be integer, float, bool, or pointer; '%s' is invalid",
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buf_ptr(&elem_type->name)));
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return ErrorSemanticAnalyzeFail;
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}
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return ErrorNone;
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}
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static ZigType *ir_resolve_vector_elem_type(IrAnalyze *ira, IrInstruction *elem_type_value) {
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Error err;
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ZigType *elem_type = ir_resolve_type(ira, elem_type_value);
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if (type_is_invalid(elem_type))
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return ira->codegen->builtin_types.entry_invalid;
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if (!is_valid_vector_elem_type(elem_type)) {
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ir_add_error(ira, elem_type_value,
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buf_sprintf("vector element type must be integer, float, bool, or pointer; '%s' is invalid",
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buf_ptr(&elem_type->name)));
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if ((err = ir_validate_vector_elem_type(ira, elem_type_value, elem_type)))
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return ira->codegen->builtin_types.entry_invalid;
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}
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return elem_type;
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}
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@ -22357,7 +22381,9 @@ static IrInstruction *ir_analyze_instruction_shuffle_vector(IrAnalyze *ira, IrIn
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return ir_analyze_shuffle_vector(ira, &instruction->base, scalar_type, a, b, mask);
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}
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static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstructionSplat *instruction) {
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static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstructionSplatSrc *instruction) {
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Error err;
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IrInstruction *len = instruction->len->child;
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if (type_is_invalid(len->value.type))
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return ira->codegen->invalid_instruction;
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@ -22366,41 +22392,32 @@ static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstruction
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if (type_is_invalid(scalar->value.type))
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return ira->codegen->invalid_instruction;
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uint64_t len_int;
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if (!ir_resolve_unsigned(ira, len, ira->codegen->builtin_types.entry_u32, &len_int)) {
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ir_add_error(ira, len,
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buf_sprintf("splat length must be comptime"));
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uint64_t len_u64;
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if (!ir_resolve_unsigned(ira, len, ira->codegen->builtin_types.entry_u32, &len_u64))
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return ira->codegen->invalid_instruction;
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}
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uint32_t len_int = len_u64;
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if (!is_valid_vector_elem_type(scalar->value.type)) {
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ir_add_error(ira, len,
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buf_sprintf("vector element type must be integer, float, bool, or pointer; '%s' is invalid",
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buf_ptr(&scalar->value.type->name)));
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if ((err = ir_validate_vector_elem_type(ira, scalar, scalar->value.type)))
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return ira->codegen->invalid_instruction;
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}
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ZigType *return_type = get_vector_type(ira->codegen, len_int, scalar->value.type);
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if (instr_is_comptime(scalar)) {
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IrInstruction *result = ir_const_undef(ira, scalar, return_type);
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result->value.data.x_array.data.s_none.elements =
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allocate<ConstExprValue>(len_int);
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for (uint32_t i = 0; i < len_int; i++) {
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result->value.data.x_array.data.s_none.elements[i] =
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scalar->value;
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ConstExprValue *scalar_val = ir_resolve_const(ira, scalar, UndefOk);
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if (scalar_val == nullptr)
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return ira->codegen->invalid_instruction;
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if (scalar_val->special == ConstValSpecialUndef)
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return ir_const_undef(ira, &instruction->base, return_type);
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IrInstruction *result = ir_const(ira, &instruction->base, return_type);
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result->value.data.x_array.data.s_none.elements = create_const_vals(len_int);
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for (uint32_t i = 0; i < len_int; i += 1) {
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copy_const_val(&result->value.data.x_array.data.s_none.elements[i], scalar_val, false);
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}
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result->value.type = return_type;
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result->value.special = ConstValSpecialStatic;
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return result;
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}
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IrInstruction *result = ir_build_splat(&ira->new_irb,
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instruction->base.scope, instruction->base.source_node,
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instruction->len->child, instruction->scalar->child);
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result->value.type = return_type;
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result->value.special = ConstValSpecialRuntime;
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return result;
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return ir_build_splat_gen(ira, &instruction->base, return_type, scalar);
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}
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static IrInstruction *ir_analyze_instruction_bool_not(IrAnalyze *ira, IrInstructionBoolNot *instruction) {
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@ -25857,6 +25874,7 @@ static IrInstruction *ir_analyze_instruction_base(IrAnalyze *ira, IrInstruction
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case IrInstructionIdTestErrGen:
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case IrInstructionIdFrameSizeGen:
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case IrInstructionIdAwaitGen:
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case IrInstructionIdSplatGen:
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zig_unreachable();
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case IrInstructionIdReturn:
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@ -25987,8 +26005,8 @@ static IrInstruction *ir_analyze_instruction_base(IrAnalyze *ira, IrInstruction
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return ir_analyze_instruction_vector_type(ira, (IrInstructionVectorType *)instruction);
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case IrInstructionIdShuffleVector:
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return ir_analyze_instruction_shuffle_vector(ira, (IrInstructionShuffleVector *)instruction);
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case IrInstructionIdSplat:
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return ir_analyze_instruction_splat(ira, (IrInstructionSplat *)instruction);
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case IrInstructionIdSplatSrc:
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return ir_analyze_instruction_splat(ira, (IrInstructionSplatSrc *)instruction);
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case IrInstructionIdBoolNot:
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return ir_analyze_instruction_bool_not(ira, (IrInstructionBoolNot *)instruction);
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case IrInstructionIdMemset:
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@ -26325,7 +26343,8 @@ bool ir_has_side_effects(IrInstruction *instruction) {
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case IrInstructionIdIntType:
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case IrInstructionIdVectorType:
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case IrInstructionIdShuffleVector:
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case IrInstructionIdSplat:
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case IrInstructionIdSplatSrc:
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case IrInstructionIdSplatGen:
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case IrInstructionIdBoolNot:
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case IrInstructionIdSliceSrc:
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case IrInstructionIdMemberCount:
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@ -44,8 +44,10 @@ static const char* ir_instruction_type_str(IrInstruction* instruction) {
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return "Invalid";
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case IrInstructionIdShuffleVector:
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return "Shuffle";
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case IrInstructionIdSplat:
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return "Splat";
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case IrInstructionIdSplatSrc:
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return "SplatSrc";
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case IrInstructionIdSplatGen:
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return "SplatGen";
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case IrInstructionIdDeclVarSrc:
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return "DeclVarSrc";
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case IrInstructionIdDeclVarGen:
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@ -1224,7 +1226,7 @@ static void ir_print_shuffle_vector(IrPrint *irp, IrInstructionShuffleVector *in
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fprintf(irp->f, ")");
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}
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static void ir_print_splat(IrPrint *irp, IrInstructionSplat *instruction) {
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static void ir_print_splat_src(IrPrint *irp, IrInstructionSplatSrc *instruction) {
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fprintf(irp->f, "@splat(");
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ir_print_other_instruction(irp, instruction->len);
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fprintf(irp->f, ", ");
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@ -1232,6 +1234,12 @@ static void ir_print_splat(IrPrint *irp, IrInstructionSplat *instruction) {
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fprintf(irp->f, ")");
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}
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static void ir_print_splat_gen(IrPrint *irp, IrInstructionSplatGen *instruction) {
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fprintf(irp->f, "@splat(");
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ir_print_other_instruction(irp, instruction->scalar);
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fprintf(irp->f, ")");
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}
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static void ir_print_bool_not(IrPrint *irp, IrInstructionBoolNot *instruction) {
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fprintf(irp->f, "! ");
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ir_print_other_instruction(irp, instruction->value);
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@ -2170,8 +2178,11 @@ static void ir_print_instruction(IrPrint *irp, IrInstruction *instruction, bool
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case IrInstructionIdShuffleVector:
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ir_print_shuffle_vector(irp, (IrInstructionShuffleVector *)instruction);
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break;
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case IrInstructionIdSplat:
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ir_print_splat(irp, (IrInstructionSplat *)instruction);
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case IrInstructionIdSplatSrc:
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ir_print_splat_src(irp, (IrInstructionSplatSrc *)instruction);
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break;
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case IrInstructionIdSplatGen:
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ir_print_splat_gen(irp, (IrInstructionSplatGen *)instruction);
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break;
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case IrInstructionIdBoolNot:
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ir_print_bool_not(irp, (IrInstructionBoolNot *)instruction);
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@ -6514,7 +6514,7 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
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\\ var v = @splat(4, c);
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\\}
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,
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"tmp.zig:3:20: error: vector element type must be integer, float, bool, or pointer; 'comptime_int' is invalid",
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"tmp.zig:3:23: error: vector element type must be integer, float, bool, or pointer; 'comptime_int' is invalid",
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);
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cases.add("compileLog of tagged enum doesn't crash the compiler",
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@ -145,10 +145,11 @@ test "vector @splat" {
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var v: u32 = 5;
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var x = @splat(4, v);
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expect(@typeOf(x) == @Vector(4, u32));
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expect(x[0] == 5);
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expect(x[1] == 5);
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expect(x[2] == 5);
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expect(x[3] == 5);
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var array_x: [4]u32 = x;
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expect(array_x[0] == 5);
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expect(array_x[1] == 5);
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expect(array_x[2] == 5);
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expect(array_x[3] == 5);
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}
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};
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S.doTheTest();
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